Unit 1 Counters and Registers Mr. Grimming Introduction FFs and logic gates are combined to form various counters and registers. Unit Goals Goals: Understand counter principles Describe various counter circuits and IC counters. Describe IC registers and shift registers Troubleshoot counters and registers Asynchronous (Ripple) Counters Schematics are normally drawn from left to right, but counters will be drawn from right to left so that the MSB and LSB appear in the appropriate positions. MOD number is equal to the number of states that the counter goes through before recycling. Adding FFs will increase the MOD number. Frequency division each FF will have an output frequency of the input. The output frequency of the last FF of any counter will be the clock frequency divided by the MOD of the counter. Propagation Delay in Ripple Counters Ripple counters are simple, but the cumulative propagation delay can cause problems at high frequencies. For proper operation the following apply: T clock N x t pd F max =1/(N x t pd ) Counters with MOD Number