Bi 05: Kin trc MIPS

Phm Tun Sn ptson@fit.hcmus.edu.vn

Mc tiu Sau bi ny, SV c kh nng: Gii thch quan im thit k b lnh MIPS C kh nng lp trnh hp ng MIPS

2

B lnh Cng vic c bn nht ca b x l l x l cc lnh my (instruction). Tp hp cc lnh m mt b x l no ci t gi l b lnh (Instruction Set). Cc b x l khc nhau ci t cc b lnh khc nhau. V d: Pentium 4 (Intel), MIPS R3000 (MIPS Technology Inc), ARM2 (ARM), PowerPC 601 (IBM), SPARC V8 (Sun),

Cu hi Mt chng trnh thc thi (.exe) chy trn b x l Pentium 3 (Intel) c th chy c trn b x l Pentium 4 (Intel) khng ? Mt chng trnh thc thi (.exe) chy trn mt b x l ca Intel c th chy c trn b x l ca AMD ?

3

Kin trc b lnh Cc b x l khc nhau c cng kin trc b lnh (Instruction Set Architecture - ISA) c th thc thi cng mt chng trnh x86 (my tnh c nhn PC, laptop, netbook) x86-32 (IA-32/ i386): Intel 80386, Intel 80486, Intel Pentium, AMD Am386, AMD Am486, AMD K5, AMD K6, x86-64: Intel 64 (Intel Pentium D, Intel Core 2, Intel Core i7, Intel Atom,), AMD64 (AMD Athlon 64, AMD Phenom , )

IA-64: Pentium Itanium (my ch - server) MIPS (h thng nhng embedded system v siu my tnh supercomputer) MIPS32: R2000, R3000, R6000, MIPS64: R4000, R5000, R8000,

Ngoi ra, PowerPC (my ch, h thng nhng), SPARC 4 (my ch), ARM (h thng nhng),

4 nguyn tc thit k b lnh MIPS Cu trc lnh n gin v c quy tc (Simplicity favors regularity) Lnh v b lnh cng nh gn cng x l nhanh (Smaller is faster) Tng tc x l cho nhng trng hp thng xuyn xy ra (Make the common case fast) Thit k tt i hi s tha hip tt (Good design demands good compromises)

5

Mt s kho st v nhn xt MIPS ch cn h tr 32 thanh ghi l , nh s t $0 - $31 Mi thanh ghi c kch thc 32 bit (4 byte) Cc php ton lun l v s hc nha=b+c a=b&c a = b th sao? Hng tip cn Thm tt c cc lnh so snh khng bng: bgt, blt, ble, bge ? Ch cn thm 1 lnh m c th thc hin cc php so snh khng bng

MIPS h tr lnh: Set on Less Than C php: slt reg1,reg2,reg3 (Cu trc R-Format) ngha if (reg2 < reg3) reg1 = 1; else reg1 = 0; set ngha l set to 1 reset ngha l set to 0

61

So snh khng bng trong MIPS (2/3) Cu lnh sau: if (g < h) goto Less; #g:$s0, h:$s1 c chuyn thnh lnh MIPS nh sau slt $t0,$s0,$s1 # $t0 = 1 if gb # do if a= 1) goto Loop Loop: . . . # $t0 = 1 if # $s0 < < > 2 2 2 2 2 2 2 2 2 2 && && && && && || || || || || j j j j j j j j j j < < < < < 0) { product = product + mcand; mlier = mlier -1; } return product; }76

Th tc lng nhauint sumSquare(int x, int y) { return mult(x,x)+ y; } Th tc sumSquare gi th tc mult. Vn a ch quay v ca th tc sumSquare trong thanh ghi $ra s b ghi bi a ch tr v ca th tc mult khi th tc ny c gi Nh vy cn phi lu li a ch quay v ca th tc sumSquare (trong thanh ghi $ra ) trc khi gi th tc mult.

S dng thanh ghiBao nhiu cho ? S dng ngn xp (stack).77

M hnh cp pht b nh ca C Mt chng trnh C thc thi s c cp pht cc vng nh sau: a ch Vng nh c s dng trong qu trnh $sp Con tr ngn xp Stack thc thi th tc nh lu cc bin cc b, lu a ch tr v,

Heap

Vng nh cha cc bin cp pht ng. V d: con tr C c cp pht ng bi hm malloc() Vng nh cha cc bin cp pht tnh ca mi chng trnh. V d: bin ton cc ca C

Static

0

Code

M ngun chng trnh78

S dng ngn xp (1/2) Con tr ngn xp, thanh ghi $sp, c s dng nh v vng ngn xp. s dng ngn xp, cn khai bo kch thc vng ngn xp bng cch tng gi tr con tr ngn xp. Lnh MIPS tng ng viint sumSquare(int x, int y) { return mult(x,x)+ y; }

79

S dng ngn xp (2/2)# x,y : $a0,$a1 sumSquare: addi $sp,$sp,-8 # # sw $ra, 4($sp) # # # # push sw $a1, 0($sp) add $a1,$a0,$zero # jal mult # lw $a1, 0($sp) # # # add $v0,$v0,$a1 # pop lw $ra, 4($sp) # # # # addi $sp,$sp,8 # jr $ra mult: ... khai bo kch thc ngn xp cn dng ct a ch quay v ca th tuc sumSquare vo ngn xp ct y vo ngn xp gn x vo $a1 gi th tc mult sau khi thc thi xong th tc mult, khi phc y t ngn xp mult()+y ly li a ch quay v ca th tc sumSquare lu vo ngn xp, a vo thanh ghi $ra kt thc dng ngn xp80

Cu trc c bn ca th tcu th tcentry_label: addi $sp,$sp, -framesize sw $ra, framesize-4($sp) # # # # ct a ch tr v ca th tc trong $ra vo ngn xp ra

Lu tm cc thanh ghi khc nu cn

Thn th tc (c th gi cc th tc khc)

Cui th tcPhc hi cc thanh ghi khc nu cn lw $ra, framesize-4($sp) addi $sp,$sp, framesize jr $ra # khi phc $ra

memory

81

Mt s nguyn tc s dng th tc Th tc R (caller) gi th tc E (callee) Trong th tc R1. Lu a ch tr v (trong $ra) ca R vo ngn xp 2. Gn cc i s (nu c) R truyn vo E 3. Gi lnh jal

Trong th tc E3. Khi to ngn xp 4. Lu vo ngn xp cc thanh ghi trong R c th b thay i trong E. 5. 6. Khi phc cc d liu lu tm trong ngn xp 7. Phc hi ngn xp 8. Gi lnh jr $ra tr li th tc R

82

Trc nghim

int fact(int n){ if(n == 0) return 1; else return(n*fact(n-1));}

Khi chuyn sang MIPS A. C TH sao lu $a0 vo $a1 (v sau khng lu li $a0 hay $a1 vo ngn xp) lu li n qua nhng li gi qui. B. PHI lu $a0 vo ngn xp v n s thay i. C. PHI lu $ra vo ngn xp do cn bit a ch quay v

0: 1: 2: 3: 4: 5: 6: 7:

ABC FFF FFT FTF FTT TFF TFT TTF TTT83

Trc nghimr: ... ... jal e ... jr $ra # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem ### ct cc thanh ghi vo ngn xp? # gi th tc e # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem # quay v th tc gi r

e: ... # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem jr $ra # quay v th tc r Th tc r cn ct cc thanh ghi no vo ngn xp trc khi gi jal e? 0: 1: 2: 3: 4: 5: 6:

0 1 2 3 4 5 6

of of of of of of of

($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra)84

p nr: ... ... jal e ... jr $ra # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem ### ct cc thanh ghi vo ngn xp? # gi th tc e # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem # quay v th tc gi r

e: ... # c ghi $s0,$v0,$t0,$a0,$sp,$ra,mem jr $ra # quay v th tc r Th tc r cn ct cc thanh ghi no vo ngn xp trc khi gi jal e? 0: 1: 2: 3: 4: 5: 6:

0 1 2 3 4 5 6

of of of of of of of

($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra) ($s0,$sp,$v0,$t0,$a0,$ra)Khng cn ct vo ngn xp Cn ct vo ngn xp85

Vai tr 32 thanh ghi ca MIPSThe constant 0 Reserved for Assembler Return Values Arguments Temporary Saved More Temporary Used by Kernel Global Pointer Stack Pointer Frame Pointer Return Address $0 $1 $2-$3 $4-$7 $8-$15 $16-$23 $24-$25 $26-27 $28 $29 $30 $31 $zero $at $v0-$v1 $a0-$a3 $t0-$t7 $s0-$s7 $t8-$t9 $k0-$k1 $gp $sp $fp $ra

86

Nguyn tc s dng thanh ghi (1/2) $0: Khng thay i. Lun bng 0. $s0-$s7: Khi phc nu thay i. Rt quan trng. Nu th tc c gi (callee) thay i cc thanh ghi ny th n phi phc hi cc thanh ghi ny trc khi kt thc. $sp: Khi phc nu thay i. Thanh ghi con tr ngn xp phi c gi tr khng i trc v sau khi gi lnh jal , nu khng th tc gi (caller) s khng quay v c. D nh: tt c cc thanh ghi ny u bt u bng k t s!87

Nguyn tc s dng thanh ghi (2/2) $ra: C th thay i. Li gi lnh jal s lm thay i gi tr thanh ghi ny. Th tc gi lu li thanh ghi ny vo ngn xp nu cn. $v0-$v1: C th thay i. Cc thanh ghi ny cha cc kt qu tr v. $a0-$a3: C th thay i. y l cc thanh ghi cha i s. Th tc gi cn lu li gi tr nu n cn sau khi gi th tc. $t0-$t9: C th thay i. y l cc thanh ghi tm nn c th b thay i bt k lc no. Th tc gi cn lu li gi tr nu n cn sau cc li gi th tc.88

Tm tt cc cu trc lnh MIPS

Hnh 2.26 trang 104, P&H

89

Tm tt mt s lnh MIPS tm hiu

Hnh 2.47 trang 146, P&H

90

Lnh gi Lnh gi (Pseudo Instruction) l cc lnh hp ng khng c ci t lnh my tng ng, nhm mc ch gip cho vic lp trnh hp ng d dng hn

Hnh 2.47 trang 146, P&H91

Mt s Syscall thc hin nhp xut

92

Tm hiu thm Qu trnh bin dch v thc thi chng trnh (phn 2.10, trang 106-115, P&H) + cc khi nim Symbol table Compiler, Linker, Loader Dynamically Linked Library (DLL) Java bytecode, Java Virtual Machine (JVM), Just In Time Compiler (JIT)

B lnh Intel IA-32 (phn 2.16, trang 134-143, P&H) + cc khi nim General Purpose Register (GPR) Addressing Modes93

Tham kho Chng 2, trang 28, P&H

94

Bi 04: Cu trc v hot ng ca B x lPhm Tun Sn ptson@fit.hcmus.edu.vn

Cu trc my tnh

My tnhB x l B nh chnh (Central (Main Processing Memory) Unit) H thng kt ni (Bus) My tnh (Computer) Thit b nhp xut (Input Output)

2

Thc thi chng trnh

3

Cu trc b x lLu tr tm d liu ALU, CU x l v iu khinComputerI/O System Bus Memory CPU

B x l (CPU)Thanh ghi (Registers)

X l, tnh ton trn d liu lu trong thanh ghi

n v x l (Arithmetic & Logic Unit)

Internal Bus

n v iu khin (Control Unit)

Kt ni gia cc thnh phn CU, ALU v Register trong CPU

iu khin x l ca ALU v d liu trn thanh ghi 4

Lnh my Lnh my (machine instruction/ instruction/ machine code) l dy bit cha yu cu m b x l phi thc hin Cu trc ca mt lnh my thng gm: M thao tc (opcode): cho bit lnh thc hin thao tc g (+. , and, or, ) Cc ton hng (operand): cho bit cc i tng b tc ng bi thao tc trong m thao tc (thanh ghi, vng nh, hng s, )

Mi b x l ch hiu c mt s lnh vi mt vi cu trc nht nh

5

Thc thi chng trnh c th hn

6

Hot ng ca CPU X l lnh my qua 2 bc, gi l chu k lnh (instruction cycle) Np lnh (Fetch) Di chuyn lnh t b nh vo thanh ghi

Thc thi lnh Gii m lnh v thc hin thao tc yu cu

7

Qu trnh np lnh MAR (PC) MBR Memory IR (MBR) PC (PC) + 1 Thanh ghi MAR (Memory Address Register) Lu a ch c gi ra/ nhn vo t bus a ch.

Thanh ghi MBR (Memory Buffer Register) Lu gi tr c gi ra/ nhn vo t bus d liu.

Thanh ghi PC (Program Counter) Lu a ch ca lnh s c np.

Thanh ghi IR (Instruction Register) Lu lnh s c x l.

B x l di chuyn lnh t vng nh c a ch trong thanh ghi PC vo thanh ghi IR. Mc nh, gi tr thanh ghi PC c tng 1 lng bng chiu di ca lnh c np.8

Qu trnh thc thi lnh B x l gii m lnh trong thanh ghi IR v thc hin thao tc yu cu nh: Thc hin cc php tnh s hc v lun l Thc hin di chuyn d liu gia thanh ghi v b nh Thc hin di chuyn d liu gia thanh ghi v thit b nhp xut Thc hin cc thao tc iu khin nh r nhnh

9

V d qu trnh x l lnh ca CPUNp lnh Cu trc lnh 4 bit M thao tc 12 bit a ch Thc thi lnh

Cc thanh ghi: PC, IR, AC M thao tc 0001 = Np d liu t a ch vo thanh ghi AC 0010 = Lu d liu t thanh ghi AC vo b nh ti a ch 0101 = Cng dn gi tr ti a ch vo thanh ghi AC

10

Chu k lnh tng qut1. Tnh a ch ca lnh 2. Np lnh 3. Gii m lnh 4. Tnh a ch ca ton hng 5. Np ton hng 6. Thc thi lnh 7. Tnh a ch ca ton hng cha kt qu 8. Ghi kt qu

11

Ngt Ngt (Interrupt) l c ch cho php ngt qu trnh thc thi tun t thng thng tng lnh ca b x l phc v cng vic khc nh nhp xut. Mt s loi ngt Ngt chng trnh Debug chng trnh Trng hp trn s, chia cho 0,

Ngt ng h c pht sinh bi b nh gi bn trong b x l c s dng trong cc mi trng a nhim

Nhp xut V d: nhp k t,

Li phn cng V d: li truyn d liu,..12

Qu trnh phc v ngt B x l kim tra ngt mi khi thc thi xong 1 lnh da vo tn hiu ngt Nu khng c ngt, np lnh k tip c a ch trong PC. Nu c ngt: Tm ngng thc thi tip cc lnh ca chng trnh ang c thc hin. Lu li cc d liu ang thc hin dang d ca chng trnh. t a ch bt u th tc x l ngt vo thanh ghi PC. X l ngt Khi phc cc d liu ang thc hin dang d ca chng trnh b ngt v tip tc thc hin chng trnh ny

13

Tham kho Chng 12, William Stallings

14