daniel f.s_on tap kien truc may tinh

Daniel F.S in t 1/K52 n tp Kin trc My tnh

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CHNG I: HIU NNG MY TNH

Hiu nng my tnh X

So snh hiu nng 2 my tnh

Thi gian CPU Thi gian b x l dng thc hin 1 nhim v

TCPU Thi gian b x l dng thc hin 1 chng trnh

C S xung ng h vi x l dng thc hin 1 chng trnh

TC/fC ln 1 chu k / Tn s hot ng

I S ch th cn thc hin trong chng trnh

CPI (Clock cycles per Instruction) S xung ng h trung bnh cn thc thi 1 ch th my

CPI hiu dng (Tnh trung bnh)

CPIi S chu k trung bnh cn thit thc thi 1 ch th thuc lp i

ICi T l (%) ch th thuc lp i c thc thi trong chng trnh

nh lut Amdahl


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CHNG II: NGN NG MY TNH V PHP TON

I. BIU DIN S NGUYN

1. Mt bit du v ln

Bit u l bit du (0 l dng, 1 l m). Cc bit sau biu din s nguyn khng du.

C 2 cch biu din s 0 (+0 v -0)

Khong biu din [-(2m-1-1), 2m-1-1]

2. M b 2

Bit u l bit du (0 l dng, 1 l m).

Cch i sang s m

o o bit s dng m b 1

o Cng thm 1 m b 2 (b bit trn)

C 1 cch duy nht biu din s 0

Khong biu din [-2m-1, 2m-1-1]

i t s nguyn n bit sang s nguyn m bit (m>n), ch cn sao chp bit du cho s bit

VD: 1001(s -7 dng 4 bit) 111001 (s -7 dng 6 bit)

3. M lch

Trong : bias l lch v thng bng 2m-1

Khng c bit du

Khong biu din: [-2m-1, 2m-1-1]

VD: (11011001) 2, 63 = 20 + 2

3 + 2

4 + 2

6 + 2

7 63 = 154

II. BIU DIN S THC CHUN IEEE 754

chnh xc n dng 32 bit nh phn

1 bt du s: 0 s dng; 1 s m

8 bt biu din s m theo m lch 127:

23 bt biu din phn ln c chun ha 1 M < 2

M = (1,f22f21f0)2


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Biu din cc s c bit

VD: 1 1101 1001 110000 (tng cng 32 bit)

s = 1 S m

exp = (1101 1001)2,127 = 20 + 2

3 + 2

4 + 2

6 + 2

7 127 = 90

M = (1, 110000) = 1 + 2-1 + 2-2 = 1,75

R = (-1) x 290 x 1,75 = 2,1664 x 1027

III. KIN TRC TP LNH

1. Big Endian v Little Endian

Big Endian: a ch word l a ch ca byte ln nht trong word. Byte thp cha nh

c a ch cao.

Little Endian: a ch word l a ch ca byte nh nht trong word. Byte thp cha

nh c a ch thp.

2. Kin trc RISC v CISC

RISC

o Tp lnh rt gn

o nh dng lnh v di lnh c nh, n gin D gii m

o Ch a ch n gin

o t h tr cc loi d liu phc tp

CISC

o Tp lnh phc tp

o Lnh c di thay i, phc tp Gn ngn ng lp trnh bc cao

o Ch a ch phc tp

o H tr cc loi d liu phc tp

3. Ch a ch

Thanh ghi Add R4, R3 R4 R4 + R3

Tc th Add R4, #3 R4 R4 + 3

Dch chuyn Add R4, 100(R1) R4 R4 + Mem[100+R1]

Gin tip thanh ghi Add R4, (R1) R4 R4 + Mem [R1]

Ch s/c s Add R3, (R1+R2) R3 R3 + Mem [R1+R2]

Trc tip Add R1, (1001) R1 R1 + Mem [1001]

Gin tip b nh Add R1, @(R3) R1 R1 + Mem [Mem[R3]]

Tng t ng Add R1, (R2)+ R1 R1 + Mem [R2]; R2 R2 + d

Gim t ng Add R1, -(R2) R2 R2 d; R1 R1 + Mem [R2]

Scaled Add R1, 100(R2)[R3] R1 R1 + Mem [100 + R2 + R3 * d]


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4. Tp thanh ghi ca MIPS

Gm 32 thanh ghi 32 bit, 2 cng c, 1 cng ghi.

Tn Ch s Cng dng

$zero 0 Lun bng 0

$at 1 Reserved for assembler

$v0 - $v1 2 3 Lu kt qu tr v

$a0 - $a3 4 - 7 Lu gi tr

$t0 - $t7 8 15 Bin tm

$s0 - $s7 16 23 Lu kt qu

$gp 28 Con tr ton cc

$sp 29 Con tr stack

$fp 30 Con tr khung

$ra 31 a ch tr v

5. Kin trc tp lnh MIPS

Ch th di 32 bit

3 loi nh dng

o R-ch th thanh ghi: 2 ton hng ngun thanh ghi, 1 ton hng ch thanh ghi.

o I-ch th trc tip: 1 ton hng ngun thanh ghi, 1 ton hng ngun trc tip, 1 ton

hng ch thanh ghi.

o J-ch th nhy: 1 ton hng ngun trc tip.

6. R format

M hp ng

, ,

rd rs op rt

V d: add $t1, $s4, $s3

Rs = $s4; Rt = $s3; Rd = $t1;

Sll $t2, $s0, 8

Rt = $s0; Rd = $t2; Shamt = 8;

o Op: m lnh xc nh php ton (opcode)

o Rs: ch s thanh ghi ton hng ngun 1

o Rt: ch s thanh ghi ton hng ngun 2

o Rd: ch s thanh ghi lu kt qu

o Shamt: s lng dch (cho ch th dch)

o Funct: m chc nng thm cho phn m lnh

op rs rt rd shamt funct

6 bit 5 bit 5 bit 5 bit 5 bit 6 bit


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7. I format

a. Load Store

M hp ng (v d)

lw $t0, 24($s3)

b. R nhnh c iu kin

M hp ng (v d)

bne $s0, $s1, label1

Xc nh a ch r nhnh:

Thm 2 bit 0 vo cui offset (v PC tn cng l 00) v m rng bit du cho 32 bit

(*)

PC c cp nht (PC+4) (**)

(*) + (**) c a ch r nhnh, lu tr li PC.

8. J format

Dng cho lnh nhy kh ng iu kin.

M hp ng (v d):

j label1

Opcode Jump target

6 bit 26 bit address

Thm 2 bit 0 vo cui Jump target, copy 4 bit u ca PC t vo trc Jump target cho 32 bit.

c a ch cn nhy ti, copy vo PC

op rs rt immediate

6 bit 5 bit 5 bit 16 bit lw $s3 $t0 24(10)

op rs rt immediate

6 bit 5 bit 5 bit 16 bit bne $s0 $s1 Offset to label1


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9. Tng hp cc lnh

IV. PHP TON V CCH THC HIN

1. Php ton dch v b dch

Dch logic

o Cc ch s trng c in bng 0

o Sang phi1 bit: srl1(an-1,an-2,,a0) = (0,an-1,an-2,,a1)

o Sang tri 1 bit: sll1(an-1,an-2,,a0) = (an-2,an-3,,a0,0)

o Dng trin khai b nhn v chia khng du


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Dch s hc

o Bt du (MSB) kh ng c thay i

dch phi sao chp bt du vo cc ch s trng

dch tri khng dch bt du

o Sang phi 1 bit: sra1(an-1,an-2,,a0) = (an-1,an-1,an-2,,a1)

o Sang tri 1 bit: sla1(an-1,an-2,,a0) = (an-1,an-3,,a0,0)

o Dng trin khai b nhn v chia c du

B dch tri 0 bit hoc 1 bit

1 0 1 0 1 0 1 0

Tn hiu iu khin

S =0 or 1

Cn-1 C2 C1 C00

D0D1D2Dn-1

.

B dch tri 1 bit v dch phi 2 bit

2. B cng Tr

a. B cng na (Cng 2 s 1 bit)


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b. B cng (Cng 3 s 1 bit) (FA)

tr c tnh theo thi gian xut hin ca Ci (v a, b xut hin sm hn Ci rt nhiu)

c. B cng 2 s n bit dng b 2


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tr tng tuyn tnh vi s lng b cng

d. B cng CLA

Vi Ripple-Carry Adder, bit nh c tnh da trn cc bt nh trc tc chm

Tng tc , tnh bit nh mi ct trc tip t tn hiu u vo

Bit nh u ra ca ct i c tnh t tn hiu to nh v tn hiu lan truyn nh ci = gi + ci-1* pi

Tnh ton bit nh

Mi cng thc nh trn c th c trin khai bi mt mch logic 2 mc

tnh ton pi, gi ta cn mch logic 1 mc t u vo

Vy cn ti a 3 mc t u vo tnh c tn hiu nh

Tng tc ( tr gim t 7 b cng ni tip thnh 3 b cng CLA)

Cn cng AND n+2 u vo v cng OR n+2 u vo cho cn Ch gii hn trong 4 bit, mun

cng nhiu bit hn phi ghp cc b cng ny.

PFA

CLA

a b

s

p g

C3,2,1,0


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Tng 1: Tnh ton tng, tnh hiu to nh v truyn nh (1 mc logic) PFA

Tng 2: Tnh ton bit nh (2 mc logic) CLA

3. B nhn

a. Nhn khng du

Nhn ln lt cc ct ca s b nhn v s nhn c tch cc b

Cc tch cc b c cng vi nhau theo ct


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b. Nhn c du

M rng bt du cho cc tch cc b

Vi tch cc b ca bit du s b3, cn ly s i (s b 2)

p dng quy tc bin i chui bit ging nhau (xem nhn Booth) trn mi hng, ta c:


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Vit gn li ta c:

Chuyn php tr thnh cng vi b 2 :

Vit gn li (a hng cui ln cc hng tng ng)


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B nhn c du

c. Nhn ni tip

S dng b cng cng cc tch cc b

Thc hin php nhn trong vi chu k ng h

Lu s b nhn, s nhn v kt qu tm thi trong cc thanh ghi

Vi mi bit bi ca s nhn B (t phi qua tri)

o Nhn bi vi s b nhn A v cng tch vi kt qu tng tm thi Y Nu bi = 1 th

cng A vo Y

o Dch A sang tri 1 bit


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Nhn xt:

Mt na s bit ca A lun bng 0

Khi A dch tri, bit 0 c thm vo bn phi cc bit LSB ca tch khng b nh hng

tng: Gi A pha tri ca tch v dch tch sang phi


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Nhn xt :

Trong qua trnh tnh ton, c Y v B u c dch sang phi C th ghp chung Y v B vo

cng 1 thanh ghi.

d. Nhn Booth

A * 1111 = A * (24 20) = A * 24 A

Dch A sang tri 4 bit v tr i A

S b nhn B cha chui s 1 t bit v tr v n bit v tr u

(bn-1, bn-2, bu+1,bu,,bv,bv-1,..,b0) = (bn-1, bn-2, 0,1,,1,0,..,b0)

Chui bit c th thay th bng 2u+1 2v

Cc php nhn v cng cho cc bt bu n bv c th c thay bng php dch tri v php tr

V d: B = 001110 (1410), u = 3, v = 2 A x B = A* 24 A*21


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Thc hin theo s thut ton, ch :

Bt u chui s 1 : 2 bit lin tip nhau l 01

Kt thc chui s 1 : 2 bit lin tip nhau l 10

Ch : Nhn Booth l nhn 2 s nguyn c du ^^


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4. B chia

Thut ton : Ly s b chia tr i s chia v dch phi s chia (nh chia hng dc)

V d : Y = A/B

Ti u khi thc hin : Thay v dch phi s chia th dch tri phn d (l phn s b chia sau khi

tr i s chia)


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Chia c du :

Chia phn gi tr tuyt i

Xc nh du ca thng :

o Thng mang du (+) nu s b chia v s chia cng du

o Thng mang du (-) nu s b chia v s chia tri du

S d cng du vi s b chia

o kt qu nu cn thit

5. Php ton vi du phy ng


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CHNG III : B X L

I. CC QU TRNH THC HIN

Instruction

Fetch

c lnh

Instruction

Decode

Gii m lnh

Operand

Fetch

c ton

hng

Execute

Thc hin

Result store

Lu kt qu

Next

Instruction

Tng PC

thm 4

Fetch

PC=PC+4

Decode Exec, Store

1. Np lnh

c lnh ti a ch lu trong PC t b nh ch th.

Khng cn tn hiu iu khin PC.

Sau mi chu k ng h, PC t ng tng thm 4.

2. Gii m lnh

Chuyn cc bit thuc trng m lnh v trng m chc nng ti khi iu khin.

c 2 gi tr ton hng ngun t tp thanh ghi (Ch s cc thanh ghi nm trong lnh)

3. Thc hin lnh

a. Thc hin lnh loi R

Thc hin php ton (m ha

bi op v funct) trn gi tr ton

hng trong rs v rt.

Ghi kt qu vo tp thanh ghi

(ti v tr rd)

Tp thanh ghi kh ng c ghi

mi chu k cn tn hiu iu

khin ghi ring bit (RegWrite)


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b. Thc hin lnh c ghi b nh (Loi I)

Tnh a ch b nh bng cch cng thanh ghi c s (c t tp thanh ghi khi gii m lnh) vi

gi tr offset.

ghi (sw) gi tr (c c t tp thanh ghi khi gii m lnh) vo b nh d liu.

c (lw) gi tr t b nh d liu vo tp thanh ghi.

Lnh SW (Store)

Lnh LW (Load)


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c. Thc hin lnh r nhnh c iu kin (Loi I)

d. Thc hin lnh nhy kh ng iu kin (Loi J)

II. B X L N XUNG NHP

Cc lnh c thc hin trong 1 chu k xung nhp

u im : n gin v d hiu

Nhc im :

o Chu k ng h t theo lnh chm nht S dng chu k ng h khng hiu qu

o Tn din tch thit k v mt s khi chc nng cn c nhn ln do khng th c

chia s trong cng 1 chu k ng h.


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1. Lnh R

Cc ng d liu :

Instr [31-26] : a Op vo khi iu khin

Instr [25-21] : Ton hng ngun th nht (rs)

Instr [20-16] : Ton hng ngun th 2 (rt)

Instr [15-11] : Ton hng ch (rd : a ch cn thanh ghi cn ghi vo)

Instr [15-11] : Ton hng ch (rd : a ch cn thanh ghi cn ghi vo)

Instr [5-0] : a Fn vo ALU control xc nh chnh xc tn hiu iu khin t ALU

ReadData1 v ReadData2 ni vo 2 u vo khi ALU

u ra khi ALU l kt qu cn ghi, c a tr v u WriteData ca tp thanh ghi

PC c tng thm 4 v lu tr v PC

Cc tn hiu iu khin :

ALUOp : iu khin khi ALU control

RegDst = 1 : Chn a ch thanh ghi ch l rd (Instr [15-11]) t b MUX

RegWrite = 1 : Cho php ghi vo tp thanh ghi

ALUScr = 0: Chn tn hiu vo khi ALU l ReadData2

MemtoReg = 0: Chn tn hiu ghi vo tp thanh ghi l kt qu t khi ALU

Branch = 0 PCScr = 0: Chn tn hiu PC+4 a v PC


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2. Lnh STORE

Cc ng d liu :


Instr [25-21] : Ton hng ngun th nht (rs) tnh a ch b nh

Instr [20-16] : Ton hng ngun th 2 (rt) cha ni dung cn ghi vo b nh

Instr [15-0] : Phn Offset 16 bit, c m rng thnh 32 bit v a vo ALU tnh ton

a ch b nh.

ReadData1 a vo ALU tnh a ch b nh

ReadData2 a vo WriteData : D liu cn ghi vo b nh

u ra khi ALU a ch b nh cn ghi d liu vo


Cc tn hiu iu khin :


ALUScr = 1: Chn tn hiu vo khi ALU l phn Offset sau khi m rng du

MemWrite = 1: Cho php ghi vo b nh

MemRead = 0: Kh ng cho php c b nh



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3. Lnh LOAD

Cc ng d liu :


Instr [25-21] : Ton hng ngun th nht (rs) tnh a ch b nh

Instr [20-16] : Ton hng ch (rt) l thanh ghi nhn d liu t b nh.

Instr [15-0] : Phn Offset 16 bit, c m rng thnh 32 bit v a vo ALU tnh ton

a ch b nh.

ReadData1 a vo ALU tnh a ch b nh

u ra khi ALU a ch b nh cnc d liu ra


D liu ti u ra ReadData qua b MUX c a tr v WriteData ca tp thanh ghi

Cc tn hiu iu khin :


ALUScr = 1: Chn tn hiu vo khi ALU l phn Offset sau khi m rng du

RegDst = 1 : Chn a ch thanh ghi ch l rt (Instr [20-16]) t b MUX

RegWrite = 1 : Cho php ghi vo tp thanh ghi

MemWrite = 0: Khng cho php ghi vo b nh

MemRead = 1: Cho php c b nh

MemtoReg = 1: Chn ReadData a v WriteData trn tp thanh ghi



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4. Lnh r nhnh c iu kin

Cc ng d liu :


Instr [25-21] : Ton hng ngun th nht (rs) so snh

Instr [20-16] : Ton hng th 2 (rt) so snh

Instr [15-0] : Phn Offset 16 bit, c m rng thnh 32 bit tnh a ch r nhnh. 32 bit

ny sau c dch tri 2 bit to 2 bit 0 cui, ri cng vi (PC+4) a ch r

nhnh.

ReadData1 a vo ALU so snh

ReadData2 a vo ALU so snh

PC c tng thm 4 v lu tr v PC (Nu ko c r nhnh)

Cc tn hiu iu khin :


ALUScr = 0: Chn tn hiu vo khi ALU ReadData2

Branch = 1 Vic la chn r nhnh ph thuc vo tn hiu Zero

Tn hiu Zero t khi ALU xc nh c r nhnh hay khng


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5. Lnh nhy khng iu kin

Cc ng d liu :


PC c tng thm 4

Instr [25-0] : 26 bit xc nh a ch nhy ti, c m rng du thnh 28 bit, shift left 2

bit to 2 bit 0 cui, ri ghp vi 4 bit cao ca (PC+4) to thnh a ch r nhnh 32

bit, a v PC.

Cc tn hiu iu khin :

Jump = 1 khi MUX chn a ch r nhnh dn v PC

III. B X L A XUNG NHP

Chia lnh thnh cc pha thc hin: IF, ID, EX, MEM, WB. Mi pha thc hin trong 1 chu k

xung nhp

Cc u im:

o Thi gian thc hin (= s pha) ca mi lnh c iu chnh ty thuc phc tp ca

lnh.

o Cc khi chc nng c chia s gia cc pha khc nhau ca lnh do mt khi chc nng

c th khng cn trong ton b cc pha thc hin ca lnh.


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Tc khng ci thin so vi n xung nhp, nhng tit kim ti nguyn


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IV. PIPELINE

1. Khi nim chung

o IFetch: Np lnh v cp nhp gi tr PC

o IDec: c thanh ghi v gii m lnh

o EXec: Thc hin lnh R; tnh a ch b nh

o MEM: c/ghi b nh d liu

o WB: Ghi kt qu vo tp thanh ghi

Bt u lnh tip theo trc khi lnh hin ti kt thc.

o Ci thin th ng lng tng s cng vic hon thnh trong 1 khong thi gian.

o tr lnh (thi gian thc hin, thi gian p ng thi gian t lc bt u n lc

kt thc lnh) kh ng c gim.

o Chu k ng h (thi gian 1 giai on ng ng) quyt nh bi giai on chm nht.

o Mt s giai on khng dng ton b chu k ng h (VD: WB).

o Mt s lnh, c cc giai on l chu k lng ph (ngha l, kh ng thc hin g trong chu

k vi lnh ).

D trin khai

o Cc lnh c cng di (32 bits) C th np lnh trong giai on 1 v gii m lnh

trong giai on 2.

o t nh dng lnh (3 nh dng). Cc nh dng lnh c tnh i xng C th c

thanh ghi giai on 2.

o Ch truy cp b nh bng lnh lw v sw C th tnh a ch b nh giai on EX

(thc hin lnh)

o Mi lnh ch ghi ln nht 1 kt qu (lm thay i trng thi my) 2 giai on cui

(MEM or WB)

o Ton hng c sp xp trong b nh sao cho 1 lnh dch chuyn d liu ch cn 1 ln

truy cp b nh.

Khi Pipeline c in y, 1 lnh c hon thnh trong 1 chu k CPIideal 1


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2. Thanh ghi trng thi Pipeline

o Thanh ghi trng thi gia cc giai on thc hin lnh phn cch.

o Cc thanh ghi ny lu kt qu tm thi ca tng giai on Pipeline D liu ca 1 lnh i theo

lnh qua tng giai on Pipeline

V d: Trong lnh add rs, rt, rd

o a ch rd kh ng c a trc tip vo WriteAddr ca tp thanh ghi (V nh vy,

d liu ghi vo l d liu ca lnh trc ).

o Rd c ghi vo ln lt qua cc thanh ghi Pipeline qua tng giai on, cui cng

c chuyn t thanh MEM/WB v WriteAddr ti giai on cui ca lnh add.

Cc tn hiu iu khin c xc nh trong giai on gii m v c lu trong cc thanh ghi trng

thi gia cc giai on pipeline


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3. Xung t Pipeline

Xung t cu trc: yu cu s dng cng mt ti nguyn cho 2 lnh khc nhau ti cng 1

thi im.

Xung t d liu: yu cu s dng d liu trc khi n sn sng Cc ton hng ngun ca

1 lnh c to ra bi lnh pha trc vn ang nm trong pipeline.

Xung t iu khin: yu cu quyt nh iu khin dng chng trnh trc khi iu kin r

nhnh v gi tr PC mi c tnh ton Cc lnh r nhnh, nhy v ngt.

Gii quyt xung t bng cch ch i: Khi iu khin pipeline cn pht hin xung t v

hnh ng gii quyt xung t.

a. Xung t cu trc

B nh n (Lu c ch th v d liu) Gii php: Dng b nh ch th v b nh d liu tch

ring nhau (I$ v D$)

Xung t cu trc khi truy cp tp thanh ghi (2 lnh cng s dng thanh ghi trong cng 1 chu k)

Gii php: Ghi trong na u chu k v c ra na sau chu k


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b. Xung t d liu

Ph thuc d liu ngc theo thi gian gy xung t

Xung t do c trc khi ghi

c. Xung t iu khin

V d: Bit kt qu ca lnh beq ti chu k 4 nhng li cn np lnh tip chu k 2

4. Gii quyt xung t Pipeline

a. Xung t d liu c trc khi ghi Tm dng (Stall)


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b. Chuyn tip d liu

Ly kt qu thi im n xut hin sm nht trong bt k thanh ghi pipeline no, v chuyn

tip n n khi chc nng (VD. ALU) m cn kt qu ti chu k ng h .

Vi khi chc nng ALU: u vo c th t bt k thanh ghi pipeline no ch khng cn t

ID/EX bng cch:

o Thm b chn vo trc u vo ca ALU

o Ni d liu ghi Rd EX/MEM hoc MEM/WB ti mt trong 2 hoc c 2 thanh ghi

pipeline Rs v Rt thuc giai on EX.

o Thm phn iu khin phn cng iu khin b chn

Cc khi chc nng khc cng cn c thm tng t (VD. DM)

Vi chuyn tip c th t c CPI = 1 ngay khi c s ph thuc d liu

Mt loi xung t d liu xut hin khi chuyn tip: Xung t gia kt qu ca lnh ang

giai on WB v lnh ang giai on MEM kt qu no cn c chuyn tip? WB

Vi lnh lw, nu c s dng chuyn tip th lnh sau n vn phi i 1 chu k


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c. Gii quyt xung t iu khin

Khi a ch cc lnh khng tun t (i.e., PC = PC + 4); xut hin khi c cc lnh thay i

dng chng trnh

o Lnh r nhnh kh ng iu kin (j, jal, jr)

o Lnh r nhnh c iu kin (beq, bne)

o Ngt, Exceptions

Gii php

o Tm dng (nh hng CPI)

o Tn ton iu kin r nhnh cng sm cng tt trong giai on pipeline gim s

chu k phi dng

o R nhnh chm (Delayed branches - Cn h tr ca trnh dch)

o D on v hy vng iu tt nht!

Xung t iu khin t xy ra, nhng kh ng c gii php gii quyt hiu qu nh chuyn tip

i vi xung t d liu.

Lnh nhy kh ng c gii m cho n giai on ID, cn mt lnh xa (flush). xa, t

trng m lnh ca thanh ghi pipeline IF/ID bng 0 (lm n tr thnh 1 lnh noop)

Lnh nhy rt t xut hin ch chim 3% s lnh trong SPECint (CPI =1,03 vi s lng ch

th ln).

Xung t iu khin r nhnh Ch (Flush)


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Tnh ton iu kin r nhnh cng sm cng tt, tc l trong giai on gii m (c phn cng

ring so snh, trc khi dng ti ALU) ch cn 1 chu k ch.

d. R nhnh chm

Nu phn cng cho r nhnh nm giai on ID, ta c th loi b cc chu k ch r nhnh

bng cch s dng r nhnh chm (delayed branches) lun thc hin lnh theo sau lnh lnh

r nhnh r nhnh c tc dng sau lnh k tip n

Trnh dch MIPS compiler chuyn 1 lnh an ton (khng b nh hng bi lnh r

nhnh) ti sau lnh r nhnh (vo khe tr). V vy s du c s r nhnh chm.

Vi pipeline su (nhiu giai on), tr r nhnh tng cn nhiu lnh c chn vo sau lnh r

nhnh

R nhnh chm ang c thay th bi cc phng php khc tn km hn nhng

mm do (ng) hn nh d on r nhnh

S pht trin ca IC cho php c b d on r nhnh t tn km hn

Sp xp lnh trong r nhnh chm


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e. D on r nhnh tnh

Gii quyt xung t r nhnh bng cch gi s 1 hng r nhnh v tip tc khng cn ch tnh ton

kt qu r nhnh thc s.

on kh ng r nhnh lun gi s lnh khng r nhnh, tip tc np cc lnh k tip, ch khi c

r nhnh th cn dng pipeline

o Nu r nhnh, xa cc lnh sau r nhnh (sm trong pipeline)

trong giai on IF, ID, v EX nu b tnh r nhnh MEM ba dng

trong giai on IF v ID nu b tnh r nhnh EX hai dng

trong giai on IF nu b tnh r nhnh ID mt dng

o m bo rng cc lnh b xa khng nh hng ti trng thi my.

o Khi to li pipeline ch lnh r nhnh

xa, t trng m lnh ca thanh ghi pipeline IF/ID bng 0 (lm n tr thnh 1 lnh noop)

Gii quyt xung t bng cch gi thit kt qu r nhnh v tip tc.

on c r nhnh d on lu n lu n c r nhnh

o on c r nhnh lun cn 1 chu k dng (nu phn cng tnh r nhnh giai on ID)

o Cn phng php c trc (vo b m) lnh a ch ch.

V thit hi do r nhnh ang tng ln (vi cc pipeline su), m hnh d on r nhnh tnh s nh

hng ti hiu nng. Vi nhiu phn cng hn, c th th d on hot ng r nhnh ng lc

chng trnh c thc hin.

f. D on r nhnh ng

on r nhnh lc chy da trn cc thng tin chy (run-time information)

B d on 1 bit (Predict_bit)

o Gi s Predict_bit = 0 (Khng r nhnh)

o Nu ng, gi nguyn Predict_bit

o Nu sai, o li Predict_bit

B d on 2 bit

o C hiu qu hn d on 1 bit trong

trng hp r v khng r xen k

nhau.

TH A l la chn tt nht,

in c khe tr v gim I.

TH B v C, lnh sub cn sao

li, tng I.

TH B v C, phi m bo

thc hin lnh sub khng nh

hng khi khng r nhnh.


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CHNG IV: B NH - PHN CP B NH

Cc b theo thi gian

Nu mt v tr b nh c truy cp th n s sm c truy cp li

Lu cc d liu va c truy cp nhiu nht gn b x l

Cc b theo khng gian

Nu mt v tr b nh c truy cp th cc v tr c a ch gn s sm c truy cp

a cc khi b nh cha cc t cnh nhau n gn b x l hn


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I. KHI NIM

Khi (hoc ng): n v thng tin nh nht c (hoc khng c) trong b m lng thng tin

nh nht c di chuyn gia 2 b nh 2 mc lin tip trong phn cp.

T l trng (Hit Rate): T l s ln truy cp b nh tm thy 1 mc trong phn cp b nh

Thi gian trng (Hit Time): Thi gian truy cp mc b nh trong phn cp b nh

Thi gian truy cp 1 khi + Thi gian xc nh trng/trt

T l trt (Miss Rate): T l s ln truy cp b nh khng tm thy 1 mc trong phn cp b

nh = 1 - (Hit Rate)

Tn tht trt (Miss Penalty): Thi gian thay th 1 khi mc b nh bng khi tng ng

t mc b nh thp hn

Thi gian truy cp khi mc thp hn + Thi gian truyn khi n mc b nh c s

trt + Thi gian chn khi vo mc + Thi gian a d liu ti ni yu cu.

II. B M NH X TRC TIP

2 bit cui ca a ch xc nh byte trong block

2 bit gia ca a ch xc nh block nhiu t nh c kh nng c xp vo cng 1

block xc nh block ang cha t nh no, cn da vo trng tag

2 bit u ca a ch xc nh tag

Trng Valid xc nh d liu c hp l hay kh ng, trng ny l 1 bit

1. Cch xc nh HIT - MISS

T trng Block ca a ch Xc nh Block trn b m

Kim tra bit Valid

o Nu Valid = 0 D liu ko hp l MISS Cp nht d liu t b nh chnh vo

b m (ghi data vo v cp nht tag, a Valid ln 1). Kt thc.

o Nu Valid = 1 Tip tc

Kim tra trng Tag trn a ch v trn Block

o Nu khp HIT. Kt thc

o Nu khng khp MISS Cp nht d liu nh trn. Kt thc.


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2. B m nh x trc tip cc khi 1 t

Khng tn dng c tnh cc b v khng gian v mi ln ch cp nht 1 t.

3. B m nh x trc tip cc khi 4 t

V khi c 4 t nn trong a ch cn thm 1 trng Block offset xc nh ra 1 t trong 1 Block.

Tn dng c tnh cc b v khng gian v mi ln cp nht, 4 t lin tip c ghi vo b m.


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4. Bi ton xc nh kch thc b m

(Ty vo yu cu ca u bi m 1 s thng s cn thay i cho ph hp)

o a ch N bit

o Xc nh s khi (S dng trong b m) c dng 2n Cn n bit cho trng index

Kch thc d liu b m/Kch thc 1 khi

o Kch thc khi l 2m t Cn m bit cho trng Block offset

o Cn 2 bit cho trng Byte offset xc nh byte trong t

T cc d kin ny, tnh c s bit cn dng cho trng Tag

N (n+m+2)

Kch thc 1 dng trong B m c xc nh bi cc thnh phn:

o Kch thc phn d liu = 2m t = 2m+2 byte = 2m+2*8 bit

o Kch thc trng tag = N-(n+m+2)

o Tng kch thc cc bit ph (v d nh bit Valid) = x

Kch thc 1 dng l 2m+2*8 + N-(n+m+2) + x

Kch thc b m l (2m+2*8 + N-(n+m+2) + x)*S dng = (2m+2*8 + N-(n+m+2) + x)*2n

5. o hiu nng b m

Gi s thi gian truy cp b nh khi trng b m c bao gm trong 1 chu k thc hin thng

thng ca CPU th:

o S chu k MemStallC l tn tht trt l tng ca read-stalls v write-stalls

Read stall cycles = reads/program * read miss rate * read miss penalty

Write stall cycles = (writes/program * write miss rate * write miss penalty) + write buffer stalls

o Vi b m ghi xuyn, ta c cng thc n gin:

Memory stall cycles = accesses/program * miss rate * miss penalty

o Thi gian truy cp b nh trung bnh (Average Memory Access Time - AMAT) l thi gian

truy cp b nh khi tnh c 2 trng hp trng v trt b m.

AMAT = Time for a hit + Miss rate * Miss penalty


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III. B M KT HP N NG

Trng set trong a ch gip xc nh d liu trong nh c ghi vo set no, tuy nhin c th

thuc 1 trong n way (dng trng tag phn bit) Kh nng xut hin ca d liu cao hn

Tng c t l HIT

B m kt hp 4 ng


Page 41

MC LC

CHNG I: HIU NNG MY TNH ................................................................................................... 1

CHNG II: NGN NG MY TNH V PHP TON ................................................................... 2

I. BIU DIN S NGUYN .................................................................................................................... 2

1. Mt bit du v ln ......................................................................................................................... 2

2. M b 2 .............................................................................................................................................. 2

3. M lch .............................................................................................................................................. 2

II. BIU DIN S THC CHUN IEEE 754 ..................................................................................... 2

III. KIN TRC TP LNH.................................................................................................................... 3

1. Big Endian v Little Endian ........................................................................................................... 3

2. Kin trc RISC v CISC ................................................................................................................ 3

3. Ch a ch ................................................................................................................................. 3

4. Tp thanh ghi ca MIPS ................................................................................................................. 4

5. Kin trc tp lnh MIPS ................................................................................................................. 4

6. R format .......................................................................................................................................... 4

7. I format ........................................................................................................................................... 5

8. J format ........................................................................................................................................... 5

9. Tng hp cc lnh .......................................................................................................................... 6

IV. PHP TON V CCH THC HIN ............................................................................................. 6

1. Php ton dch v b dch............................................................................................................... 6

2. B cng Tr ................................................................................................................................. 7

3. B nhn......................................................................................................................................... 10

4. B chia .......................................................................................................................................... 17

5. Php ton vi du phy ng ....................................................................................................... 18

CHNG III : B X L ...................................................................................................................... 19

I. CC QU TRNH THC HIN ........................................................................................................ 19

1. Np lnh ....................................................................................................................................... 19

2. Gii m lnh ................................................................................................................................. 19

3. Thc hin lnh .............................................................................................................................. 19

II. B X L N XUNG NHP ......................................................................................................... 21

1. Lnh R .......................................................................................................................................... 22

2. Lnh STORE ................................................................................................................................ 23

3. Lnh LOAD .................................................................................................................................. 24


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4. Lnh r nhnh c iu kin .......................................................................................................... 25

5. Lnh nhy kh ng iu kin .......................................................................................................... 26

III. B X L A XUNG NHP .......................................................................................................... 26

IV. PIPELINE ......................................................................................................................................... 28

1. Khi nim chung .......................................................................................................................... 28

2. Thanh ghi trng thi Pipeline ....................................................................................................... 29

3. Xung t Pipeline ......................................................................................................................... 30

4. Gii quyt xung t Pipeline ........................................................................................................ 31

CHNG IV: B NH - PHN CP B NH .................................................................................. 36

I. KHI NIM ........................................................................................................................................ 37

II. B M NH X TRC TIP ....................................................................................................... 37

1. Cch xc nh HIT - MISS .......................................................................................................... 37

2. B m nh x trc tip cc khi 1 t .......................................................................................... 38

3. B m nh x trc tip cc khi 4 t .......................................................................................... 38

4. Bi ton xc nh kch thc b m ........................................................................................... 39

5. o hiu nng b m.................................................................................................................... 39

III. B M KT HP N NG ...................................................................................................... 40

MC LC .................................................................................................................................................. 41

daniel f.s_on tap kien truc may tinh

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