appendix - analyse and design a fsm

State Machine

Analysis

State Machine Analysis

Three basic steps:

Step 1: Determine the next-state and output functions F and G

Next state (Q+) = F (current state, input)

Output (Z) = G (current state, input) (Mealy style)

Output (Z) = G (current state) (Moore style)

Step 2: Use F and G to construct a state table for every possible combination of current state and input.

Step 3: Draw a state diagram that presents the information in a graphical form

State Machine Analysis (Mealy)

Example: Draw the State Diagram of the following circuit:

State Machine Analysis Step 1 (Mealy)

Z = X (QA + QB)

DA = XQA + XQB = X (QA + QB)

DB = XQA

QA+= DA

(D Flip-Flop) QB

+ = DB


Z = X (QA + QB)

Q+A = DA = X QA + X QB

= X (QA + QB)

Q+B = DB = X QA Current State

QA QB

Next State

Q+A Q+

B

X = 0 X = 1

Output

Z

X = 0 X = 1

0 0 0 1

1 0

1 1

0 0 0 0

0 0

0 0

0 1 1 1

1 0

1 0

0 1

1

1

0 0

0

0


Assign State name:

A = 00 (QAQB)

B = 01

C = 10

D = 11

Current State

QA QB

Next State

Q+A Q+

B

X = 0 X = 1

Output

Z

X = 0 X = 1

A B

C

D

A A

A

A

B

D

C

C

0 1

1

1

0

0

0

0 State Table


A

0/0 X/Z = 1/0

0/1

1/0

0/1

1/0

0/1

1/0

B

C D

State diagram

State Table

State Machine Analysis (Moore)

Example: Draw the State Diagram of the following circuit:

X1

Z

CK

J

Q

K

CLK

Q

X2

State Machine Analysis Step 1 (Moore)

Z = Q

K = X1 X

2

J = X1 X

2


Z = Q

K = X1 X

2

J = X 1 X

2

Input

X1 X2

CS

Q

FF inputs

J K

NS

Q +

Output

Z

0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1

1 0 1 0 1 0 1 0

1 1 0 0 0 0 1 1

1 1 1 1 1 1 0 0

1 0 0 0 0 0 1 1

Transition/Output Table


CS

(Q)

NS (Q+) X1X2 = 0 0 0 1 1 0 1 1

Output

(Z)

0

1

1

0

0

0

0

0

1

1

1

0

State Table

Assign State name:

A = 0 (Q)

B = 1

CS

(Q)

NS (Q+) X1X2 = 0 0 0 1 1 0 1 1

Output

(Z)

A

B

B

A

A

A

A

A

B

B

1

0


State Table

CS

(Q)

NS (Q+) X1X2 = 0 0 0 1 1 0 1 1

Output

(Z)

A

B

B

A

A

A

A

A

B

B

1

0

State diagram

State Machine

A

0/0 X/Z = 1/0

0/1

1/0 0/1

1/0

0/1

1/0

B

C D

State diagram

State Table

Mealy

State diagram

State Table

Moore

State Machine

Design

Design steps

1. Analyze the requirement of design

2. Find out the state table (or state diagram)

3. Minimize the number of states

4. State assignment (state encoding)

5. Make an excitation table for inputs of each FF (D-FF, T-FF, SR-

FF, JK-FF) and the output value of logic circuit.

6. Make the Output and Next state logic circuit (the combinational

circuit)

State Machine Design Step 1

Z=1: input sequence {101}

is received

Example: Design a sequence detector {101}

Step 1: Analyze the requirement of design

Input/ Output sequence example


Step 2: Find out the state table (or state diagram)

Input/ Output sequence example

State Table

Moore machine Mealy machine


Step 3: Minimize the number of states

Equivalent states are:

- states that have the same next states and that produce

the same output.

When two states are equivalent:

Reduce one by deleting one of them in state table

Replace the eliminated state by the same state in the lines

that it has existed in state table

Make the new state table after eliminating and replacing the

same state.



Present State

Next State Present Output

X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H I 0 0

E J K 0 0

F L M 0 0

G N P 0 0

H A A 0 0

I A A 0 0

J A A 0 1

K A A 0 0

L A A 0 1

M A A 0 0

N A A 0 0

P A A 0 0

Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H I 0 0

E J K 0 0

F L M 0 0

G N P 0 0

H A A 0 0

I A A 0 0

J A A 0 1

K A A 0 0

L A A 0 1

M A A 0 0

N A A 0 0

P A A 0 0

- H = I = K = M = N = P

- J = L

Example:



Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H I 0 0

E J K 0 0

F L M 0 0

G N P 0 0

H A A 0 0

I A A 0 0

J A A 0 1

K A A 0 0

L A A 0 1

M A A 0 0

N A A 0 0

P A A 0 0

Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H I 0 0

E J K 0 0

F L M 0 0

G N P 0 0

H A A 0 0

I A A 0 0

J A A 0 1

K A A 0 0

L A A 0 1

M A A 0 0

N A A 0 0

P A A 0 0

H

H

H H H

H = I = K = M = N = P



Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H I 0 0

E J K 0 0

F L M 0 0

G N P 0 0

H A A 0 0

I A A 0 0

J A A 0 1

K A A 0 0

L A A 0 1

M A A 0 0

N A A 0 0

P A A 0 0

H

H

H H H


Present State

X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H H 0 0

E J H 0 0

F L H 0 0

G H H 0 0

H A A 0 0

J A A 0 1

L A A 0 1

J

J = L




Present State

X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H H 0 0

E J H 0 0

F L H 0 0

G H H 0 0

H A A 0 0

J A A 0 1

L A A 0 1

J

Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H H 0 0

E J H 0 0

F J H 0 0

G H H 0 0

H A A 0 0

J A A 0 1

E D

- E = F

- D = G



Present State


X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C F G 0 0

D H H 0 0

E J H 0 0

F J H 0 0

G H H 0 0

H A A 0 0

J A A 0 1

E D


Present State

X=0 X=1 X=0 X=1

A B C 0 0

B D E 0 0

C E D 0 0

D H H 0 0

E J H 0 0

H A A 0 0

J A A 0 1


Step 4: State assignment (state encoding)

Every state is assigned by a combination of the state variables

Example: State Table State Assignment:

CS NS Output (Z)

X = 0 X = 1 X = 0 X = 1

S0 S1 S3 S4

S1 S3 S0 S4

S1 S4 S0 S0

0

0

0

1

0

0

0

0 CS

(Q1Q0)

NS (Q+1Q+

0) Output (Z)

X = 0 X = 1 X = 0 X = 1

S0 : 00 S1 : 01 S3 : 11 S4 : 10

01 11 00 10

01 10 00 00

0

0

0

1

0

0

0

0

S0 = 00 (Q1Q0)

S1 = 01

S3 = 11

S4 = 00


Step 5: make an output and excitation table

Excitation table

Suppose that T-FF is used

T = Q Q + + output and excitation table


Step 6: make the Output and Next state logic circuit

Suppose that T-FF is used Z = X. Q1.Q0

T1 = X.Q1 + Q0

T0 = Q1Q0 + X.Q0 + Q1Q0


Step 6: make the Output and Next state logic circuit

Z = X. Q1.Q0 T1 = X.Q1 + Q0 T0 = Q1Q0 + X.Q0 + Q1Q0

Any question?

appendix - analyse and design a fsm

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