cadence tutorial-ece219 li2

UCSB ECE 219 Prof. Patrick Yue

ECE 219 CMOS RFIC Design (2013)

Tutorial on Cadence Design Tools

Prof. Patrick Yue ([email protected])

In ECE 219, we will use Cadence tools to do transistor-level circuit design and simulation. Cadence provides a powerful integrated working environment for analog/digital/mixed-signal integrated circuit design, simulation, layout and verification. For more information, please refer to its official website: http://www.cadence.com. For the purpose of this course, we will only focus on those tools relevant to analog and RF integrated circuit design.

This tutorial will cover most of the features that is sufficient for you to finish ECE 219 homework assignments and design projects. It is divided into two parts:

Part I: Setting up your environment in ECI machine. Please carefully follow this section to start Cadence correctly, since various versions of Cadence currently co-exist in ECI machines.

Part II: We will go through an example to simulate the noise figure of a passive bridge-T attenuator, which is actually a question in homework #1. We will also talk about how to get more help from Cadence

For those of you who are already familiar with Cadence, you will still need to follow Part I.

Modified by Li Sun, Jan 2013 of 14

http://www.cadence.com/


Part I. Environment Setup

1. First of all, you need to have an ECI account at https://accounts.engr.ucsb.edu/create_account.php

2. type the command to use enhanced version of the C shell

>tcsh

3. Create a directory where you want to save your work, for example, ece219:

>mkdir ece219

4. Enter the directory you just created:

>cd ece219

5. Copy necessary files to the directory you just created: >cp /eci/tech/ECE594/setting/log018.scs ./>cp /eci/tech/ECE594/setting/tsmc018.scs ./>cp /eci/tech/ECE594/setting/.cdsinit ./>cp /eci/tech/ECE594/setting/.cdsenv ./

6. Download three files to the directory you just created from our website: .cshrc .cshrc_219 cds.lib

7. Run the following two commands

> source .cshrc_219> source .cshrc(You may see some warning information, please just ignore

them.)> setenv CDS_HOME /ece/cadence/IC5141> set path = ($path $CDS_HOME/tools/bin

$CDS_HOME/tools/dfII/bin)

8. Run this command to start Cadence

> icfb &

9. Wait for a while, and the CIW window of Cadence should pop up. If not, please check if you have followed the above procedures.

10. Next time when you plan to run Cadence, simply repeat 2, 4, 7, and 8


https://accounts.engr.ucsb.edu/create_account.php%20


You can find all devices (transistors, resistors, capacitors and inductors etc.) needed in a standard device library called “analogLib”, which is provided by Cadence. For transistors, you will need device models. The models we are going to use in this class come from TSMC-0.18μm CMOS process. You should copy the model file “tsmc018.scs” along with the libiary file “cds.lib” to your working directory (i.e., ece219 in above example). It contains several sections to account for different process corners. We will use the typical process parameters, so you need to specify section “tt” when you set up model libraries for the simulation later on in Cadence.

One example library (EXAMPLE_ECE219) has already been added, so you can use it to run directly.

** Please keep in mind that you have signed the MOSIS Non-Disclosure Agreement in order to access the technology file. So, you are not allowed to share this file with anyone else. **

11. When you first log into the Library Manager, you will need to create your own working library. For some of you who cannot create library, this is an issue due to the build-in NCSU library. There is a straight way to solve this issue, as shown below: (1) From the menu of CIW: ToolsLibrary Manager(2) A window will pop up, as below:



(3) From the menu of Library Manager: Edit Library Path. A window will pop up as below:

Please type in the name and path of library you want to create (Please note that to replace the path to your OWN one)

You may need to refresh the Library Manager (View Refresh) so as to see the new library you just created



Part II. An Example

In this section, we will find the noise figure of a bridge-T passive attenuator, and briefly introduce how to get help from Cadence documentations.

1. As Cadence is running, in the CIW (Command Interpreter Window), click “File > Open…” in the menu bar.

Figure 1. Cadence CIW window

2. The “Open File” window will pop up. Select “Library Name” as “test”, and choose “bridge-T” as “Cell Name” from the list at the right side. Make sure “View Name” is “schematic”. Click “OK”.

Figure 2. Open File Window from CIW



3. The “Virtuoso Schematic Editing” window will appear, and you will see a bridge-T passive attenuator, which simply consists of three resistors. There are also two additional instances “PORT0” and “PORT1”.

Figure 3. Virtuoso Schematic Editing Window

4. Here are some basic schematic editing shortcuts you should know: To select an instance, simply point and click on it. To insert a new instance, press “i” and you will see a new window named “Add Instance” (Figure 4). Fill in proper “Library”, “Cell” and “View” names, and click on the schematic window, you finish to insert a new instance, and you can press “Esc” to close “Add Instance” window. To delete the instance, first select it and then press “d”. To change the properties of the instance, first select it and then press “q”; an “Edit Object Properties” window (Figure 5) will open, and you can modify the properties of the instance. To copy an instance, first select it, press “c”, and then click in a blank area in the window. To rotate an instance, first press “r” and then click it. To flip an instance, first select it, press “m”, and then press “R”. To wire the devices together, press “w” and click the two points you want to connect. To undo what you have done, press “u”. All of these commands can be found in the “Edit” menu. These shortcuts are summarized in Table 1.



Figure 4. Add Instance Window

Table 1. Commonly-used Shortcuts for Schematic Editing

Shortcut (keyboard) Actioni insert new instanced delete instanceq modify the properties of an instancec copy an instancer rotate an instance

m + R flip an instancew connect two nodesu undo

parameterized components: use pPar("CDF_parameter_name") in the properties form for the parameter. For example, parameterize the gate width with W=pPar("wp").When Create Cellview-From Cellviewis used, the symbol will contain this parameter, which can be adjusted in the the parent cell. If the cell is used as a top level cell, the parameter can be specified by adding a user property to the EditPropertiesCellview... dialog box to give the parameter a value. Passing design variables from Analog Artist to components in Composer



in Composer, use a string for the parameter that you wish to vary. For example, specify the width of a transistor to be "wp".

in Analog Artist, go to Variables®Edit... and enter each variable and its value. You can also use Variables®Copy from Cellview to copy any unlisted variable in the schematic to the Design Variable pane.

look under the Analog Artist section to see how to sweep variables (Parametric Analysis)

Figure 5. Edit Object Properties Window from Virtuoso5. Let’s go back to the “Virtuoso Schematic Editing” window. In the menu

bar, click “Tools > Analog Environment”, and a new window called “Cadence Analog Design Environment” will appear.



Figure 6. Cadence Analog Design Environment Window

6. In the menu bar, click “Setup > Model Libraries …”. Another window called “Model Library Setup” pops up. Click “browse” button, and you will see a new window similar to a file browser. Choose “tsmc018.scs”, and click “OK”. The browser closes and we return to the “Model Library Setup” window. Don’t forget to fill “tt” in the “Section (opt.)” field! Click “Add”, and then click “OK”. The “Model Library Setup” window closes and we return to “Cadence Analog Design Environment” window. By the way, we actually don’t need any device model for this example, since we only use ideal resistors and ports. However, you certainly will need this step in most of your home assignments and design projects.



Figure 7. Model Library Setup Window

7. Now we are in “Cadence Analog Design Environment” window. Click “Analyses > Choose …” in the menu bar, and “Choosing Analyses” window will appear. Check “sp” in the “Analysis” list. You will see the content of the lower half window changes as you choose different analyses. Now, we are going to setup the parameters for an “S-Parameter Analysis”. Click “Select” button in the “Ports” field, and then click on instances “PORT0” and “PORT1” in the “Virtuoso Schematic Editing” window. Press “Esc” before you return to “Choosing Analyses” window. You now should see the “Ports” has been filled with “/Port0 /Port1” as shown in Figure 8. Select “Sweep Variable” as “Frequency”. Select “Sweep Range” as “Start-Stop”, and fill “Start” and “Stop” with “1k” and “1G”, respectively. This means we will sweep the frequency range from 1-kHz to 1-GHz. Choose “Sweep Type” as “Logarithmic” from the drop-list, check “Points Per Decade”, and fill the blank field with “100”. Check “yes” for “Do Noise”. Select “Output port” by first clicking “Select” button and then in the schematic window clicking “PORT1”. Do the same to select “Input port” as “PORT0”. The finished “Choosing Analysis” window will look as that shown in Figure 8. Finally, click “OK”.



Figure 8. Choosing Analysis Window



8. Now, we return to “Cadence Analog Design Environment” window. At the right side of the window, you will find a column of buttons. Click the one like a traffic signal with green light. The function of the button will show up as you place your mouse on it. So, as you can see, we are going to “Netlist and Run” the simulation. Wait for a second, Cadence will first generate the netlist of the circuit and then run the simulation. As the simulation is running, a new window (Figure 9) pops up and let you know the progress of the simulation. It won’t take a long time to finish, and you can look for such a sentence in the CIW window:

“simulation completed successfully.”

Figure 9. Output Log Window



9. Going to “Cadence Analog Design Environment” window, in the menu bar, choose “Results > Direct Plot > Main From …”. A “Direct Plot Form” window will pop up. Check “NF” from the list of the “Function”. Check “dB10” as the “Modifier”. Click “Plot” button. A new “Waveform” window will appear, and the noise figure of the bridge-T attenuator against the frequency will be plot in this window.

Figure 10. Direct Plot Form Window

Now, we finish our simple example. In fact, all of above procedures can be found in Cadence help documentation. In the CIW window, click “Help > Cadence documentation” at the upper right hand corner. After waiting for a while, you will see a new window. Choose “Docs by Product” in the second pop-up menu. Search for “Spectre RF”. Double click on “Table of Contents” and a web-browser will open*. Look for the chapter of “Simulating Low noise amplifier”, and look at the section of “Linear Two-Port Noise Analysis with S-Parameters”. You will find what we just discussed to do a noise-figure analysis. “Spectre RF



User Guide” contains all aspects of RF IC simulation, and the best of all, it has step-by-step examples to help you to simulate LNA, Mixed, VCO etc.

*If the html version of the help page does not work, see the follow instructions to directly view the manual in PDF format.

To get more help

In this class, we will focus on using SpectreRF to simulate various RF circuits, in particular, LNAs, mixers, and VCOs. You can go through a step-by-step tutorial for each of these circuits by following the SpectreRF manual. Run acoread to view the following file:

/eci/ECE594/cadence/ic5141/doc/spectreRF/spectreRF.pdfIn the Table of Content, click on “Simulating Low-Noise Amplifiers”, “Simulating Mixers”, and “Simulating VCOs”. Go through each of the exercises one by one and you will become familiar with the tool.


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