april 28th, 2011timing workshop, chicago paul scherrer institute the role of analog bandwidth and...
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April 28th, 2011Timing Workshop, Chicago
Paul Scherrer Institute
The role of analog bandwidth and signal-to-noise in timing for waveform digitizing
Stefan Ritt
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Timing measurement
How can we measure timing in an optimal system?
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
The ideal digitized signal
•No noise•Always same height•Derive time from thresholdcrossing with interpolation
•No noise•Always same height•Derive time from thresholdcrossing with interpolation
Threshold
Timing determined by “aperture jitter”Timing determined by “aperture jitter”
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Aperture jitter
Datasheet AD9222 (Analog Devices)
PLL
Switched CapacitorArray
Switched CapacitorArray
Flash ADCFlash ADC
• Determined by write switch jitterplus inverter jitter
• Measurements indicate typicalvalue 2-5 ps for current designs
• Determined by write switch jitterplus inverter jitter
• Measurements indicate typicalvalue 2-5 ps for current designs
• Data sheet: <1ps• Measured indirectly though
side-band of sine signal• AD Application Note AN501:
50fs (clk) + 190fs (ADC)
• Data sheet: <1ps• Measured indirectly though
side-band of sine signal• AD Application Note AN501:
50fs (clk) + 190fs (ADC)
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Aperture jitter of clock distribution
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
The varying digitized signal
•Signals with different amplitudetrigger at different times(“time walk”)
•Signals with different amplitudetrigger at different times(“time walk”)
Upper threshold
•Time walk correction•Multi-level threshold•Constant-fraction discrimination
•Time walk correction•Multi-level threshold•Constant-fraction discrimination
Lower threshold
J.-F. Genat et al., arXiv:0810.5590 (2008)
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Effects of analog BW
How does the analog bandwidth affect the timing ?
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Realistic signal with noise
voltage noiseband of signal
timing jitter arising from voltage noise
timing jitter is much smallerfor fasterrise-time
Effect of rise timeEffect of rise time
Noise
Timing
Noise affects timing!Noise affects timing!
Nyquist-Shannon Theorem
If a function x(t) contains no frequencies higher than F Hertz, it is completely determined by giving its ordinates at a series of points spaced 1/2F seconds apart.
• If a detector produces frequencies up to 500 MHz (0.6 ns rise time), all information from that detector is recorded if sampled at 1 GSPS with good enough signal-to-noise (SNR) ratio
• Sampling speed above Nyquist adds redundant points which improve the SNR
Nyquist-Shannon fulfilledNyquist-Shannon fulfilled Nyquist-Shannon not fulfilledNyquist-Shannon not fulfilled
Does higher sampling speed help?
11.04.23PSI,
• Higher sampling speed adds only redundant points if Nyquist is fulfilled
• If noise comes from chip → reduce noise √2• Equivalent to double sampling of points
• Higher sampling speed adds only redundant points if Nyquist is fulfilled
• If noise comes from chip → reduce noise √2• Equivalent to double sampling of points
=
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
How is timing resolution affected?
voltage noise u
timing uncertainty tsignal height U
rise time tr
dBss
r
sr
rrr
ffU
u
f
t
U
u
ft
t
U
ut
nU
ut
U
ut
33
1
number of samples on slope
dBr ft
33
1
Simplified estimation!Simplified estimation!
€
uΔt=U
tr
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
How is timing resolution affected?
dBs ffU
ut
33
1
U u fs f3db t100 mV 1 mV 2 GSPS 300 MHz ∼10 ps
1 V 1 mV 2 GSPS 300 MHz 1 ps
100 mV 1 mV 20 GSPS 3 GHz 0.7 ps
1V 1 mV 10 GSPS 3 GHz 0.1 ps
today:
optimized SNR:
next generation:
includes detector noise in the frequency region of the rise time
and aperture jitter
next generationoptimized SNR:
How to achieve this?
Assumes zeroaperture jitter
Stefan Ritt
• S/N ratio goes linearly into timing resolution!• Analog BW and sampling speed will soon hit some “hard” limits
(3-5 GHz, ~20 GSPS)• Preamplifier makes sense if detector noise is smaller than SCA
internal noise• In the end, higher timing resolution will be the battle of noise
→ Eric’s talk tomorrow
Effect of S/N
April 28th, 2011Timing Workshop, Chicago
PCB
Det. f SCA ADC€
S /N =(S * f )2
(Nsource * f )2 +NSCN
2
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
What limits the BW?
Which are the crucial points in the signal chain?
Stefan Ritt
PCB
April 28th, 2011Timing Workshop, Chicago
• Detector (covered in next talks)• Connector (LEMO connector has a BW of ∼500 MHz)• Cable (RG58: 5 m has a -3db BW of 1 GHz)• PCB• Preamplifier• Chip package• On-chip bus• Analog cell switch• Storage capacitor
Signal Chain
Det.Chip
€
f3db =1
2πRC
Cpar
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Amplifier
Cpar
750 MHz750 MHz
∼40pF
Stefan Ritt April 28th, 2011Timing Workshop, Chicago
Effects from the chip
→ Tomorrow’s talk
Stefan Ritt
Conclusions
April 28th, 2011Timing Workshop, Chicago
Optimize BW of
detector
Optimize BW of
transmission
Optimize S/N for
digitization
Fit digitization
B/W to signal
Fulfill Nyquist-Shannon
dBs ffU
ut
33
1