a petri net model for hardware software codesign

Design Automation for Embedded Systems, 4, 243–310 (1999)c© 1999 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.

A Petri Net Model for Hardware/Software Codesign

PAULO MACIELDepartamento de Informatica Universidade de Pernambuco CEP. 50732-970, Recife, Brazil

EDNA BARROSDepartamento de Informatica Universidade de Pernambuco CEP. 50732-970, Recife, Brazil

WOLFGANG ROSENSTIELFakultaet fuer Informatik Universitaet Tuebingen D-7207 Tuebingen, Germany

Abstract. This work presents Petri nets as an intermediate model for hardware/software codesign. The mainreason of using of Petri nets is to provide a model that allows for formal qualitative and quantitative analysisin order to perform hardware/software partitioning. Petri nets as an intermediate model allows one to analyzeproperties of the specification and formally compute performance indices which are used in the partitioningprocess. This paper highlights methods of computing load balance, mutual exclusion degree and communicationcost of behavioral description in order to perform the initial allocation and the partitioning. This work is alsodevoted to describing a method for estimating hardware area, and it also presents an overview of the generalpartitioning method considering multiple software components.

Keywords: Petri nets, hardware/software codesign, quantitative analysis, estimation

1. Introduction

Because of the growing complexity of digital systems and the availability of technologies,nowadays many systems are mixed hardware/software systems. Hardware/software code-sign is the design of systems composed of two kinds of components: application specificcomponents (often referred to ashardware) and general programmable ones (often referredto assoftware).

Although such systems have been designed ever since hardware and software first cameinto being, there is a lack of CAD tools to support the development of such heterogeneoussystems. The progress obtained by the CAD tools at the level of algorithm synthesis,the advance in some key enabling technologies, the increasing diversity and complexityof applications employing embedded systems, and the need for decreasing the costs ofdesigning and testing such systems all make techniques for supporting hardware/softwarecodesign an important research topic [21, 22, 23, 24, 25].

The hardware/software codesign problem consists in implementing a given system func-tionally in a set of interconnected hardware and software components, taking into accountdesign constraints.

In the case where an implementation on a microprocessor (software component), cheapprogrammable component, does not meet the timing constraints [2], specific hardwaredevices must be implemented. On the other hand, to keep cost down, an implementation ofcomponents in software should be considered.

244 MACIEL, BARROS, AND ROSENSTIEL

Furthermore, a short time-to-market is an important factor. The delay in product launchingcauses serious profit reductions, since it is much simpler to sell a product if you have littleor no competition. It means that facilitating the re-use of previous designs, faster designexploration, qualitative analysis/verification in an early phase of the design, prototyping, andthe reduction of the required time-to-test reduce the overall time required from a specificationto the final product.

One of the main tasks when implementing such systems is the partitioning of the descrip-tion. Some partitioning approaches have been proposed by De Micheli [20], Ernst [18],Wolf [4] and Barros [17].

The hardware/software cosynthesis method developed by De Micheli et al. considers thatthe system-level functionality is specified with Hardware as a set of interacting processes.Vulcan-IIpartitions the system into portions to be implemented either as dedicated hardwaremodules or as a sequence of instructions on processors. This choice must be based on thefeasibility of satisfaction of externally imposed data-rate constraints. The partitioning iscarried out by analyzing the feasibility of partitions obtained by gradually moving hardwarefunctions to software. A partition is considered feasible when it implements the originalspecification, satisfying performance indices and constraints. The algorithm is greedy andis not designed to find global minimums.

Cosymais a hardware/software codesign system for embedded controllers developed byErnst et al. at University of Braunschweig. This system uses a superset of C language, calledC∗, where some constructors are used for specifying timing constraints and parallelism.The hardware/software partitioning inCosymais solved with simulated annealing. Thecost function is based on estimation of hardware and software runtime, hardware/softwarecommunication time and on trace data. The main restriction of such a partitioning methodis that hardware and software parts are not allowed for concurrent execution.

The approach proposed by Wolf uses an object-oriented structure to partition functionalityconsidering distributed CPUs. The specification is described at two levels of granularity.The system is represented by a network of objects which send messages among themselves toimplement tasks. Each object is described as a collection of data variables and methods. Thepartitioning algorithm splits and recombines objects in order to speed up critical operations,although the splitting is only considered for the variable sets and does not explore the codesections.

One of the challenges of hardware/software partitioning approaches is the analysis of agreat varity of implementation alternatives. The approach proposed by Barros [14, 17, 16,15] partitions a description into hardware and software components by using a clusteringalgorithm, which considers the distinct implementation alternatives. By considering aparticular implementation alternative as the current one,clustering is carried out. Theanalysis of distinct implementation alternatives in the partitioning allows for the choice ofa good implementation with respect to time constraints and area allocation. However, thismethod does not present a formal approach for performing quantitative analysis, and onlyconsiders a single processor architecture.

Another very important aspect is the formal basis used in each phase of the design process.Layout models have a good formal foundation based on set and graph theory since this dealswith placement and connectivity [94]. Logic synthesis is based on boolean algebra because

A PETRI NET MODEL 245

most of the algorithms deal with boolean transformation and minimization of expressions[95]. At high-level synthesis a lot of effort has been applied to this topic [96, 97, 98].However, since high-level synthesis is associated to a number of different areas, varyingfrom behavioral description to metric estimation, it does not have a formal theory of itsown [9]. Software generation is based on programming languages which vary from logicalto functional language paradigms. Since hardware/software codesign systems take intoaccount a behavioral specification in order to provide a partitioned system as input for high-level synthesis tools and software compilers, they must consider design/implementationaspects of hardware and software paradigms. Therefore, a formal intermediate format ableto handle behavioral specification that would also be relevant to hardware synthesis andsoftware generation is an important challenge.

Petri nets are a powerful family of formal description techniques able to model a largevariety of problems. However, Petri nets are not only restricted to design modeling. Severalmethods have been developed for qualitative analysis of Petri net models. These methods[28, 29, 37, 26, 27, 30, 31, 1] allow for qualitative analysis of properties such as deadlockfreedom, boundedness, safeness, liveness, reversibility and so on [42, 37, 87, 39].

This work extends Barros’s approach by considering the use of timed Petri nets as aformal intermediate format [61, 59] and takes into account a multi-processor architecture.In this work, the use of timed Petri nets as an intermediate format is mainly for computingmetrics such as execution time, load balance [72], communication cost [70, 69], mutualexclusion degree [73] and area estimates [75]. These metrics guide the hardware/softwarepartitioning.

The next section is an introduction to the PISH codesign methodology. Section 3 in-troduces the description language adopted. Section 4 describes the hardware/softwarepartitioning approach. Section 5 is an introduction to Petri nets [1, 64, 56, 58]. Section 6presents the occam-time Petri net translation method [64, 59, 61, 62, 40]. Section 7 de-scribes the approach adopted for performing qualitative analysis. A method for computingcritical path time, minimal time and the likely time based on structural Petri net methodsis presented in Section 8. Section 9 presents the extended model and an algorithm for esti-mating the number of processors needed. Section 10 describes the delay estimation methodadopted in this work. Sections 11, 12, 13 and 14 describe methods for computing com-munication cost, load balance, mutual exclusion degree and area estimates, respectively.Section 15 presents an example and finally some conclusions and perspectives for futureworks follow.

2. The PISH Co-Design Methodology: An Overview

The PISH co-design methodology being developed by a research group at Universidadede Pernambuco, uses occam as its specification language and comprises all phases of thedesign process, as depicted in Figure 1. The occam specification is partitioned into a setof processes, where some sets are implemented in software and others in hardware. Thepartitioning is carried out in such a way that the partitioned description is formally proved tohave the same semantics as the original one. The partitioning task is guided by the metricscomputed in the analysis phase. Processes for communication purposes are also generated


Figure 1. PISH design flow.

in the partitioning phase. A more detailed description of the partitioning approach is givenin Section 4.

After partitioning, the processes to be implemented in hardware are synthesized and thesoftware processes are compiled. The technique proposed for software compilation is alsoformally verified [93]. For hardware synthesis, a set of commercial tools has been used. Firstsystem prototype has been generated by using two distinct prototyping environments: TheHARP board developed by Sundance and a transputer plus FPGAs boards, both connectedthrough a PC bus. Once the system is validated, either the hardware components or thewhole system can be implemented as an ASIC circuit. For this purpose, layout synthesistechniques for Sea-of-gates technology have been used [94].

3. A Language for Specifying Communicating Processes

The goal of this section is to present the language which is used both to describe the appli-cations and to reason about the partitioning process itself. This language is a representativesubset of occam, defined here by the BNF-style syntax definition showed below, where[clause] has the usual meaning of an optional item.

The optional argumentrep stands for a replicator. A detailed description of these con-structors can be found in [62]. This subset of occam has been extended to consider twonew constructors:BOX andCON. The syntax of these constructors isBOX P andCONP, whereP is a process. These constructors have no semantic effect. They are just anno-tations, useful for the classification and the clustering phases. A process included withina BOX constructor is not split and its cost is analyzed as a whole at the clustering phase.The constructorCON is an annotation for a controlling process. Those processes act as aninterface between the processes.


Theoccamsubset is described inBNF format:

P: := SKIP‖STOP‖x:= e nop, deadlock and assignment

‖ ch?x ‖ ch!e input and output

‖IF(c1 p1, . . . , cn pn) ‖ALT(g1 p1, . . . , gn pn) conditional and non-deterministicconditional

‖SEQ(p1, . . . , pn)‖PAR(p1, . . . , pn) sequential and parallel combiners

‖WHILE(cP) while loop

‖VAR x: P variable declaration

‖CHAN ch: P channel declaration

Occam obeys a set of algebraic laws [62] which defines its semantics. For example, thelawsPAR(p1, p2) = PAR(p2, p1)andSEQ(p1, p2, . . . , pn) = SEQ(p1,SEQ(p2, . . . , pn))

define the symmetry of the PAR constructor and the associativity of the SEQ constructor,respectively.

4. The Hardware/Software Partitioning

Due to the computational complexity of optimum solution strategies, a need has arisen fora simplified, suboptimum approach to the partitioning system.

In [20, 14, 18, 10, 11] some heuristic algorithms to the partitioning problem are presented.Recently, some works [12, 13] have suggested the use of formal methods for the partitioningprocess. However, although these approaches use formal methods to hardware/softwarepartitioning, neither of them includes a formal verification that the partitioning preservesthe semantics of the original description.

The work reported in [16] presents some initial ideas towards a partitioning approachwhose emphasis is correctness. This was the basis for the partitioning strategy presentedhere. As mentioned, the proposed approach uses occam [62] as a description languageand suggests that the partitioning of an occam program should be performed by applying aseries of algebraic transformations into the program. The main reason to use occam is that,being based on CSP [60], occam has a simple and a elegant semantics, given in terms ofalgebraic laws. In [63] the work is further developed, and a complete formalization of oneof the partitioning phases, the splitting, is presented.

The main idea of the partitioning strategy is to consider the hardware/software partition-ing problem as a program transformation task, in all its phases. To accomplish this, anextended strategy to the work proposed in [16] has been developed, adding new algebraictransformation rules to deal with some more complex occam constructors such as replica-tors. Moreover, the proposed method is based on clustering and takes into account multiplesoftware components.

The partitioning method uses Petri nets as a common formalism [41] which allows for aquantitative analysis in order to perform the partitioning, as well as the qualitative analysisof the systems so that it is possible to detect errors in an early phase of the design [33].


Figure 2. Task diagram.

4.1. The Partitioning Approach: An Overview

This section presents an overview of our proposed partitioning approach. The partitioningmethod is based on clustering techniques and formal transformations; and it is guided bythe results of the quantitative analysis phase [61, 69, 70, 72, 73, 75]. The task-flow of thepartitioning approach can be seen in Figure 2. This work extends the method presentedin [15] by allowing to take into account a more generic target architecture. This mustbe defined by the designer by using the architecture generator, a graphical interface forspecifying the number of software components, their interconnection as well as the memoryorganisation. The number and architecture of each hardware component will be definedduring the partitioning phase.

The first step in the partitioning approach is the splitting phase. The original descriptionis transformed into a set of concurrent simple processes. This transformation is carried outby applying a set of formal rewriting rules which assures that the semantics is preserved[63]. Due to the concurrent nature of the process, communication must be introduced


among sequential data dependent processes. The split of the original description in simpleprocesses allows a better exploration of the design space in order to find the best partitioning.

In the classification phase, a set of implementation alternatives is generated. The setof implementation alternatives is represented by a set of class values concerning somefeatures of the program, such as degree of parallelism and pipeline implementation. Thechoice of some implementation alternative as the current one can be made either manuallyor automatically. When choosing automatically, the alternatives lead to a balanced degreeof parallelism among the various statements and the minimization of the area-delay costfunction.

Next, the occam/timed Petri net translation takes place. In this phase the split program istranslated into a timed Petri net.

In the qualitative analysis phase, a cooperative use of reduction rules, matrix algebraapproach and reachability/coverability methods is applied to the Petri net model in orderto analyze the properties of the description. This is an important aspect of the approach,because it allows for errors to be detected in an early phase of the design and, of course,decreases the design costs [33].

After that, the cost analysis takes place in order to find a partition of the set of processes,which fulfills the design constraints. In this work, the quantitative analysis is carried outby taking into account the timed Petri net representation of the design description, which isobtained by a occam/timed Petri net translation tool. Using a powerful and formal modelsuch as Petri nets as intermediate format allows for the formal computation of metricsand for performing a more accurate cost estimation. Additionally, it makes the metricscomputation independent of a particular specification language. In the quantitative analysis,a set of methods for performance, area, load balance and mutual exclusion estimation havebeen developed in the context of this work. The results of this analysis are used to reasonabout alternatives for implementing each process.

After this, the initial allocation takes place. The term initial allocation is used to describethe initial assignment of one process to each processor. The criteria used to performthe initial allocation is the minimization of the inter-processor communication, balancingof the workload and the mutual exclusion degree among processes. One of the mainproblems in systems with multiple processors is the degradation in throughput causedby saturation effects [68, 66]. In distributed and multiple processor systems [65, 67], itis expected that doubling the number of processors would double the throughput of thesystem. However, experience has showed that throughput increases significantly only forthe first few additional processors. Actually, at some point, throughput begins to decreasewith each additional processor. This decrease is mainly caused by excessive inter-processorcommunication. The initial allocation method is based on a clustering algorithm.

In the clustering phase, the processes are grouped in clusters considering one implemen-tation alternative for each process. The result of the clustering process is an occam descrip-tion representing the obtained clustering sequence with additional information indicatingwhether processes kept in the same cluster should be serialized or not. The serialization leadsto the elimination of the unnecessary communication introduced during the splitting phase.

A correct partitioned description is obtained after the joining phase, where transformationrules are applied again in order to combine processes kept in the same cluster and to eliminate


communication among sequential processes. In the following each phase of the partitioningprocess is explained with more detail.

4.2. The Splitting Strategy

As mentioned, the partitioning verification involves the characterization of the partitioningprocess as a program transformation task. It comprises the formalization of the splittingand joining phases already mentioned.

The goal of the splitting phase is to permit a flexible analysis of the possibilities for com-bining processes in the clustering phase. During the splitting phase, the original descriptionis transformed into a set of simple processes, all of them in parallel. Since in occam PARis a commutative operator, combining processes in parallel allows an analysis of all thepermutations. The simple processes obey the normal form given below.

chanch1, ch2, . . . , chn: PAR(P1, P2, . . . , Pk)

where eachPi , 1< i < k is a simple process.

Definition 4.1 (Simple Process). A processP is defined as a simple if it is primitive(SKIP,STOP, x:= e, ch?x, ch! e), or has one of the following forms: (i.) ALT(b,&gkck:=true) (ii.) IF(bkck:= true) (iii.) BOX Q, HBOX QandSBOX Q, whereQ is an arbitraryprocess. (iv.) IF(c Q,TRUE SKIP) whereQ is primitive or a process as in (i), (ii) or (iii).(v.), whereQ is simple and are communication commands, possibly combined in sequenceor in parallel. (vi.) WHILEc Q, whereQ is simple. (vii.) VAR x: Q, whereQ is simple.(viii.) CON Q, whereQ is simple.

This normal form expresses the granularity required by the clustering phase and thistransformation permits a flexible analysis of the possibilities for combining processes inthat phase. In [63] a complete formalization of the splitting phase can be found.

To perform each one of the splitting and joining phases, a reduction strategy is necessary.The splitting strategy developed during the PISH project has two main steps.

1. the simplification IF and ALT processes

2. the parallelisation of the intermediary description generated by Step 1.

The goal of Step 1 is to transform the original program into one in which all IFs and ALTsare simple processes. To accomplish this, occam laws have been applied. Two of theserules can be seen in Figure 3. The Rule 4.1.1 deals with conditionals. This rule transformsan arbitrary conditional into a sequence of IFs, with the aim to achieve the granularityrequired by the normal form. The application of this rule allows a flexible analysis of eachsub-process of a conditional in the clustering phase.

Note that the role of the first IF operator on the right-hand side of the rule above is to makethe choice and to allow the subsequent conditionals to be carried out in sequence. This iswhy the fresh variables are necessary. Otherwise, execution of one conditional can interfere


Figure 3. Two splitting rules.

in the condition of a subsequent one. After Step 1, all IFs and ALTs processes are simple,but not necessarily PAR, SEQ and WHILE processes. To be simple, the sub-process of aconditional is either a primitive process or can include only ALT, IF and BOX processes.Rule 4.1.2 distributes IF over SEQ and guarantees that no IF will include a SEQ operatoras its internal process.

Figure 4. Splitting rule.


The goal of Step 2 is to transform the intermediate description generated by Step 1 intoa simple form stated by the definition given above where all processes are kept in parallel.This can be carried out by using four additional rules. Rule 2 is an example of these rules,which puts in parallel two original sequential processes.

In this rule,z is a list of local variables ofSE Q(P1, P2), x1 is a list of variables used andassigned inPi andx′i is a list of variables assigned inPi . Assigned variables must be passedbecause one ofPi may have a conditional command including an assignment that may ornot be executed.

The process annotated with the operator CON is a controlling process, and this operatorhas no semantic effect. It is useful for the clustering phase. This process acts as aninterface between the processes under its control and the rest of the program. Observethat the introduction of local variables and communication is essential, because processescan originally share variables (the occam language does not allow variable sharing betweenparallel processes). Obviously, there are other possible forms of introducing communicationthan that expressed in Rule 2. This strategy, however, allows for having control of theintroduced communication, which makes the joining phase easier.

Moreover, although it may seem expensive to introduce communication into the system,this is really necessary to allow a complete parallelisation of simple processes. The joiningphase must be able to eliminate unnecessary communication between final processes. Afterthe Step 2, the original program has been transformed into a program obeying the normalform.

4.3. The Partitioning Algorithm

The technique for hardware/software process partitioning is based on the approach proposedby Barros [14, 15], which includes a classification phase followed by clustering of processes.These phases will be explained with more detail in this section. The considered versionof such an approach did not cope with hierarchy in the initial specification, and only fixedsize loops had been taken into account in the cost analysis. Additionally, the underlyingarchitecture template considered only one software component (i.e. only one microprocessoror microcontroller), which limits the design space exploration. This work addresses someof these lacks by using Petri nets as an intermediate format, which support abstractionconcepts and provide a framework for an accurate estimation of communication, area anddelay cost, as well as load balance and mutual exclusion between processes. Additionally,the partitioning can taken into account more complexes architectures, which can be specifiedby the designer through a graphical environment. The occam/Petri net translation methodand the techniques for a quantitative analysis will be later explained, respectively.

4.3.1. Classification

In this phase a set of implementation possibilities represented as values of predefinedattributes is attached to each process. The attributes were defined in order to capture thekind of communication performed by the process, the degree of parallelism inside the


Figure 5. Classification and clustering phases.

process (PAR and REPPAR constructors), whether the assignments in the process couldbe performed in pipeline (in the case of REPSEQ constructor) and the multiplicity of eachprocess. As an example, Figure 5a illustrates some implementation alternatives for theprocess, which has a REPPAR constructor. Concerning distinct degrees of parallelism, allassignments inside this process can be implemented completely parallel, partially parallelor completely sequential.

Although a set of implementation possibilities is attached to each process, only one istaken into account during the clustering phase and the choice can be done automaticallyor manually. In the case of an automatic choice, a balance of the parallelism degree of allimplementations is the main goal.

4.3.2. The Clustering Algorithm

Once a current alternative of implementation for each process has been chosen, the clusteringprocess takes place. The first step is the choice of some process to be implemented in thesoftware components. This phase is called initial allocation [74] and may be controlled bythe user or may be automatically guided by the minimization of a cost function. Takinginto account the Petri net model, a set of metrics is computed and used for allocating


one process to each available software component. The allocation is a very critical task,since the partitioning of processes in software or hardware clusters depends on this initialallocation. The developed allocation method is also based on clustering techniques andgroups processes in clusters by considering criteria such as communication cost [69, 70],functional similarity, mutual exclusion degree [73] and load balancing [72]. The numberof resulting clusters is equal to the number of the software components in the architecture.From each cluster obtained, one process is chosen to be implemented in each softwarecomponent. In order to implementing this strategy, techniques for calculating the degree ofmutual exclusion between processes, the work load of processors, the communication costand the functional similarity of processes have been defined and implemented.

The partitioning of processes has been performed using a multi-stage hierarchical clus-tering algorithm [74, 15]. First a clustering tree is built as depicted in Figure 5.b. Thisis performed by considering criteria like similarity among processes, communication cost,mutual exclusion degree and resource sharing. In order to measure the similarity betweenprocesses, a metric has been defined, which allows for quantifying the similarity betweentwo processes by analyzing the communication cost, the degree of parallelism of their cur-rent implementation, the possibility of implementing both processes in pipeline and themultiplicity of their assignments [15]. The cluster set is generated by cutting the clusteringtree at the level (see Figure 5.b), which minimizes a cost function. This cost functionconsiders the communication cost as well as area and delay estimations [75, 72, 61, 59, 15].

Below a basic clustering algorithm is described. First, a clustering tree is built based ona distance matrix. This matrix provides the distance between each two objects:

p1 p2 p3 p4

D =0 d1 d2 d3 p1

0 d4 d5 p2

0 d6 p3

0 p4

Algorithm

1. Begin with a disjoint clustering having levelL(0) = 0 and sequence numberm= 0.

2. Find the least dissimilar pairr , s of clusters in the current clustering according tod(r, s) = min{d(oi ,oj )}.

3. Increment the sequence number(m ← m + 1). Merge the clustersr and s into asimple one in order to form the next clusteringm. Set the level of this clustering toL(m) = d(r, s).

4. Update the distance matrix by deleting the row and the column corresponding tothe clusters. The distance between the new cluster and an old clusterk may be de-fined as:d(k, (r, s)) = Max{d(k, r ),d(k, s)}, d(k, (r, s)) = Min{d(k, r ),d(k, s)} ord(k, (r, s)) = Average{d(k, r ),d(k, s)}.

5. Whether all objects are in one cluster, stop. Otherwise, go to the step 2.


After the construction of the clustering tree, this tree is cut by a cut-line. The cut-linemakes clusters according to a cut-function.

In order to allow the formal generation of a partitioned occam description in the joiningphase, the clustering output is an occam description with annotations, which reflects thestructure of the clustering tree, indicating whether resources should be shared or not.

4.4. The Joining Strategy

Based on the result of the clustering and on the description obtained in the splitting, thejoining phase generates a final description of the partitioned program in the form:

chan: ch1, ch2, . . . , chn: PAR(S1, . . . , Ss, H1, . . . , Hr )

where eachSi andHj are the generated clusters. Each of these is either one simple process(Pk) of the split phase of a combination of some(Pk)’s. Also, none of the(Pk)’s is left out:each one is included in exactly one cluster. In this way, the precise mathematical notion ofpartition is captured. TheSi , by convention, stands for the a software process and eachHj

for a hardware process.Like the splitting phase, the joining phase should be designed as a set of transforma-

tion rules. Some of these rules are simply the inverses of the ones used in the splittingphase, but new rules for eliminating unnecessary communication between processes of asame cluster have been implemented [63]. The goal of the joining strategy is to elim-inate irrelevant communication in the same cluster and after joining branches of condi-tionals andALT processes as well as reducing sequences of parallel and sequential pro-cesses.

The joining phase is inherently more difficult than splitting. The combination of simpleprocesses results in a process which is not simple anymore. Therefore, no obvious normalform is obtained to characterize the result of the joining in general. Also, one must takea great care for not introducing deadlock when serializing processes in a given cluster.Also, in this phase some sequential processes are carried out in parallel, by applying sometransformation rules.

5. A Brief Introduction to Petri Nets

Petri nets are a powerful family of formal description techniques with a graphic and mathe-matical representation, and have powerful methods which allow for performing qualitativeand quantitative analysis [37, 28, 29, 64].

This section presents a brief introduction to Place/Transitions nets and Timed Petri nets.

5.1. Place/Transition Nets

Place/Transition Nets are bipartite graphs represented by two types of vertices called places(circles) and transitions (rectangles), interconnected by directed arcs (see Figure 6).


Figure 6. Simple Petri net.

Place/Transition nets can be defined in terms of matrix as follow:

Definition 5.1 (Place Transition Net).is defined as 5-tupleN = (P, T, I ,O,M0), whereP is a finite set of places which represents the state variables,T is a set of transitions whichrepresents the set of actions,I : P × T → N is the input matrix which represents thepre-conditions,O: P × T → N is the output matrix which represents the post-conditionsandM0: P→ N is the initial marking which represents the initial state.

Definition 5.2 (Firing Rule). One transitiontj is enabled to fire if, and only if, all its inputplaces(p ∈ P) hasM(p) ≥ I (p, tj ). The transition firing changes the marking of the net(M0[tj > M ′). The new marking is obtained as follows:M ′(p) = M0(p) − I (p, tj ) +O(p, tj ),∀p ∈ P

The execution of actions is represented by the transition firing. However there are twoparticular cases where the firing rule is different: the first case is represented bysourcetransitions. Onesourcetransition does not have any input places. This transition is alwaysenabled. In the second case the transition does not have any output place. This transitionis called ofsink transition. Its firing does not create any token.

Using the matrix representation, the structure of the net is represented by a set of places,a set of transitions, an input matrix (pre-conditions) and an output matrix (post-conditions).When one transitiont fires, the difference between the markings is represented byO(p, t)−I (p, t),∀p ∈ P. The matrixC = O− I is called incidence matrix. This matrix representsthe structure of the net and if the net does not have self-loop.

Definition 5.3 (Incidence Matrix).Let a netN = (P, T, I ,O). The incidence matrix rep-resents the relationC: P×T → Z,∀p ∈ P defined by:C(p, t) = O(p, t)− I (p, t),∀p ∈P.

A net that has self-loop may be represented by the incidence matrix if the self-loop isrefined using dummy pair [37].

The state equation describes the behavior of the system, as well as allows for the analysisof properties of the models. Using matrix representation, the transitiontj is represented by


a vectors, where the components of the vector are zero except for thej − th component,which is one. So it is possible to represent a marking either as

M ′(p) = M0(p)− I (p, tj )+ O(p, tj )

or as

M ′(p) = M0(p)− I .s(tj )+ O.s(tj )

= M ′(p) = M0(p)− C.s(tj )T ,∀p ∈ P.

Applying the sequencesq= t0, . . . , tk, . . . , t0, . . . , tn of transitions to the equation above,the following equation is obtained

M ′(p) = M0(p)+ C.s,

wheres= s(t0)T , s(t1)T , . . . , s(tn)T is calledParikh vector.The Place/Transition nets can be divided into several classes [28]. Each class has distinct

modeling power. The use of subclasses improves the decision power of the models, althoughwithout excessively decreasing the modeling power.

5.2. Analysis

The methods used to analyze Petri nets may be divided into three classes. The first methodis graph-based and it builds on the reachability graph (reachability tree). The reachabilitygraph is initial marking dependent and so it is used to analyse behavioral properties [39].The main problem in the use of reachability tree is the high computational complexity [43,44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55] even if some interesting techniques areused such as: reduced graphs, graph symmetries, symbolic graph etc [35, 36]. The secondmethod is based on the state equation [34, 37, 84, 86]. The main advantage of this methodover the reachability graph is the existence of simple linear algebraic equations that aidin determining properties of the nets. Nevertheless, it gives only necessary or sufficientcondition to the analysis of properties when it is applied to general Petri nets. The thirdmethod is based on reduction laws [37, 38]. The reduction laws based method provides aset of transformation rules which reduces the size of the models, preserving the properties.However, it is possible that for a given system and some set of rules, the reduction can notbe complete.

From a pragmatic point of view, it is fair to suggest that a better, more efficient and morecomprehensive analysis can be done by a cooperative use of these techniques. Nevertheless,necessary and sufficient conditions can be obtained by applying the matrix algebra for somesubclasses of Petri nets [33].


5.3. Timed Petri Nets

So far, Petri nets have been used to model a logical point of view of the systems; noformal attention has been given to temporal relations and constraints [71, 78, 76]. Thefirst temporal approach was proposed by Ramchandani [57]. Today, there are at least threeapproaches which associate time to the nets: stochastic, firing times specified by intervalsand deterministic. In the stochastic nets a probability distribution to the firing time isassigned to the model [80, 79].

Time can be associated with places (Place-Timed Models) [83], tokens (Token-TimedModels) [82] and transitions (Transition-Timed Petri Models). The approach proposed in[71] associates to each transition a time interval (dmin,dmax) (Transition-Time Petri Nets).

In deterministic timed nets the transitions firing can also be represented by policies: thefirst one is the three phase policy firing semantics and the second model is the atomic firingsemantics approach. In the deterministic timed net with three phase policy semantics, thetime information represents the duration of the transition’s firing [57]. The deterministictimed net with atomic firing may be represented by the approach proposed at [71] wheretime interval bounds are the same (di ,di ) (Transition-Time Petri Nets).

This section deals with theTimed Petri Nets, or rather, Petri net extensions in which thetime information is expressed by duration (deterministic timed net with three phase policyfiring semantics) and it is associated to the transitions.

Definition 5.4 (Timed Petri Nets). Let a pairNt = (N, D) be a timed Petri net, whereN = (P, T, I ,O,M0) is a Petri net,D: T → R+ ∪ 0, is a vector which associates to eachtransitionti the duration of the firingdi .

A state in aTimed Petri Netis defined as 3-tuple of functions, one of which is the markingof the places; the second is the distribution infiring transitions and the last is theremainingfiring time [77], for instance, if the number of tokens in a firing transitionti is mt(ti ) = k,then the remaining firing time is represented by a vectorRT(t) = (r t (t)1, . . . , r t (t)k).More formally:

Definition 5.5 (State of Timed Petri Net).Let Nt = (N, D) a Timed Petri Net, a stateS of Nt is defined by a 3-tupleS = (M,MT, RT), whereM : P → N is the marking,MT : T → N is the distribution of tokens in the firing transitions andRT: K → R+T is theremaining firing time function which assigns the remaining firing time to each independentfiring of a transition for each transition thatmt(t) 6= 0. K is the number of tokens in afiring transitionti (mt(ti ) = K ). RT is undefined for the transitionsti which mt(ti ) =0.

A transitionti obtaining concession at a timex is obliged to fire at the time, if there is noconflict.

Definition 5.6 (Enabling Rule). Let Nt = (N, D) be a Timed Petri Net, andS =(M,MT, RT) the state ofNt. We say that a bag of transitionsBT is enabled at the instant


x if, and only if, M(p) ≥∑∀ti∈BT #BT(ti )× I (p, ti ),∀p ∈ P, whereBT(ti ) ⊆ BT and#BT(ti ) ∈ N.

If a bag of transitionsBT is enabled at the instantx, thus at that instant it removes fromthe input places of the bagBT the corresponding number of tokens(#BT(ti ) × I (p, ti ))and, at the timex+di (di is the duration related to the transitionti in the bagBT), adds therespective number of tokens in the output place. The number of tokens stored in the outputplace is equal to the product of the output arc weight(I (p, t)) by the module of the bagregarding each transitiont which has the duration equal todi (#BT(t), BT(t) ⊆ BT) plusthe number of tokens already “inside” the firing transitions, such that their duration haveelapsed, during the present bag firing.

Definition 5.7 (Firing Rule). Let Nt = (N, D) be a Timed Petri Net, andS =(M,MT, RT) the state ofNt. If a bag of transitionsBT is enabled at the instantx, then at the instantx

∑∀ti∈BT #BT(ti ) × I (p, ti ),∀p ∈ P number of tokens is re-

moved from the input places of the bagBT. At the timex + d, the reached marking isM ′ = M−∑∀ti∈BT #BT(ti )× I (p, ti )+

∑∀ti∈BT|di=d #BT(ti )×O(p, ti )+

∑∀tj∈T,MT(tj )>0

M(tj ) × O(p, tj ),∀p ∈ P, if no other transitiont ∈ T has been fired in the interval(x, x + di ).

The inclusion of time in the Petri net models allows for performance analysis of systems.Section 8 introduces performance analysis in a Petri net context paying special attention tostructural approaches of deterministic models.

6. TheOccam—Petri Net Translation Method

The development of a Petri net model ofoccamopens a wide range of applications basedon qualitative analysis methods. To analyze performance aspects one requires a timed netmodel that represents the occam language.

In our context, an occam program is a behavioral description which has to be implementedcombining software and hardware components. Thus, the timing constraints applied toeach operations of the description is already known, taking into account either hardware orsoftware implementation.

This section presents a timed Petri net model of occam language. This model allowsfor the execution time of the activities to be computed using the methods described inSections 10 and 8.

Theoccam-Petri net translation method [61] receives an occam description and translatesit into a timed Petri net model. The occam programming language is derived fromCSP[60], and allows the specification of parallel algorithms as a set of concurrent processes.An occam program is constructed by using primitive processes and process combiners asdescribed in Section 3.

The simplest occam processes are the assignment, the input action, the output action, theskip process and thestopprocess. Herewith, due to space restriction, only one primitive


Figure 7. Communication.

process as well as one combiner will be described. A more detailed description can befound in [59, 61, 64].

6.1. Primitive Communication Process: Input and Output

Occam processes can send and receive messages synchronously through channels by usinginput (?) and output (!) operations. When a process receives a value through a channel,this value is assigned to a variable.

Figure 7.b gives a net representing the input and the output primitive processes of theexample in Figure 7.a. The synchronous communication is correctly represented by thenet. It should be observed that the communication action is represented by the transitiont0 and is only fired when both the sender and the receiver processes are ready, which arerepresented by tokens in the placesp0 andp1. When a value is sent by an output primitiveprocess throughch1, it is received and assigned to the variablex, being represented in thenet by the data part of the model. Observe that the transitiont1 can only be fired when theplacesp2 and p3 have tokens. After that, both processes become enabled to execute thenext actions.


Figure 8. Parallel.

6.2. Parallelism

The combinerPar is one of the most powerful of the occam language. It permits concurrentprocess execution. The combined processes are executed simultaneously and only finishwhen every one has finished.

Figure 8.a shows a program containing two processest1 andt2. Figure 8.b shows a netthat represents the control of this program.

One token in the placep0 enables the transitiont0. Firing this transition, the tokensare removed from the input place(p0) and one token is stored in the output places (p1

and p2). This marking enables the concurrent firings of the transitionst1 and t2. Afterthe firing of these transitions, one token is stored in the placesp3 and p4, respectively.This marking allows the firing of the transitiont3, which represents the end of the parallelexecution.

7. Qualitative Analysis

This section depicts the proposed method to perform qualitative analysis. The quantitativeanalysis of behavioral descriptions is described in following sections.

Concurrent systems are usually difficult to manage and understand. Therefore, misun-derstanding and mistakes are frequent during the design cycle [87].

Therefore, a need arises to decrease the cost and time-to-market of the products. Thus,it is fair to suggest the formalization of properties of the systems so that it is possible todetect errors in an early phase of the design.


There are so many properties which could be analyzed in a Petri net model [37]. Amongthese properties, we have to highlight some very important ones in a control system context:boundedness, safeness, liveness and reversibility. Boundedness and safeness imply theabsence of capacity overflow. For instance, there may be buffers and queues, representedby places, with finite capacity. If a place is bounded, it means that there will be no overflow.One place bounded ton means that the number of tokens that will be stored in it is at mostn.Safeness is a special case of boundness:n equal to one. Liveness is related to the deadlockabsence. Actually, if a system is deadlock free, it does not mean that the system is live,although if a system is live, it is deadlock free. This property guarantees that a system cansuccessfully produce. One deadlock free system may also be not live, which is the casewhen a model does not have any dead state, but there exists at least one activity which isnever executed. Liveness is a fundamental property in many real systems and also verycomplex to analyze in a broad sense. Therefore, many authors have been divided livenessin terms of levels in such a way to make it easy to analyze. Another very important propertyis reversibility. If a system is reversible, it means that this system has a cyclic behavior andthat it can be initialized from any reachable state.

The analysis of large dimensions nets is not a trivial problem, therefore in the prag-matic point of view, a cooperative use of reduction rules, structural analysis and reachabil-ity/coverability methods is important.

The first step of the adopted analysis approach is the application of the ‘closure’ [32] by theintroduction of a fictitious transitiont , whose the time duration is 0. The second step shouldbe the application of transformation rules which preserves properties like boundedness andliveness of the models. Such rules should be applied in order to reduce the model dimension.After that, the matrix algebra and the reachability methods can be applied in order to obtainthe behavioral and the structural properties related to the model. Below, the sequence ofsteps adopted to carry out the qualitative analysis is depicted.

• Application of a ‘closure’ to the net by the introduction of the transitiont ,

• Application of reduction rules to net,

• Application of structural methods and

• Application of reachability/coverability methods.

8. Performance Analysis

The calculation of execution time is a very important issue in hardware/software codesign. Itis necessary for performance optimization and for validating timing constraints [3]. Formalperformance analysis methods provide upper and/or lower (worst/best) bounds instead of asingle value.

The execution time of a given program is data dependent and takes into account theactual instruction trace which is executed. Branch and loop control flow constructs resultin an exponential number of possible execution paths. Thus, specific statistics must becollected by considering a sample data set in order to determine the actual branch and


loop counts. This approach, however, can be used only in probabilistic analysis. In somelimited applications it is possible to determine the conditionals and loop iteration counts byapplying symbolic data flow analysis.

Another important aspect is the cost of formal performance analysis. Performance anal-ysis does not intend to replace simulation; instead, besides a model for simulation, anaccurate model for performance analysis must be provided.

Worst/best case timing analysis may be carried out by considering path analysis techniques[19, 6]. In worst/best case analysis, it has been assumed the worst/best case choices for eachbranch and loop. An alternative method allows the designer to provide simple executionnumber of certain statements. It helps to specify the total execution number of iteration ofnested loops. Methods based on Max-Plus algebra have also been applied for performanceevaluation, but for mean case performance it suffers of a great complexity and only worksfor some special classes of problems [81].

This section presents one technique for static performance analysis of behavioral descrip-tions based on structural Petri net methods. Static analysis is referred to as methods whichuse information collected at compilation time and may also include information collectedin profiling runs [90].

Real time systems can be classified either as a hard real time system or a soft real timesystem. Hard real time systems cannot tolerate any missed timing deadlines. Thus, theperformance metric of interest is the extreme case, typically the worst case, neverthelessthe best case may also be of interest. In a soft real time system, a occasional missing timingdeadline is tolerable. In this case, a probabilistic performance [80, 79, 89] measure thatguarantees a high probability of meeting the time constraints suffices.

The inclusion of time in the Petri net model allows for performance analysis of systems[85]. Max-Plus algebra has been applied to Petri net models for system analysis [92], butsuch approaches can only be considered for very restricted Petri nets subclasses [5]. Onevery well known method for computing cycle time in Petri net is based on timed reachabilitygraph with path-finder algorithm. However the computation of the timed reachability graphis very complex and for unbounded systems is infinite. The pragmatic point of view suggestsexploring the structure (to transform or to model the systems in terms of Petri nets subclasses)of the nets and to apply linear programming methods [86].

Structural methods eliminate the derivation of state space, thus they avoid the “stateexplosion” problem of reachability based methods; nevertheless they cannot provide asmuch information as the reachability approaches do. However, some performance measuressuch as minimal time of the critical-path can be obtained by applying structural methods.Another factor which has influenced us to apply structural based methods is that every othermetric used in our proposed method to perform the initial allocation and the partitioning iscomputed by using structural methods, or rather, the communication cost and the mutualexclusion degree computation algorithms are based on t-invariants and p-invariants methods.

Firstly, this section presents an algorithm to compute cycle time for a specific deterministictimed Petri net subclass called Marked Graph [1]. After that, an extended approach ispresented in order to compute extreme and average cases of behavioral description.

First of all, it is important to define two concepts:direct circuit anddirect elementarycircuits. A direct circuit is a directed path from one vertex (place or transition) back to


Figure 9. Timed marked graph.

itself. A directed elementary circuit is a directed circuit in which no vertices appear morethan once.

THEOREM8.1 For a strongly connected Marked Graph N,∑

M(pi ) in any directed circuitremains the same after any firing sequence s.

THEOREM 8.2 For a marked graph N, the minimum cycle time is given by Dm =maxk{Tk/Nk}, for every circuit k in the net. Where Tk is the sum of every transitiondelays in a circuit k and Nk =

∑M(pi ) in a circuit.

To compute all directed circuit in the net, first we have to obtain all minimum p-invariants,then use them to compute the direct circuits.

Figure 9 shows a marked graph, adopted from [1], in which we apply the method describedpreviously. The reader should observe that each place has only one input and outputtransition.

Applying very well known methods to compute minimum p-invariants [37, 84], thesesupports are obtained:sp1 = {p0, p2, p4, p6}, sp2 = {p0, p3, p5, p6}, sp3 = {p1, p2, p4}andsp4 = {p1, p3, p5}. After obtaining the minimum p-invariants, it is easy to computethe directed circuits:c1 = {p0, t1, p2, t2, p4, t4, p6, t5}, c2 = {p0, t1, p3, t3, p5, t4, p6, t5},c3 = {p1, t1, p2, t2, p4, t4} and c4 = {p1, t1, p3, t3, p5, t4}. The cycle time associatedto each circuit is:Dm(N) = max{T(1), T(2), T(3), T(4), T(5), T(6)}. Therefore, theminimum cycle time is theDm = maxk{12,16,10,12} = 16.

If instead of using a Petri net model in which the delay related to each operation is attachedto the transition, a Petri net model was adopted in which each transition has a time interval(tmin, tmax) attached to it (see Section 5.3), we may compute the lower bound of the cycletime. Note that if the delay related to each transition is replaced by the lower bound(tmin)

the value obtained means the lower bound of the cycle time [87].


Herewith a structural approach is presented to computing extreme and average cases ofbehavioral description. The algorithm presented computes the minimal execution time,the minimal critical-path time and likely minimal time related to branch probabilities inpartially repetitive or consistent strongly connected nets covered by p-invariants. Thisapproach is based on the method presented previously, however it is not restricted only tomarked graphs.

First, we present some definitions and theorems in Petri net theory which are importantfor the proposed approach [37].

A Petri netN is said to be repetitive if there is a marking and a firing sequence from thismarking such that every transition occurs infinitely often. More formally:

Definition 8.1 (Repetitive net).Let N = (R;M0) be a marked Petri net and firing sequences. N is said to be repetitive if there exists a sequencessuch thatM0[s> Mi every transitionti ∈ T fires infinitely often ins.

THEOREM 8.3 A Petri net N is repetitive if, and only if, there exists a vector X of positiveintegers such that C· X ≥ 0, X 6= 0.

A Petri net is said to be consistent if there is a marking and a firing sequence from thismarking back to the same marking such that every transition occurs at least once. Moreformally:

Definition 8.2 (Consistent net).Let N = (R;M0) be a market Petri net and firing sequences. N is said to be consistent if there exists a sequencessuch thatM0[s> M0 every transitionti ∈ T fires at least once ins.

THEOREM8.4 A Petri net N is consistent if, and only if, there exists a vector X of positiveintegers such that C· X = 0, X 6= 0.

The proofs of such theorems can be found in [37].The method presented previously is based on the computation of the direct circuit by using

the p-minimum invariants. In other words, first the p-minimum invariants are computed,then, based on these results, the direct circuits are computed (sub-nets). The cycle timerelated to a marked graph is the maximum delay considering each circuit of the net.

This method cannot be applied to nets with choices because the circuits which are com-puted by using the minimum p-invariants will provide sub-nets such that the simple summa-tion of the delays, attached to each transition, gives a number representing all those branchesof the choice. Another aspect which has to be considered is that concurrent descriptionswith choice may lead to a deadlock. Thus, we have to avoid these paths in order to computethe minimal execution time of the model.

In this method we use the p-minimum invariants in order to compute the circuits of thenet and the t-minimum invariants to eliminate from the net transitions which do not appearin any t-invariant. With regard to partially consistent models, these transitions are never


fired. We also have to eliminate from the net every transition which belongs to a choice,in the underlined untimed model, it does not model a real choice in the timed model. Forinstance, consider a net in which we have the following output bag related to the placepk: O(pk) = {ti , tj }. Thus, in the underlined untimed model these transitions describea choice. However, if in the timed model these transition have such time constraints:di

and dj and dj > di , a conflict resolution policy is applied such that transitionti mustbe fired. After obtaining this new net (a consistent net), each sub-net obtained by eachp-minimum invariant must be analyzed. In such nets, their transitions have to belong toonly one t-minimum invariant. The sub-nets which cannot satisfy this condition have to bedecomposed into sub-nets such that their transitions should belong to only one t-invariant.The number of sub-nets obtained has to be the minimum, or rather, the number of transitionsof each sub-net in eacht-invariant should be the maximum.

Definition 8.3 (Shared Element).Let N = (P, T, I ,O) be a net, two subnetsS1, S2 ⊂ N,a set of placesP′ such that∀pz ∈ P′, pz 6∈ S1, pz 6∈ S2. The set of placesP′ is said to be ashared element if, and only if, its places are strongly connected and∃pm ∈ P′, ti ∈ S1, tk ∈S2 such thatti , tk ∈ O(pm) and∃pl ∈ P′, tj ∈ S1, tr ∈ S2 such thattj , tr ∈ I (pl ).

THEOREM 8.5 Let N = (P, T, I ,O) be a pure strongly connected either partially con-sistent or consistent net covered by p-invariants without shared elements, SNk ⊂ Na subnet obtained from a p-minimum invariant I pi and covered by one t-minimum in-variant I tj , SNc ⊂ N a subnet obtained from a p-minimum invariant I pi and does notcovered by only one t-minimum invariant I tj and if ∃pk such that#O(pk) > 1 then6 l j > hi ,∀ti , tj ∈ O(pk). The time related to the critical path of the net N is givenby CT(N) = max{dSNk ,dSNj },∀SNk, SNj ⊂ N, where SNj is obtained by a decomposi-tion of SNc such that each SNj ⊂ SNc is covered by only one t-minimum invariant.

THEOREM 8.6 Let N = (P, T, I ,O) be a pure strongly connected either partially con-sistent or consistent net covered by p-invariants without shared elements, SNk ∈ N bea subnet obtained from a p-minimum invariant I pi and covered by one t-minimum in-variant I tj , SNc ∈ N be a subnet obtained from a p-minimum invariant I pi and notcovered by only one t-minimum invariant I tj and if ∃pk such that#O(pk) > 1 then6 ∃l j > hi ,∀ti , tj ∈ o(pk). Each SNj ⊂ SNc is covered by only one t-minimum invariant,where SNj is obtained by a decomposition of SNc. The minimal time of the net N is given byMT(N) = max{dSNk ,dSNc},∀SNc ⊂ N such that each dSNc = min{dSNj },∀SNj ⊂ SNc.

The proof of both theorems can be found in [72].It is important to stress that the main difference among these metrics is related to the

execution time of pieces of program in which choices must be considered. The computationof the minimal time related to the whole program takes into account the choice branch whichprovides the minimum delay.

Another important measure is the likely minimal time. This metric takes into ac-count probabilities of branches execution. Therefore, based on specific collected statis-


tics, the designer may provide, for each branch in the description, the probability ofexecution.

Definition 8.4 (Strongly Connected Component Probability Matrix).Let a netN =(P, T, I ,O, D), a strongly connected componentSNk ⊂ N be a branchbi related to achoice-net.SC P M(SNk, tj ) is the execution probability of the transitiontj in the stronglyconnected componentSNk.

SC P M(SNk, tj ): N× N→0 if tj /∈ SNk.

pri (0≤ R ≤ 1) if tj ∈ SNk, tj ∈ bi .

1 if tj ∈ SNk, tj /∈ bi ,∀bi ∈ SNk.

Definition 8.5 (Probability Execution Vector).Let a netN = (P, T, I ,O, D)and a stronglyconnected component probability matrixSC P Mrelated toN. P EV(tj ): N→ 0≤ R ≤ 1,#P EV(tj ) = T . Each vector componentpev(tj ) =

∏∀SNk

SC P M(SNk, tj ),∀tj ∈ T .

The likely minimal time related to the netN is given byM LT = max{mltSNk},∀SNk,wheremltSNk =

∑d(tj )× pev(tj ),∀tj ∈ SNk. d(tj ) is the lower bound time related to the

transitiontj andSNk is a strongly connected component.Similar results are obtained for either partially repetitive or repetitive nets covered by

p-invariants. In nets with these properties, instead of computing the t-minimum invariantswe have to compute the support of the equation systemsC · X ≥ 0, X 6= 0.

The algorithm to compute the minimal time, the minimal critical path time and likelyminimal time is given in the following:

• Input:a netN = (P, T, I ,O, D).branch probabilitiesbi = {pri ; tj },∀bi ⊂ N and∀tj ∈ bi .

• Output:the minimal time.the minimal critical path time.the likely minimal time.

• Algorithm:

1. Compute thet-minimum invariants(I t ) of the netN.

2. Remove from the netN the transitiontl and the placespg ∈ I (tl ) or pg ∈ O(tl ),if i t1 = 0,∀I t , such that:N ′ = (P′, T ′, I ′,O′), whereP′ = P\pg, pg ∈ I (tl )and/orpg ∈ O(tl ) andT ′ = T\tl .

3. Compute the p-minimum invariants(I p) of the netN ′.4. Compute the probability execution vector(P EV).

5. Compute the likely execution time of each componentSNk ⊂ N ′(mltSNk =∑d(tj )× pev(tj ),∀tj ∈ SNk).


Figure 10.Example.

6. Compute the strongly connected componentsSNk obtained fromI pk.

7. Compute the strongly connected componentsSN′k obtained fromI pk and coveredby one t-minimum invariantI t .

8. For each strongly connected component (obtained fromI pk) not covered by a t-minimum invariant(SN′c), do:

DecomposeSN′c into nets(SN′j s) in such a way that a t-minimum invariantI t j covers each subnetSN′j .

9. Compute the execution time of each componentSN′k, SN′j ⊂ SNc ∀SN′k, SN′j ∈N ′.

10. Compute the critical path timeCT(N) = CT(N ′) = max{dSN′k ,dSN′j } ∀SN′k, SN′j ∈N ′.

11. Compute the minimal timeMT(N) = MT(N ′) = max{dSN′k ,dSN′C } ∀SN′k, SN′C ∈N ′ anddSN′c = min{dSN′j },∀SN′j ⊂ SN′c.

12. Compute the likely minimal timeM LT(N) = max{mltSNk},∀SNk ∈ N ′.

The method presented is applied to a small example (see Figure 10). This example is aconcurrent description in which there are two choices. It is important to emphasize that oneof these leads to a deadlock. In the qualitative analysis phase, we found out that the model isstrongly connected, partially consistent, covered by semi-positive p-invariants, structurallybounded and safe.


Figure 11.Transformed net.

If the system is partially consistent, it means that some of its transitions either are notable to be fired or, if they were fired, they would lead to a deadlock.

The first step of the algorithm is the computation of the t-minimum invariant. The supportof the t-minimum invariants arest1 = {t0, t2, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t17} andst2 = {t0, t2, t6, t7, t8, t9, t10, t11, t12, t13, t14, t16, t18}. By analyzing these invariants it maybe observed that the transitionst1, t3, t4, t5 do not belong to any t-minimum invariant.

The second step is the elimination of the transitions which do not belong to any t-minimuminvariant and also the elimination of the places that are input and/or output of such transitions.The resulting net (obtained by this transformation) is presented in Figure 11.

Considering the transitions of the branches of the choice (transitionst11, t16, t17 andt18),an execution probability of 0.5 was assigned.

The following step is the computation of the p-minimum invariants of the transformednet. The support of the p-minimum invariants are:sp1 = {p0, p1, p5, p8, p16, p18},sp2 = {p0, p3, p12, p15, p17, p18, p19, p20}, sp3 = {p0, p1, p5, p10, p18}, sp4 = {p0, p2,

p9, p10, p18}, sp5 = {p0, p2, p8, p9, p16, p18} andsp6 = {p0, p3, p11, p13, p14, p17, p18}.After that, the strongly connected components(Subneti ) are obtained from these in-variants. Each component has the following transitions as its elements:Subnet1 ={t0, t2, t6, t7, t13, t14}, Subnet2 = {t0, t10, t11, t12, t13, t14, t16, t17, t18}, Subnet3 = {t0, t2, t6,


t13, t14}, Subnet4 = {t0, t6, t8, t13, t14}, Subnet5 = {t0, t6, t7, t8, t13, t14} and Subnet6 ={t0, t9, t10, t11, t12, t13, t14, t15}.

Then, the likely minimal time for each strongly connected componentmlt(SNk) =∑d(tj ) × pev(tj ), ∀tj ∈ SNk): mlt(1) = 12, mlt(2) = 21, mlt(3) = 7, mlt(4) = 10,

mlt(5) = 15 andmlt(6) = 8 is computedEach component which is not covered by only one t-minimum invariant is decomposed

into subnets in such a way that each of its subnets is covered by only one t-minimuminvariant. Therefore, theSubnet2 = {t0, t10, t11, t12, t13, t14, t16, t17, t18} is decomposedinto Subnet21 = {t0, t10, t11, t12, t13, t14, t17} andSubnet22 = {t0, t10, t12, t13, t14, t16, t18}.

After that, we compute the time related to each subnet of the whole model. The result-ing values are:T(1) = 12,T(21) = 20,T(22) = 22,T(3) = 7,T(4) = 10,T(5) = 15 andT(6) = 8. Then, we haveCT(N) = max{T(1), T(21), T(22), T(3), T(4), T(5), T(6)} =22,MT(N) = max{T(1),min{T(21), T(22)}, T(3), T(4), T(5), T(6)} = 20 and finallyM LT(N) = max{mlt(1),mlt(2),mlt(3),mlt(4) mlt(5),mlt(6)} = 21

For execution time computation in systems with data dependent loops, the designer has toassign the most likely number of iterations to the net. This number could be determined bya previous designer’s knowledge, therefore he/she may directly associate a number usingannotation in the net. Another possibility is by simulating the net on several sets of samplesand recording how often the various loops were executed.

Such a method has been applied to several examples and compared to the results obtainedby the petri net tool INA. The results are equivalents, but INA only provides the minimaltime.

9. Extending the Model for Hardware/Software Codesign

This section presents a method for estimating the necessary number of processors to executea program, taking into account the resource constraints (number of processors) providedby the designer, in order to achieve best performance, disregarding the topology of theinterconnection network.

First, let us consider a model extension in order to capture the number of proces-sors of the proposed architecture. The extended model is represented by the netN =(P, T, I ,O,M0, D), which describes the program, a set of placesP′ in which each ofits places(p′) is a processor type adopted in the proposed architecture; the marking ofeach of these places represents the number of processors of the typep′; the input and theoutput arcs that interconnect the places of the setP′ to the transitions which represents thearithmetic/logical operations(ALUop ⊂ T).

In the extended model the number of conflicts in the net increases due to the competitionof operations for processors [32]. These conflicts require the use of a pre-selection policyby assigning equal probabilities to the output arcs from processors places to the enabledtransitionstj ∈ ALUop(O(p, tj ), p ∈ P′) in each reachable markingMz. Thus, moreformally:

Definition 9.1 (Extended Model).Let a netN = (P, T, I ,O,M0, D) a program model, aset of placesP′ the processor types adopted in the architecture such thatP ∩ P′ = ∅ and


M0(p), p ∈ P′ the number of processors of the typep. Let a netNe = (Pe, Te, Ie,Oe,Me0,

De, f ) the extended model such thatPe = P ∪ P′, Te = T, Ie(p, tj ) = 1 andOe(p, tj ) =1,∀tj ∈ ALUop,∀p ∈ P′, otherwiseIe(p, tj ) = I (p, tj ) and Oe(p, tj ) = O(p, tj ).Me

0: NP∪P′ → N andDe = D. Let Mz a reachable marking fromM0, f : Oe(p, tj )→ 0≤R ≤ 1 a probability attached to each output arcOe(p, tj ) where

∑∀tj∈T f (Oe(p, tj )) = 1

such thatMz[tj > and p ∈ P′.

In such a model, the concurrence is constrained by the number of available processors(M0(p), p ∈ P′) provided by the designer. The main goal of the proposed approach is toestimate the minimal number of processors that can achieve best performance taking intoaccount the upper bound of available processors already specified. Therefore, the designer,in the architecture generator, provides the number of available processors, then the executiontime (CT) is computed by reachability based methods. The following step comprises thereduction in the number of processors(M(p) = M(p) − 1, p ∈ P′) in order to computea new execution time(CT′). If CT′ > CT, the necessary number of processors has beenreached. This number of processors is used in the proposed method for initial allocation.

The proposed algorithm to estimate the needed number of processor is:

• Input:a netNe = (Pe, Te, Ie,Oe,Me

0, De, f ).the number of available processors(M0(p),∀p ∈ P′).

• Output:the optimum number of processorsMopt(p), p ∈ P′ taking into account the re-

sources constraints provided by the designer.the minimal execution time (CT) regarding toMopt(p).

• Algorithm:

1. Compute the execution timeCT(Ne)

2. CT = CT(Ne)

3. For each placep ∈ P′, do:M(p) = M(p)− 1Compute a new execution timeCT(Ne)

if CT(Ne) ≤ CTCT = CT(Ne)

Mopt(p) = M(p),∀p ∈ P′

else or ifM(p) = 0,∀p ∈ P′

end.

The number of necessary processors can also be reached by taking into account either thespeed up, the efficiency or the efficacy provided by the use of multiple processors.

The gain in terms of execution time by a parallel execution of a program(Ne) can bedefined as the ratio between the execution time ofNe taking into account only one processorand the execution time concerning the use of #pr processors to execute it.


Definition 9.2 (Speed up).Let Ne be an extended model,P′ be a set of places representingprocessors of a given type adopted in the architecture,M(p), p ∈ P′, be the numberof processors of the typep, CT(Ne,1) the execution time ofNe carried out by onlyone processor andCT(Ne,M(p)),∀p ∈ P′, be the execution time ofNe consideringM(p),∀p ∈ P′, processors.S(Ne,M(p)) = CT(Ne,1)/CT(Ne,M(p)),∀p ∈ P′ isdefined as the speed up due toM(p)),∀p ∈ P′, processors.

The speed up ofS(Ne,M(p)) provided by the use ofM(p),∀p ∈ P′, processors toexecuteNe divided by the number of processors defines the efficiency. More formally:

Definition 9.3 (Efficiency). Let Ne be an extended model andS(Ne,M(p)) the speedup provided byM(p),∀p ∈ P′, processors to executeNe. The efficiency is defined byE(Ne,M(p)) = S(Ne,M(p))/

∑M(p),∀p ∈ P′.

Considering the execution timeCT(Ne,M(p)) as a cost measure and the efficiencyE(Ne,M(p)) as a benefit, the cost-benefit relation and its inverse can be defined as theefficacy.

Definition 9.4 (Efficacy). Let Ne be an extended model,E(Ne,M(p)) the efficiency,S(Ne,M(p)) the speed up,CT(Ne,1) the execution time ofNe carried out by only oneprocessor andCT(Ne,M(p)),∀p ∈ P′ the execution time ofNe carried out byM(p),∀p ∈P′, processors. E A(Ne,M(p)) = E(Ne,M(p))

CT(Ne,M(p))× CT(Ne,1) = S(Ne,M(p)) ×

E(Ne,M(p)) = S(Ne,M(p))2∑M(p)

,∀p ∈ P′ is defined as efficacy.

A small example follows in order to illustrate the proposed method. A Petri net representsthe control flow of an occam program obtained by the translation method proposed in [64,59, 61]. This net describes a program composed of three subprocesses (see Figure 12).The processP R1 is represented by the set of placesPP R1 = {p1, p4, p5, p6, p7}, theset of transitionsTP R1 = {t1, t2, t3, p4, p5}, their input and output bags (multi-sets) andthe respective initial markings of its places. The processP R2 is composed ofPP R2 ={p2, p8, p10} as its set of places,TP R2 = {t6, t8}, its input and output bags and the markingsof its places. Finally, the processP R3 is composed ofPP R3 = {p3, p9, p11} as its set ofplaces,TP R3 = {t7, t8}, its input and output bags as well as the markings of its places. Eachtransition has the duration(d) attached to it.

The extended model is represented by the net in Figure 13. The placep13 representsa processor type. Its marking represents the number of available processors. The onlytransitions that describe the ALU operations(t ∈ ALUop) are interconnected in order tofind out the number of functional units (ALUs—we are supposing that each processor hasonly one ALU) needed to execute the program and achieve best performance. These arcsare expressed by dotted lines. Due to the fact that these transitions are connected to theplacep13 by an input and an output arc, for short these are represented by bidirectional arcs.

Suppose, for instance, that the designer has specified, in the architecture generator, theupper bound of available processor asn = 4. Thus, the execution time of the extended


Figure 12.Description.

Table 1. Criticalpath time.

M(p13) CT(Ne)

4 7

3 7

2 7

1 10

model should be analyzed taking into accountn = 4,n = 3,n = 2 andn = 1 and then theconfiguration with small execution time and small number of processors must be chosen.

By applying the proposed algorithm, the results depicted in Table 1 are obtained. Thus,the necessary number of processors to execute the program isMopt(p13) = 2. This numbershould be used in the initial allocation process.

In the following sections techniques for computing others useful metrics for hardware/software codesign are presented. Next section describes a method for delay estimation.A method for computing communication cost is described in Section 11. Workload ofprocessors is calculated by the method detailed in Section 12. The degree of mutual


Figure 13.The extended model.

Table 2.Speed up, efficiency and efficacy.

Processors S E EA

1 1 1 1

2 1.4286 0.7143 1.0204

3 1.4286 0.4762 0.6803

4 1.4286 0.3571 0.5102

exclusion among processes is calculated by the method described in Section 13. Thesilicon area in terms of logic blocks for hardware and software implementation of eachprocess is computed by the technique described in Section 14.

10. Delay Estimation

Previous sections described methods to compute execution time (cycle time) associatedto occam behavioral description translated into timed Petri nets by using the translationmethod proposed in [64, 61].


However, the method used to estimate the delay of the arithmetic and logical expressionsperformed in the assignments still needs to be defined.

The delay of expressions is estimated in terms of the control steps needed to performthe expression. The expression execution time (delay) is given as a function composedof two factors: the delay related when performing the arithmetic and logical operationsof assignments and the delay when reading and writing variables. It was assumed thatoperations in one expression are sequentially executed.

Dex(e) = DRW(e)+ DO P(e)

DRW(e) =

∑∀vu∈e DRh(vu)+

∑vd∈e DWh(vd)

if e is implemented in hardware∑∀vu∈e DRs(vu)+

∑vd∈e DWs(vd)

if e is implemented in software

The variablesvu andvd are the used and defined variables in the expressione.

DO P(e) =

∑∀opi∈e DO Ph(opi )× #opi

if e is implemented in hardware∑∀opi∈e DO Ps(opi )× #opi

if e is implemented in software

11. Communication Cost

This section presents the method proposed for computing communication cost betweenprocesses by using Petri nets [69, 70]. The communication cost related to a process dependson two factors: the number of transferred bits by each communication action and how manytimes the communication action is executed (here referred as number of communication).

Considering that we are dealing with behavioral descriptions that are translated into Petrinets, we have already defined, in each communication action, the number of transferredbits in each communication action execution.

Definition 11.1 (Number of Transferred Bits in a Communication Action). Nbb: nbc→ N,where #Nbb = T andT is the set of transitions. Each component (nbc), associated to atransition that represents a communication action, defines the number of transferred bits inthe respective communication action, otherwise is zero.

However, we have to define a method to compute how many times the communicationaction is executed the process, the communication cost for each process, the communicationcost of the whole description, the communication cost between two sets of processes andfinally to compute the normalized communication cost.

The communication cost for each process(CC(pi )) is the product of the number oftransferred bits in each communication action(Nbc) and the number of communication(NC(pi )).


Definition 11.2 (Communication Cost for each Process).Let Nbc be the number oftransferred bits in the communication actions andNC(pi )

T a vector that represents thenumber of communication. The communication cost for each processpi is defined byCC(pi ) = Nbc × NC(pi )

T .

The Number of Communication(NC(pi )) is a vector, where each component(nc(pi )),associated to a transition that represents a communication action in the processpi , is theexecution number related to the respective communication action, otherwise, that is, thecomponent vector associated to the transition which does not represent the communicationaction in the processpi is zero. More formally:

Definition 11.3 (Number of Communication). NC(pi ): nc(pi )→ N, where: #NC(pi ) =T and T is the set of transitions. Each componentnc(pi ) = max(ncXk(pi )),∀Xk,where Xk is a vector of positive integers such that eitherC · X = 0 or C · X ≥ 0.NCXk(pi ): ncXk(pi )→ N, where #NCXk(pi ) = T andT is the set of transitions.

Each vectorXk is the minimum support which can be obtained by solving eitherC ·X = 0(in this caseXk are minimum t-invariants) orC · X ≥ 0. The number of communication ofan actionai (represented by a transitionti ) is the respective value obtained in the componentxi for the correspondentXk. The other components, which do not represent communicationactions in the processpi , are equal zero.

According to the results obtained in the qualitative analysis, it is possible to choosemethods to compute the number communication(NCpi ) considering the complexity of themethod used.

If the net (system) is consistent, first we have to compute the minimum t-invariants thenthe NC(pi ),∀pi ∈ D, are obtained. However, if the net is not consistent, but is repetitive,first the minimal support toXk, which is obtained usingX in the systemC · X ≥ 0, whereX 6= 0, has to be obtained, then theNC(pi ),∀pi ∈ D are computed. In the case of thenet not being repetitive and if it is possible to transform it into a repetitive or consistent netby inserting one transitiont f such thatI (t f ) = {pf } andO(t f ) = {p0}, we apply the samemethod to computeX and then to obtain theNC(pi ),∀pi ∈ D. These places (p0 and pf )are well defined, because one token in the placep0 (initial place) enables the execution of theprocess and when one token arrives in the placepf (final place), it means that the executionhas already finished. Otherwise, if it is not possible to transform the net into a repetitiveor consistent one, although this system seems not to have interesting properties and evenso the designer does not intend to modify it, we can compute theX and thenNC(pi ) byusing either the reachability graph or by solving the systemC · X = Mf inal − M0, whereMf inal andM0 are the final and the initial markings, respectively. However, the reader hasto remember that the state equation could provides spurious solutions for some Petri netsub-classes [33].

THEOREM 11.1 Let N be a consistent net and Xk a minimum t-invariant in the net. Con-sidering every minimum t-invariant in the net (∀Xk ∈ N), the maximum value obtained foreach component vector is the minimum transition firing number for each transition.


THEOREM 11.2 Let N be a repetitive net and Xk a minimum support in the net whichcan be obtained by using X which solves the equation C· X ≥ 0. Considering everyminimum support Xk in the net, the maximum value obtained for each component vector isthe minimum transition firing number for each transition.

The proof for both theorems can be found in [70].The communication cost between two processes (pi and pj ) is the product of the num-

ber of communications between the processes by the number of transferred bits in eachcommunication action. More formally:

Definition 11.4 (Communication Cost between Processes).Let Nbc: nbc→ N be thenumber of transferred bits in a communication action andNC(pi , pj ) a vector that repre-sents the number of communication between the processespi andpj . The communicationcost between processes is defined byCC(pi , pj ) = Nbc × NC(pi , pj )

T .

The communication execution number between two processes (pi andpj ) is representedby a vector, where each vector component, associated to a transition which represents acommunication action between both processes, defines the execution number related to therespective action.

Definition 11.5 (Number of Communication Between two Processes). NC(pi , pj ):nc(pi , pj )→ N, where #NC(pi , pj ) = T andnc(pi , pj ) = min(nc(pi ),nc(pj )).

In order to compute the communication cost in systems with data dependent loops, thedesigner has to assign the more likely number of iteration for each loop of the net. Thisnumber can be determined in two ways: the designer may either directly associate a numberusing annotation in the model based on previous knowledge or by simulating the model onseveral sets of samples in order to record how often the various loops were executed.

Therefore, each component of the vectorNC(pi , pj ) which represents a communicationaction between the processespi andpj and that is inserted in the looplk has to be multipliedby the more likely number of iteration(LV(lk)) of the looplk. A similar procedure has tobe taken for the vectorNC(pi ). In this case, each component of the vector which representsthe communication action of the processpi and which is inserted in the looplk has to bemultiplied by the more likely number of iteration(LV(lk)) of the looplk.

In the following, we present the algorithms to compute thenumber of communicationsbetween pairs of processes(NC(pi , pj )) and thethe number of communication of eachprocess(NC(pi )) taking into account data dependent loops.

• Input:set of processes{. . . , pi , . . .},set of loops{. . . , lk, . . .},set of communication action(SC A= {. . . , tj , . . .}),more likely number of iteration of each loop(LV(lk)),NC(pi ) of each process.


• Output:NC(pi ) of each process taking into account the data dependent loops.

• Algorithm:

• For each processpi ∈ D, do:For each looplk ∈ pi , do:

For each transitiontj ∈ lk, do:LV(tj ) = LV(lk)

For each looplm ∈ pi , do:If lm ⊆ lk, do:

For each transitiontj ∈ SC A, do:LV(tj ) = LV(tj )× LV(lm)

ElseFor each transitiontj ∈ SC A, do:

LV(tj ) = min{LV(tj ), LV(Lm)}For each transitiontj ∈ SC A, do:

NC(pi , tj ) = NC(pi , tj )× LV(tj )T

• Input:set of processes{. . . , pi , . . .}set of communication action(SC A= {. . . , tj , . . .}),NC(pi ) of each process taking into account the data dependent loops,NC(pi , pj ) of each pair of processes.

• Output:NC(pi , pj ) of each pair of processes taking into account the data dependent loops.

• Algorithm:

• For each pair of processes(pi , pj ) ∈ D, do:For each transitiontk ∈ SC A, do:

If NC(pi , pj , tj ) 6= 0, do:NC(pi , pj , tk) = min{NC(pi , tk), NC(pj , tk)}

The behavioral description communication cost is given by summing the communicationcost between each pair of processes in the description. More formally:

Definition 11.6 (Communication Cost). CC(D) =∑∀(pi ,pj )∈D CC(pi , pj )

In order to be able to compare distinct metric values, we have adopted two kinds ofnormalization: local and global normalization. The normalization refers to scaling ofmetric values to a number between 0 and 1. The normalization provides a possibility ofcombining different units, such as communication cost and mutual exclusion degree, into asingle value and it also provides an absolute closeness measure between objects. Thus, weknow that a closeness value between two objects of 0.95 is high, nevertheless we can notassert about the number 25 [7].


The global normalized communication cost between two processes is defined by thecommunication cost between these processes divided by the communication cost for thewhole description.

Definition 11.7 (Global Normalized Communication Cost).Let CC(pi , pj ) be the com-munication cost between processespi and pj , andCC(D) the communication cost in thewhole behavioral description. The global normalized communication cost is defined byNCC(pi , pj ) = CC(pi ,pj )

CC(D) .

The local normalized communication cost between two processes is defined by the com-munication cost between both processes divided by the summation of the communicationcost for each process.

Definition 11.8 (Local Normalized Communication Cost).Let CC(pi , pj ) be the commu-nication cost between processespi and pj , andCC(pi ) andCC(pj ) the communicationcost of the processespi and pj , respectively. The local normalized communication cost isdefined byLCC(pi , pj ) = CC(pi pj )/(CC(pi )+ CC(pj )).

The global normalized communication cost must also be defined for each process. Thismetric is defined by the communication cost related to the process divided by the commu-nication cost of the whole description.

Definition 11.9 (Global Normalized Communication Cost of a Process).Let CC(pi )

be the communication cost for each process andCC(D) the communication cost of thewhole behavioral description. The global normalized communication cost of each processis defined byNCC(pi ) = CC(pi )

CC(D) .

The local normalized communication cost for each processpi is defined by the communi-cation cost of the process divided by the summation of the communication cost of processesp′j s which has some communication(CC(pi , pj ) 6= 0). In the following we present theformal definition:

Definition 11.10 (Local Normalized Communication Cost of a Process).LetCC(pi ) be thecommunication cost for each processpi andpj one process whichCC(pi pj ) 6= 0. The localnormalized communication cost of each process is defined byLCC(pi ) = CC(pi )∑

∀pj ∈DCC(pj )

.

The algorithms below compute thethe number communication between pairs of processes(NC(pi , pj )) and thecommunication execution number of each process(NC(pi )) takinginto account the data dependent loops.

1. Compute the communication execution number for each process(NC(pi ))

2. Compute the communication cost of each processpi (CC(pi ) = Nbc × NC(pi )T )


Table 3.Communication costCC(pi , pj ).

Processes CC NCC LCC

p1, p2 32 0.333333 0.333333

p1, p3 32 0.333333 0.500000

p2, p3 32 0.333333 0.333333

Description 96 — —

3. Compute the communication execution number between each pair of processes of thewhole the description(NC(pi , pj )).

4. Compute the communication cost between each pair of processes(CC(pi , pj ) = Nbc×NC(pi , pj )

T )

5. Compute the communication cost of the whole description(CC(D) =∑∀(pi ,pj )∈D CC(pi , pj ))

6. Compute the global normalized communication cost of each process(NCC(pi ) =CC(pi )

CC(D) ).

7. Compute the local normalized communication cost of each process(LCC(pi ) =CC(pi )∑∀pj ∈D

CC(pj ))

8. Compute the global normalized communication cost of each pair of processes(NCC(pi , pj ) = CC(pi ,pj )

CC(D) )

9. Compute the local normalized communication of each pair of processes(LCC(pi , pj ) =CC(pi , pj )/(CC(pi )+ CC(pj ))).

Applying the proposed algorithm to the example shown in Figure 14.a, the results de-scribed in Table 3 and in Table 4 are obtained (considering that an integer is representedby 32 bits). Figure 14.b shows the net that represents the control flow of the algorithmdescribed.

Table 4. Communication cost of pro-cesses.

Process CC NCC LCC

p1 32 0.333333 0.333333

p2 64 0.666667 1

p3 32 0.333333 0.333333


Figure 14.Example.

It is important to stress that the algorithm proposed is based on the well known struc-tural Petri net methods, that is, it is a formal approach that takes into account the com-putation of semiflows (invariants) in order to find the number of transition firings re-lated to communication action in the processes. One common measure for quantifyingcommunication cost is through the delay related to communication actions between pro-cesses [68, 91]. In the method proposed in this section, communication cost is calcu-lated in terms of the amount of data transferred between processes. This approach allowsone to compute the communication cost without considering assignments in a particularprocessor, since it is unnecessary to estimate the exact time for the communication ac-tions.

12. Load Balancing

In this section a method for computing the static load balancing among simple occam pro-cesses across processors [72] is presented. This metric is an important aspect of performingthe initial allocation as well as the partitioning.

The occam simple processes may be either sequential or concurrent. Parallel processesmay have distinct parallelism degrees. The load balance is defined in terms of loadingrelated to processes in the processors. For instance, if two processespi andpy are assignedto two processors (processor K, processor L), the load balance among this pair of processorsrelated to that specific pair of processes is defined in terms of the process loading in theprocessors.


The work load of one process, for instancepi , in one processor (PK ) is defined in terms ofnumber of cycles demanded to execute such a process in the processor. Therefore, parallelprocesses have to be sequentialized in order to find out the execution time needed to carryout such processes. The approach used to find out the minimal execution time to carry outa process was described in Section 9.

Definition 12.1 (Load). Let pi be a process andPK a processor. The work load of the pro-cesspi in the processorPK is defined byLoad(pi , PK ) = NC(Pi , PK ), whereNC(pi , PK )

is the sequentialized number of cycles to execute the processpi in theprocessorPK .

The normalized loading of one process is defined in terms of the work load related to therespective process and the workload of the whole description.

Definition 12.2 (Normalized Loading). Let pi be a process,PK a processor andLoad(pi , PK ) the workload of the processpi in the processorPK . The normalized workloadis defined byNload(pi , PK ) = Load(pi ,PK )

Load(D) whereLoad(D) is the description load.

The local normalized load balance for each pair of processes is defined as a function ofthe loading associated to each of its processes in the respective processor.

Definition 12.3 (Local Normalized Load Balance between two Processes).Let pi andpj be processes andPK , PL processors. The load balance between each pair of processesrelated to the respective processors is defined byLL B(pi , pj , PK , PL) = |Load(pi , PK )−Load(pj , PL)|/(Load(pi , PK )+ Load(pj , PL)).

In a similar way, the global normalized load balance metric for each pair of processes isdefined as follows:

Definition 12.4 (Global Normalized Load Balance between two Processes).Let pi andpj be processes andPK , PL processors. The load balance between each pair of processesrelated to the respective processors is defined byGL B(pi , pj , PK , PL) = |Load(pi , PK )−Load(pj , PL)|/Load(D), where Load(D) is the work load related to the wholedescription.

The global normalized approach is only used if all processors have the same character-istics. The reason for this restriction is that the load related to the whole description is afunction of the number of cycles necessary to execute the description in the available pro-cessor. Thus, it is more convenient to compute if considering only one type of processor.Otherwise, it has to be known in advance which part of the description is assigned to eachprocessor.

Table 5 presents the workload of each process of the example presented in the previoussection. Table 6 shows the load balancing related to each pair of processes when consideringtheir allocation on a TransputerT800.


Table 5.Loading.

Process Load Nload

p1 39 0.196970

p2 54 0.272727

p3 110 0.555556

Description 198 —

The load balance metrics used in [91] considers the work loading of a processor in termsof the average loading of the set of processors. However, the average value consideredis obtained by dividing the summation of the loading of each process by the number ofprocessors available in the architecture. This metrics, clearly, does not consider synchro-nization between concurrent processes. The global normalized metrics proposed in thissection compares the loading related to pairs of processes and the execution time of thewhole task considering synchronization and concurrent execution. On the other hand, thelocal normalization proposed takes into account the loading of pairs of processes.

13. Mutual Exclusion

This section describes a method to compute a mutual exclusion metrics based on Petri nets[73] for use in the initial allocation and in the partitioning process as well.

First of all, it is important to define clearly what we mean by mutual exclusion in thecontext of this work. Two processes are said to be in mutual exclusion if the executionof one implies that the other process is not executed at the same time. In this sense,either tasks which have a precedence relation (they are in a sequential fashion etc) orthose whose execution excludes the execution of the others by mechanisms such as sharedvariables, semaphores, monitors and communication actions are said to be in mutual exclu-sion.

If two processes are in mutual exclusion, they are less likely to reduce performancewhen assigned to one single processor [7, 68]. However even mutually exclusive processescould allow a certain level of concurrency. In this sections an approach to computing amutual exclusive metrics between pairs of processes is presented. The values obtained are

Table 6.Load balancing.

Processes LL B GL B

p1, p2 0.161290 0.075758

p1, p3 0.476510 0.358586

p2, p3 0.341463 0.282828


a mutual exclusion degree between each pair of processes which are used to perform theinitial allocation as well as the partitioning.

As mentioned, this work deals with occam descriptions which are translated into Petrinets. Thus, the Petri net models obtained describe synchronous concurrent behaviors. It isstill important to make it clear that the nets obtained are strongly connected and that onlythe initial place (place which is precondition to starting the firing sequences) is marked.

According to our proposed translation method, the entities which represent theactions(assignment,stop, skip etc) of the occam processes are transitions. The places representpre-conditions and post-conditions related to the transition firing.

The pre-condition which enables the evaluation of the functiony and the respectivevalue assignment to the variablex is represented by the placepre-condition. The functionexecution is represented by the transitionactionand the post-condition is represented bythe placepost-condition. When one token is stored in thepost-conditionplace, it meansthat the local state representing the evaluation of the functiony (execution of the action)has already been reached.

Using theserial-placesreduction rule, this net is directly transformed into a place. Thus,the obtained place (activity) represents the whole activity, that is, thepre-condition, theactionand thepost-condition.

Mutually exclusive statements in the model (net obtained from the occam description byapplying the proposed translation method) by analyzing the minimum p-invariants.

Two placespk andpr are in mutual exclusion if, and only if, they are never simultaneouslymarked. We defineM E X(pk, pr ) as a function which represents the mutual exclusionbetween two statements (places) in pairs of processes (constituted by places, transitions andthe respective relations) of one description. Thus, if these places are in mutual exclusion,(m(pk) = 0) ∨ (m(pr ) = 0) (place markings).

Definition 13.1 (Mutual Exclusion between Statements).Let(pk, pr )be a pair of statementsof two processes in one description, respectively.

M E X(pk, pr ) =1 if pk and pr are

in mutual exclusion0 otherwise

To analyse whether two places (statements) are in mutual exclusion, first we have tocompute the minimum p-invariants (I p’s) and then multiply each one by the initial markingof the net(MT

0 ). If the obtained product isI ip×MT

0 = 1, the places which are support to thisminimum p-invariant are in mutual exclusion. Then we analyze, for each pair of processes(pri , prj ), whether each pair of places(pk ∈ pri , pr ∈ prj ) is in mutual exclusion. If it is,we makeM E X(pk, pr ) = 1, otherwise we makeM E X(pk, pr ) = 0.

In order to perform the initial allocation and the partitioning, it is important to define ametrics which provides a mutual exclusion degree for each pair of processes(pri , prj ) ofthe description. Although they are pairs of processes in which the processes are in mutualexclusion, they could have distinct mutual exclusion degrees. For example, consider twopairs of processes(pri , prj ) and(pry, prz) in which the processes are in mutual exclusion.


If between the processespri andprj there is only one small piece of their description whichis mutually exclusive, while between the processespry and prz there are several regionswhich are in mutual exclusion, obviously these pairs of processes have distinct mutualexclusion degrees.

L M E(pri , prj ) is defined as a local normalized metrics which represents the mutualexclusion degree between two processespri and prj .

Definition 13.2 (Local Normalized Mutual Exclusion Metric between Processes).Let pk

and pr be statements of two processespri and prj of a descriptionD. L M E(pri , prj ) =∑pk∈pri ,pr∈prj

M E X(pk, pr )/(|pri | × |prj |),∀pk, pr , where pri , prj ∈ D and (|pri | ×|prj |) represents the total number of pairs of places (statements) between those processes.

L M E(pri ) has also been defined as a local normalized mutual exclusion degree relatedto one process(pri ). The local normalization is due to the fact that only other processes(prj ) which have

∑pk∈pri ,pr∈prj

M E X(pk, pr ) 6= 0 have been considered.

Definition 13.3 (Local Normalized Mutual Exclusion Metric for One Process).Letpk and pr be statements of processespri and prj of a descriptionD. L M E(pri ) =∑

M E X(pk, pr )/(∑ |pri | × |prj |),∀pk ∈ pri ,∀pr ∈ prj ,∀prj ∈ D if, and only if,∑

M E X(pk, pr ) 6= 0,∀pk ∈ pri ,∀pr ∈ prj . (|pri | × |prj |) represents the total numberof pairs of places (statements) between those processes.

In order to reduce the complexity to compute the mutual exclusion degree, a set ofreduction rules [37, 38] is applied to the net, then the p-invariants related to the reducednet are computed. We have applied two reduction rules:parallel-placesreduction andserial-placesreduction1

In the reduced net, the places which represent a set of places in the original model areattached with indexes that provide the number of places they represent in the original net.This approach has shown interesting results in terms of computation time reduction.

The algorithm to compute the mutual exclusion degree between pairs of processes isdescribed below:

1. Apply the reduction rules to the original net. As a result, a reduced net is obtainedalong with the set of index related to the places (RPS-reduced place set).

2. Compute the p-invariants of the reduced net.

3. For each pair of process(pri , prj ), do:For each pair of places(pk, pr ) belonging to both processes, do:

If the pair of places(pk, pr ) belongs to one p-invariant do:M E X(pk, pr ) = 1andsmex(pri , prj ) = smex(pri , prj )+ (M E X(pk, pr )

× rps(pk)× rps(pr ))

L M E(pri , prj ) = smex(pri , prj )/(|pri | × |prj |).


Table 7. Mutual exclusion de-gree of the pairs of processes.

Processes L M E

p1, p2 0.5

p1, p3 0.15

p2, p3 0.3

4. For each processpri , do:For each processprj , do:

If smex(pri , prj )! = 0, do:smex(pri ) = smex(pri , prj )

L M E(pri ) = smex(pri )/(∑ |pri | × |prj |)

2

The results obtained for the toy example shown in Section 11 are presented in Table 7and Table 8.

It should be stressed that previous works devoted to the mutual exclusion analysis haveonly considered the qualitative point of view [88, 87]. Nevertheless, when consideringprocess allocation and hardware/software partitioning, it is important to quantify such aproperty. Although such an approach has been based on the well known p-mutex concept,this method extends it since a quantification of statements is provided. The method proposedin [68] describes a method for analyzing precedence relation between pairs of processes inorder to perform process allocation, however it does not take into account exclusion relatedto choice-branches. The method proposed in this section considers both, causal precedencerelation and statements in distinct branches of choices.

14. Estimating Area

Area and delay estimation plays an important role when the design process is started at ahigh level of abstraction in order to obtain optimal or near optimal solutions.

An important issue when defining an estimation algorithm is the tradeoff between accuracyand the computational cost. High accuracy levels are only obtained if the model adopted

Table 8. Mutual exclusion de-gree of processes.

Process L M E

p1 0.230769

p2 0.357143

p3 0.214286


incorporates several aspects of the design. On the other hand, simple models are executedquickly and are easy to develop, but they may not provide the accuracy level required forthe design.

In general, at a high level of specification, the designer needs to make choices betweendesign alternatives and observe a compromise between accuracy and complexity of theadopted model. In this case, fidelity is the key quality desired of the algorithm. If analgorithm estimates values for two different designs and the values obtained in the imple-mentation have a comparative relationship to each other, the estimator correctly comparesthe implementations [9].

14.1. Software Model

This section describes the method proposed to estimate the process (behavioral description)size. Such an estimate may be divided in terms of program size and data memory size of agiven behavioral description. First of all, however, the software model is described in orderto perform the estimates.

A software implementation of a behavioral description is obtained by compiling it intothe instruction set of the processor considered in architecture. The variables are assumedto be mapped to the memory associated to the processor. Concurrent behavior, whenimplemented in a single processor, may be interleaved and the communication has to beimplemented by shared location (channels emulation) in the memory. If two behavioralpieces of description are allocated to two different processors, we have been used channelsas the communication model.

Two approaches can be used for software estimation. The first, compiles the behavior intoa processor model. The second approach translates the description into a generic model.The generic model estimation provides less accurate values due to the fact that genericinstruction set represents only a portion of the processors instruction set. However, on theother hand, different compilers and estimators are not needed for each processor type. Thegeneric model estimator computes the metrics based on the generic instructions and theprocessor’s technology files [9].

Generic instruction set may consist of five sub-sets representing arithmetic/logical opera-tion, move/load and store operations, conditional jumps, unconditional jumps and procedurecall instructions.

The processor’s technology files provide information about the number of cycles andcode-size for the generic instructions. These files can be obtained from the timing andsize information of the processor’s instruction set. The area estimates is obtained from thegeneric instructions and the processor’s technology file (see Figure 15).

Although generic instructions seem to be the best choice when considering the aspectsdescribed previously, so far only Transputers have been taken into account in the computerarchitecture. Therefore, the estimates will be much more accurate when considering thesoftware area and delay indexes given by the manufacturer. This is the software modeladopted to be used in the context of this work.

Taking into account a behavioral description (process), the process software area is givenin terms of behavior and variable areas:


Figure 15.Estimation model.

Definition 14.1 (Software Process Area).Let ASb(pi ) be the process behavior area andASrw(pi ) the read/write variables area related to the processpi . AS(pi ) = ASb(pi ) +Asrw(pi ) is defined as the software process area, whereASb(pi ) = ASal(pi )+ Ashls(pi ),whereASal(pi ) represents software area of arithmetic expressions andAShls(pi ) is the areaof occam high-level combiners.

14.2. Hardware Model

This section describes the design model for hardware estimation. The purpose of thehardware model is to allow for hardware area and delay estimation.

For a given high-level behavioral description, the hardware design can be divided intothree classes of functional blocks: data-paths, local controllers and high-level constructorcontrol. The high-level constructor control consists of circuits implementing the controlof the description language. Figure 16 shows these three classes considering a high leveldescription. The generic hardware units set is defined in the following:

Definition 14.2 (Generic Hardware Units). Let D be a behavioral description. Letx:= e be an assignment of the evaluation of the expressione to the variablex, ch ? xand ch ! e the input and output primitive processes, respectively. LetSTOP repre-sent the deadlock process and SKIP be a silent action.IF is a conditional constructor,WHILE represents a loop command,SEQ denotes the sequential construction of pro-cesses,PARstands for parallel composition andALT represents alternation.OCS= {x:=


Figure 16.Hardware model.

e, ch ? x, ch ! e,STOP,SKIP, IF,WHILE,SEQ,PAR,ALT} defines the set of occam state-ments andHLC: ocs→ hlc defines a set of control circuits that implements the occamhigh level statements. LetOP be a set of arithmetic/logical statement (arithmetic/logicaloperations),DP: op→ dp be a set of data-path circuits for the arithmetic/logical state-ments andLC: op→ lc a set of local control circuits for the arithmetic/logical statements.GHU(D) = {HLC,LC,DP} is defined as the generic hardware units set of a given descrip-tion D.

Given a processpi , the hardware process area in terms of data-path, local-control andhigh-level-control circuits is defined as:

Definition 14.3 (Hardware Process Area).Let AHop(pi ) be the summation of the availablefunctional units area that may carry out each arithmetic/logical operation,AHrw(pi ) be thearea concerning read/write variables,AHm(pi ) be the multiplexers area,AHlc(pi ) be thelocal control area andAHhlc(pi ) be the control circuits area for high level statements.AH(pi ) = AHop(pi ) + AHrw(pi ) + Am(pi ) + AHlc(pi ) + AHhlc(pi ) is defined as thehardware area for implementing the processespi .

14.3. High-Level Constructor Hardware Area Estimation

This section presents a method for estimating hardware area of high-level controllers. Theproposed hardware implementation of Petri nets assigns oneD flip-flop, ANDandORgatesto every place in the net. Transitions are implemented by usingAND gates. Figure 17shows the hardware implementation for each Petri net component: place, marked-placeand transition.

Hardware implementation of places considers that all flip-flops are cleared at power-up. Places with initial marking have inputs (NOR gate) and output inverted (Q). The


Figure 17.Hardware implementation of Petri components.

feedback around each flip-flop keeps its token and a previous synchronous reset feedbackto all preceding flip-flops (feedback from next stage) to clear tokens as a transition fires (seeFigure 17.a, b).

As a transition fires only when all input conditions are satisfied, it is implemented byANDgates when there exists more than one input. If a transition has more than one output place,the feedback to its input place is implemented also byAND gate. The inputs of such anANDgate come from the inputs of the flip-flops that implement the output places (feedbackto previous stage).

Taking into account the foregoing models, area estimates of places and transitions forhardware implementation are given below.

Definition 14.4 (Place Area Estimates).Let N = (P, T, I ,O, D) be a net andpj ∈ Pbe a place. LetFDA be the flip-flop D area, AA be a two inputAND gate area andOA be a two inputOR gate area. The hardware area for hardware implementation of aplace pj is estimated byAHpl(pj ) = FDA + AA× |O(pj )| + AO × |I (pj )|, where|I (pj )| and|O(pj )| represent the number of input and output transitions of the placepj ,respectively.


Definition 14.5 (Transition Area Estimates).Let N = (P, T, I ,O, D) be a net andti ∈ Tbe a transition. Let|I (ti )| and |O(ti )| be the number of input and output places of thetransitionti , respectively. LetAAbe a two inputANDgate area. The hardware area for theimplementation of a transitionti is given byAHtr (ti ) = Ait (ti )− Aot(ti ), where:

Ait (ti ) ={

AA× (|I (ti )| − 1) if |I (ti )| > 00 if |I (ti )| = 0

and

Aot(ti ) ={

AA× (|O(ti )| − 1) if |O(ti )| > 00 if |O(ti )| = 0

The area related to high-level control of a behavioral description described by a Petri netis defined in terms of the area of its places and transitions.

Definition 14.6 (High-Level Control Area).Let N = (P, T, I ,O, D) be a net representinga behavioral descriptionprk, AHpl(pj ) be the hardware area for a placepj ∈ P andAHtr tibe the area for a transitionti ∈ T . The area related to the high-level control is defined asAHhlc(prk) =

∑pj∈P AHpl(pj )+

∑ti∈T AHtr (ti ).

14.4. Local Controller Area Estimation

This section presents the approach adopted for estimating the local hardware control area.Local hardware controllers are hardware units that provide the step sequence required tocarry out the all operations within an arithmetic/logical expression in a process, or rather,it is not related to the occam high-level constructors.

Hence, a local controller area has to be estimated for each transition representing theevaluation of an arithmetic/logical expression. If this transition was obtained by reduction,the number of transitions reduced representing arithmetic/logical expressions (replicationnumber) has to be considered. Therefore, a number of local controllers equal to the repli-cation factor should be taken into account. Thus, the local controller area of the expressionassociated to such a transition is estimated as the area needed to implement one controllertimes its replication factor.

There are several methods for implementing a sequential hardware controller. Thesemethods include the delay element method, sequence counter method and the approachbased on ROM implementation. The method taken here is the ROM based method [9].

The local controller is synthesized as a finite state machine implemented with a stateregister and a ROM (see Figure 18).

The size of the state register depends on the number of states required to execute ev-ery operation within an assignment. The number of bits of the state register is equal tolog2

∑∀ej∈pri

,∑∀opi∈ej

#opi × DO Ph(opi ), where #opi : opi → N is the number of occur-rence of the operatoropi within an arithmetic/logical expressionej , OPS(pi ) = {op0, . . . ,

opk, . . . ,opn} is the set of operations of the arithmetic/logical expressionej of a process


Figure 18.Local controller.

pri andDO Ph(opi ) is the delay (in clock cycles) to carry out the operationopi . The stateregister inputs enable the execution (step sequence) of the operations. The state registeroutputs inform when the local final state has been reached. The local final state representsa given condition which states the execution of an assignment.

With respect to the ROM size, it is assumed that the word-width is equal to the number ofregisters plus the number of functional units plus the number of multiplexers (two-to-onemultiplexer type is assumed to be the adopted model). The number of words of the ROMis defined as the number of steps required to carry out the expression. It has been assumedthat operation within an arithmetic/logical expression is sequentially executed, that is, onlyone operation is executed at a time. Therefore, the number of words needed to implementthe ROM is estimated at

∑∀ej∈pri

∑∀opi∈ej

#opi × DO Ph(opi ).

Definition 14.7 (Local Hardware Control Area).Let N S= {pr0, . . . , pri , . . . , prn} bea set of simple processes,ej ∈ pri be an arithmetic/logical expression andOPS(pri ) ={op0, . . . ,opk, . . . ,opn} be the set of operations∀ej ∈ pri andDO Ph(opi ) be the delay (inclock cycles) needed to carry out the operationopi . Let #V S(ej ),∀ej ∈ pri ,∀pri ∈ N Sbe the number of registers within the expressionej (V S(ej ) is the set of all distinct vari-ables defined and used within the expressionej ). Let FUN(pri ,OP TYPE) be the func-tional unit number of the typeOP TYPE related to a processpri . Let M N(pri ) bethe number of multiplexers. The local controller area (number of bits) is estimated asAHlc(N S) = (

∑∀pri∈N S((

∑∀ej∈pri

#V S(ej ) +∑∀OP TYPE∈OPSFUN(pri ,OP TYPE) +

M N(pri )) × (∑∀ej∈pri

∑∀opi∈ej

#opi × DO Ph(opi )) + log2

∑∀ej∈pri

∑∀opi∈ej

#opi ×DO Ph(opi )))× AHb, whereAHb is hardware area for implementing one bit.

14.5. Data-Path Estimation

This section describes a method for estimating the data-path area of a given behavioraldescription.

The data-path circuit consists of registers, functional units and multiplexers. It was sup-posed that each assignment with more than one arithmetic/logical operation is implemented


Figure 19.Data-path model.

in such a way that each operation is executed. Therefore, a model is presented in Figure 19as a typical data-path which is used in our approach.

In the data-path model used, latches are inserted at the input and output ports of functionalunits in order to improve performance and versatility.

14.5.1. Functional Unit Area

The functional-unit area of a process is related to the area of ALU, adder, multiplier etcneeded to carry out arithmetic/logical operations of the assignments in a process.

If the designer knows the functional unit types that he/she has available in advance,they may adopt functional-unit area related to one that provides the greatest suitabilitydegree(max{S(pi , FUj )},∀FUj ). Nevertheless, this aspect may only be considered if afunctional-unit constraint list was provided by the designer, otherwise, the areas related tofunctional units that may execute each arithmetic/logical operation type of the expressionmust be considered without taking into account the suitability degree.

Another aspect that has to be taken into account is the possible functional unit sharing.This aspect is very much simplified when dealing only with simple processes. In this case,it has been assumed that each operation within an expression is performed sequentially andthat only one functional unit for each type of operation is used. It is important to highlightthat arithmetic/logical operations such assummation, subtractionetc could be executedby the same functional units, and thus they could be considered as being of the sametype. However a better estimate needs to be provided when considering more complexprocesses such as boxes and sets of simple processes. Such estimates should take into


account possible resource sharing of a model chosen to carry out a set of processes or evena piece of specification described by abox.

The first step when calculating the area for functional units is to determine the numberof functional units needed to execute a given behavioral description. The method adoptedprovides an upper bound for each operation type based on the precedence relation betweenoperators of the same type within aboxor in a set of processes.

In order to estimate this bound, the behavioral description is analyzed in terms of a causalprecedence relation of operators in such a specification, that is, either operators whichare combined to be executed in sequential fashion, the ones that have a causal relationdue to communication, or the ones that are in mutual exclusion due to shared variables orsemaphore implementation. Shared variable and semaphore implementation is beyond thescope of the present method, since occam has been adopted as a specification language andthe communication is represented by synchronous actions. Nevertheless, it is important tostress that the method proposed is able to consider mutually exclusive statements for thiskind implementations.

Before a formal description of such a method, let us provide an overview of it by consid-ering a small example:

INT a,b,c,d:SEQ

PARb:b+1a:a+1

c:=c+d

The Petri net model obtained from this program is presented in Figure 20. However, aclosure(t5) is applied to this net in order to make it strongly connected.

The causal precedence relation can be analyzed by means of p-minimum invariants(I Pi )

[73]. The first step of the method is to compute the number of adders needed to carry outthe description is the calculation of invariant supports. As a result, the following supportswere found:

(I P0): SP0 = { p0, p1, p3, p5, p6 }

(I P1): SP1 = { p0, p2, p4, p5, p6 }

After this, the transition-paths have to be computed. The result is provided below:

T P0 = { t0, t1, t3, t4 }

T P1 = { t0, t2, t3, t4 }

In order to calculate the functional unit upper bound number needed to execute thedescription, the minimal number of transition-paths has to be found. These paths should


Figure 20.Net Nb.

cover the transitions of the net of a given type (summation) that can be carried out by therelated functional units (adder).

For this example, two transition-paths are needed to cover the transition setT S(Nb, sum).

T S(Nb, sum) = { t1, t2, t4 }

Thus, the functional unit number obtained is equal to 2. After having this informalexplanation, let us approach it formally. Considering a set of processes represented by anet setN S(each process is represented by a netSNi ), the transition of a given type relatedto this set of processes is represented by the finite setT S(N S,OP TYPE).

Definition 14.8 (Type Transition Set).Let N = (P, T, I ,O,M0, D) be a strongly con-nected net covered by p-invariant andT C A ⊆ T be a set of communication transition(actions). LetSNi = (Si , Ti , Ii ,Oi ,Mi

0, Di ) and SNj = (Sj , Tj , I j ,Oj ,M j0 , Dj ) be

two nets representing processes whereSi , Sj ⊆ P, Si ∩ Sj = ∅ and Ti , Tj ⊂ T andTi ∩ Tj 6= ∅ iff ∃ tk ∈ Ti , Tj , T C A. Let N S= {SNh, . . . , SNl , . . . , SNn} be a finite netset. T S(N S,OP TYPE) = {te, . . . , tk, . . . , tr } is defined as a set of transitions of a giventype related to a net setN S.


The setT S(N S,OP TYPE) can be represented by a vectorT SV(N S,OP TYPE). Theformal definition is given below:

Definition 14.9 (Type Transition Vector). Let N = (P, T, I ,O,M0, D) be a net andT S(N S,OP TYPE) be a set of transition of the typeOP TYPEfor a given net setN S.

T SV(N S,OP TYPE): T →{

1, if type (ti ) = OP TYPE0, otherwise

defines a vector that represents the setT S(N S,OP TYPE), whereti ∈ T .

For a given strongly connected netN covered by p-invariants, let us consider a subnetSNi ⊆ N generated by a p-minimum invariant represented by a vectorI Pi . The transition-path-matrix of such a subnet is represented byOi .

Definition 14.10 (Transition-Path Matrix). Let N = (P, T, I ,O,M0, D) be a net andI Pi a p-minimum invariant. LetSNi = (P PSi , T PSi , Ii ,Oi ,Mi

0, Di ) ⊂ N be a stronglyconnected net obtained fromI Pi , P PSi ⊆ P, T PSi ⊆ T . T Pi : P × T → Oi (pk) isdefined as the transition-path matrix ofSNi |I Pi (pk) 6= 0,∀pk ∈ P.

After this, the set of all transition-paths(T Pi ) is defined.

Definition 14.11 (Transition-Path Set).Let T Pi be a transition-path matrix obtained froma p-minimum invariantI Pi of a netN. T P MS= {T P0, . . . , T Pi , . . . , T Pn} defines a setof transition-pathsT Pi of N.

Taking into account a set of processes represented byN Sand a transition set of a giventypeT S(N S,OP TYPE), if the transitions of such a set is covered by one transition-path,generated by one p-minimum invariant, their execution can be carried out by only onefunctional unit. In order to carry out each statement of a given type considering a specificset of processes(T S(N S,OP TYPE)), an upper bound number of functional units can beprovided by the minimal number of p-minimum invariants needed to generate the transition-paths that cover the transition members ofT S(N S,OP TYPE).

THEOREM 14.1 Let N = (P, T, I ,O,MO, D) be a strongly connected net covered byp-minimum invariants. Let T Pi be a transition-path matrix obtained from a p-minimuminvariant I Pi (SNi generator) of a set N. Let T S(N S,OP TYPE) ⊆ T be the transitionset of a given operation type related to a processes set N S and T SV(N S,OP TYPE) avector representing T S(N S,OP TYPE). The upper bound functional unit number of thetype OPTYPE related to N S is FUN(N S,OP TYPE) = #MIN T P, where#MIN T Pdenotes the minimal number of transition-paths T Pi needed to cover T S(N S,OP TYPE).

The proof of such theorem can be found in [75].

Definition 14.12 (Functional Unit Area). Let FUN(N S,OP TYPE) be functional unitnumber of the typeOP TYPE related to a set of processesN S. Let OPS(N S) be the


Figure 21.Temporal precedence.

set of distinct operation types in the processN S. Let opj be an operation within anarithmetic/logical expressione. AHop(N S) = ∑OP TYPE∈OS(N S) FUN(N S,OP TYPE) ×AHOP TYPEgives the functional unit area of a set of processes, whereAHOP TYPE is the areaassociated to the operator that implements an operation of the typeOP TYPE, consideringa given data type (number of bits).

The method proposed, however, only provides an upper bound. This approach does notdeal with temporal precedence relation between statements, or rather, statements that areneither under a causal precedence relationship nor in exclusive choice, but have a temporalprecedence relation. For instance, consider the example presented in Figure 21.

In this example, there is no causal precedence relation between the transitionst1 andt4. However, since after the firing of the transitiont0(m0(p0) = 1,M0[t0 >), both t1 andt2 become concurrently enabled(M0[t0 > M ′,M ′[t1 >,M ′[t2 > and I (t1) ∩ I (t2) = ∅)and are instantaneously fired (according to the firing semantics of timed Petri nets). Afterone time unit, one token is stored in the placesp3 and p4, respectively. This marking(m′′(p3) = 1,m′′(p4) = 1)enables the transitionst3 andt4(M ′′[t3 >,M ′′[t4 >). Therefore,there is a temporal precedence relation between the transitionst1 andt4. This precedencerelation is not captured by the method proposed.


14.5.2. Read/Write Variables Hardware Area

This section presents the method proposed for estimating the storage area related to read/writevariables of a given set of processes implemented as a hardware device.

Actually, registers (storage units) are required for holding values represented by variables,arrays and constants in a given behavioral description. The number of registers estimatedfor storing such values is obtained by simply assuming that each variable and constantestimated of each type is implemented as a separate register. The total read/write areaneeded to implement these registers is estimated by taking into account the total numberof bits used to specify all variables of a process multiplied by the hardware area needed toimplement one bit storage.

Definition 14.13 (Hardware Storage Area).Let V S(N S) be the set of all variables definedin a declarative section of a set of processesN S= {pr0, . . . , pri , . . . , prn}. Let N O B(x)be the number of bits of a variablex ∈ V S(pri ) andAHb the hardware area needed to storeone bit. AHrw(N S) = ∑

∀pri∈N S(∑∀x∈V S(pri )

N O B(x) × AHb) estimates the hardwarestorage area of a given set of processesN S.

14.5.3. Multiplexer Area

Herewith the method for estimating the number of multiplexers of a behavioral description isdescribed. The proposed method uses a two-to-one multiplexer as a model (see Figure 19).The total multiplexer area of a set of simple processesN S is estimated by adding themultiplexer area of each process member of the setN S. The multiplexer area of oneprocess can be estimated by taking into account the number of operators of the process.The area of one multiplexer is calculated by multiplying the two to one-bit multiplexer areaby word-width.

For instance, consider the implementation of the expressionx = a+b+c+d in the data-path of Figure 19, where the variablesa,b, c andd are assigned to the registersr1, r2, r3

andr4, respectively. Taking into account the model proposed, the number of multiplexersrequired to implement such arithmetic expression is equal to 3.

Definition 14.14 (Multiplexer Area).Let N S= {pr0, . . . , pri , . . . , prn} be a set of simpleprocesses. LetOPS(pri ) be the multi-set of operations inpri . Let N O B(opj ) be thenumber of bits of the operationopi ∈ OPS(pri ). Let AM1 be the area of two to one-bitmultiplexer. LetM N(N S) = ∑

pri∈N S

∑opj∈OPS(pi )

#opj be the number of multiplexers

required to carry outN S. Am(N S) =∑pri∈N S

∑opj∈OPS(pri )

(#opj × N O B(opj )× AM1)

estimates the multiplexer area of given set of processesN S.

The use of the approach proposed for estimating area and compare the result obtainedwith the values measured in the Altera prototyping tool. The experiments have been carriedout by considering the Flex10k family devices.


Figure 22.Occam-example ex.

Figure 22.a shows the occam description which has its control flow represented by thetimed Petri net described in the Figure 22.b. The delay related to summations is the timeto carry out the operation when using a functional unit (32-bit adder) implemented by theparameterized Altera tool (34.7ns). The clock period chosen is the minimal time neededto carry out an arithmetic operation. As the example takes into account addition, the clockperiod was rounded up to 40ns.

The results estimated are summarized in the Table 9, whereAHrw(Ex) represents thestorage area,AH+(Ex) estimates the functional unit area,AHhlc(Ex) is related to the high-level control area,AHlc(Ex) is the local control area andAH(Ex)e is total area estimatedfor the example.

The area measured when implementing such algorithm in the Altera tool wasAH(Ex)m =231 logic cells (LCs). The result obtained was 95% accurate. Similar results have beenobtained for several other small examples which considered different types of occam con-

Table 9.Area estimated.

AHrw(Ex) 128 LC

AH+(Ex) 63 LC

AHhlc(Ex) 21 LC

AHlc(Ex) 0

AH(Ex)e 212 LC


Figure 23.Pneumatic control system.

structors, but for large dimension example, especially when considering optimizations, itis not assured that this high-level accuracy degree will be kept.

15. Example

This section uses the description of a small pneumatic control system to illustrate thepartitioning process. The obtained communication cost, mutual exclusion degree, loadbalance and area estimates are also presented.

The system considered in this section controls a pneumatic system (see Figure 23) of amanufacturing production line. Actually, this system controls the pressure of air-compressordevice. The pressure should be allowed only for small variations and the engine shouldwork in an economic way. In order to achieve such a goal, one clutch devices has been usedto connect or disconnect the engine to the air-compressor.

The system starts when the switchS is switched-off. The controller implements a star-triangle power-on system, that is, the engine starts in a star configuration(OUT10,OUT11)

and then, after a determined delay, switches to a triangle configuration(OUT9,OUT11).When the pressure inside the compressor achieves a specified value (read throughI N2), theaxe’s engine is disconnected from the compressor by the clutch system (the order is sentthroughOUT12) in order to keep a constant pressure. If after a while the manufacturing linedoes not use air, the engine is switched-off. The use of a clutch system is very important,since it allows not to switch off the engine in the exact moment that pressure achieves aspecified value. Without using such a system the demanded power would be much higherdue to the frequent turn on/off of the engine. Some statistics are also provided to a monitorsystem. Those describe the start rate of the engine as well as the relative number of enginestarts considering the number of time the clutch disconnected the engine’s axe. This allowsfor timing adjusts in the clutch system.


Figure 24.Functional diagram.

The occam program representing this pneumatic control system is composed of elevensimple processes. Theses processes exchange information through channels according toCSP semantics. Figure 24 shows a block diagram representing the connection betweenthose processes as well as the interface points from sensors and to actuators.

The occam program which implements the behavior is presented in appendix. Thisprogram was obtained after the splitting phase. Due to space restriction, the description ispresented in a linear format.

After the classification phase and the translation into Petri net model, the qualitativeanalysis can be carried out. The results obtained in this phase are presented below:

B SB L REV S MG SM FC

Y Y Y Y Y N N Y3

This result presents interesting properties related to this model. The system is boundedand structurally bounded, which means that for any initial marking it is still a boundedmodel. The model is live, reversible and safe. If a model has such properties, all of itstransitions are fired at least once. The model is also a free choice system, although it isneither a marked graph nor a state machine Petri net. Nevertheless, such a system allows acontrolled conflict.

The allocation process is carried out by using a clustering algorithm [74], which buildsa tree by considering communication costs, processor’s load balance and mutual exclusiondegree between processes [69, 70, 72, 73]. The globally normalized communication cost,locally normalized load balance and the mutual exclusion degree of pairs of processes ofthe example are depicted in Figure 25, respectively.


Figure 25.NCC, LME, LLB of pairs of processes.

The cost functionC L M(NCC, L M E, LLC, the clustering tree (allocation tree) builtfrom this cost function as well as the cost functionAC = AC(NCC(pri ), Nload(pri , pK ),L M E(pri )) are depicted in Figure 26.

After obtaining clusters, one process in each cluster should be chosen to be allocated ineach processor of the architecture. This choice is carried out considering the minimizationof the cost functionAC = AC(NCC(pri ), Nload(pri , pK ), L M E(pri )). Figure 26 alsopresents the communication cost and the mutual exclusion degree of each process as well asthe workload of each process for the TransputerT800 and a summary of the cost functionAC.

Considering a target architecture with two microprocessors (Transputer T800 in this case),the allocation algorithm chooses processesP9 to be allocated in one processor and processP6 to be implemented in the other one.


Figure 26.Allocation.


Once one process is allocated in each software component, the clustering phase takesplace. In this phase a clustering tree is built according to the algorithm described inSection 4.3.2. The clustering tree, which is depicted in Figure 27.b, is based on the distancematrix presented in Figure 27.a.

The clustering process results 3 clusters, one to be implemented in hardware and two tobe implemented in software: each one by using a distinct microprocessor.

The allocation and clustering phases have been carried out by taking into account theresults of the quantitative analysis tool.

Due to the high delay when implementing processesP4 andP5 in software, they shouldbe implemented in hardware. ProcessP7 has also migrated to software because of the highcommunication cost with the processP4.

16. Conclusion

This work presented based on Petri net for hardware/software codesign which is being usedin the context of the PISH co-design system.

Petri nets are a powerful family of formalism which allows for qualitative and quan-titative analysis of behavioral descriptions. In this work, the use of Petri nets is re-lated to quantitative analysis in order to compute metrics for hardware/software parti-tioning such as communication cost, workload of processors, mutual exclusion, area anddelay.

The results of this analysis is being used for initial allocation of processes as well asthe clustering phase, where processes are grouped in clusters to be implemented either inhardware or in software.

The use of Petri net as an intermediate format allows for a more accurate metric estimationfor hardware/software partitioning process, as well as provides a format that is independentof the description language. Additionally, a qualitative analysis of the description may alsobe performed.

In order to reduce the computational complexity when calculating the mentioned codesignmetrics, techniques base on structural analysis have been proposed.

The computation of those metrics have been implemented in C language and also takesinto account the results obtained from structural analysis provided by INA tool. Someresults are illustrated by a case study represented by a pneumatic control system.

The use of Petri nets opens a wide range for improvements in the PISH hardware/softwarecodesign system. Dynamic analysis may be performed by using results of a profiling asprobability value associated to transitions belonging to IF/ALT combiners or external data-dependent loops.

Moreover, granularity of processes can be dynamically determined, along with partition-ing, by the analysis of sub-nets which fulfills design constraints. These improvements canbe seen as future works, which become feasible due to the use of Petri net as intermediateformat.


Figure 27.Clustering.


Appendix


Acknowledgments

The authors would like to thank the anonymous referees for their precise and valuableconsiderations. This research has been carried out with support from KIT Co-operationactivity 128.

Notes

1.

• serial-placesreduction: LetN = (R,M0) be a net, a transitiontk, the placespi and pj . If (I (tk) = [ pi ]andO(tk) = [ pj ]), we may transformN = (R,M0) into N ′ = (R′,M ′0) by eliminating the transitiontk andreducing the placespi and pj to the placepi /j such thatI (pi /j ) = I (pi ) andO(pi /j ) = O(pj ).

• parallel-placesreduction: LetN = (R,M0) be a net,pi and pj be places andtm andtn be transitions. IfI (pi ) = I (pj ) = [tm] and O(pi ) = O(pj ) = [tn], we may transformN = (R,M0) into N ′ = (R′,M ′0) byreducing the placespi andpj to the placepi /j such thatI (pi /j ) = I (pi ) = I (pj ) andO(pi /j ) = O(pi ) =O(pj ).

2. smex(pri , prj ) represents∑

pk∈pri ,pr ∈prjM E X(pk, pr ). rps(pk) and rps(pr ) is the number of places

which the placespk and pr , in the reduced net, represent in original net.3. B-bounded, SB-structurally bounded, L-live, REV-reversible, S-safe, MG-marked graph, SM-state machine,

FC-free choice.

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a petri net model for hardware software codesign

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