hardware software codesign of embedded...

32
1 Mahapatra - Texas A&M - Fall 00 1 Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra - Texas A&M - Fall 00 2 Today’s topics Course Organization Introduction to HS-CODES Codesign Motivation Some Issues on Codesign of Embedded System

Upload: others

Post on 14-Apr-2020

37 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

1

Mahapatra - Texas A&M - Fall 00 1

Hardware SoftwareCodesign of Embedded System

CPSC489-501

Rabi Mahapatra

Mahapatra - Texas A&M - Fall 00 2

Today’s topics

• Course Organization

• Introduction to HS-CODES

• Codesign Motivation

• Some Issues on Codesign of EmbeddedSystem

Page 2: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

2

Mahapatra - Texas A&M - Fall 00 3

Course Organization

Lectures: HRBB 126, MWF 11:30 - 12:20

Laboratory: HRBB 218, TBD (Some Two hours exceptMTWR afternoons)

Teaching Assistant: Brian G. [email protected] Send emails for alias

Instructor’s office Hours: By appointmentContact: [email protected], 5-5787

Mahapatra - Texas A&M - Fall 00 4

Course organization: Gradings

Two tests: 50%

Labs: 20%

Projects: 20%

Assignments/Term papers: 10%

Projects and Labs: Team work

Term papers: Individual responsibility

Page 3: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

3

Mahapatra - Texas A&M - Fall 00 5

Course policies

• Required to access the course web page forrelevant info during the semester

• class attendance is required

• use emails for effective communicationwith TA and Instructor

• all assigned papers are required materials

• follow lab and univ rules

Mahapatra - Texas A&M - Fall 00 6

Topics to be covered(order and details may change)

1. Codesign overview

2. Models and methodologies of system design

3. Hardware software partitioning and scheduling

4. Cosimulation, synthesis and verifications

5. Architecture, Interface and reconfiguration

6. System on chip

7. Application specific processors (DSP)

8. Codesign tools and case studies

Page 4: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

4

Mahapatra - Texas A&M - Fall 00 7

Texts

• Staunstrup and Wolf Ed. “HardwareSoftware codesign: principles and practice”,Kluwer Publication, 1997

• Gajski, Vahid, Narayan and Gong,“Specification, Design of EmbeddedSystems”, Prentice Hall, 1994

• Suggested papers in the class web

Mahapatra - Texas A&M - Fall 00 8

Reading assignment

• Giovanni De Micheli and Rajesh Gupta,“Hardware/Software co-design”, IEEEProceddings, vol. 85, no.3, March 1997, pp.349-365.

Page 5: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

5

Mahapatra - Texas A&M - Fall 00 9

Introduction

Digital systems designs consists ofhardware components and softwareprograms that execute on the hardwareplatforms

Hardware-Software Codesign ?

Mahapatra - Texas A&M - Fall 00 10

Microelectronics trends

• Better device technology– reduced in device sizes

– more on chip devices > higher density

– higher performances

Page 6: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

6

Mahapatra - Texas A&M - Fall 00 11

Microelectronics trends

• Higher degree of integration– increased device reliability

– inclusion of complex designs

Mahapatra - Texas A&M - Fall 00 12

Digital Systems

Judged by its objectives in application domain

• Performance

• Design and Manufacturing cost

• Ease of Programmability

Page 7: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

7

Mahapatra - Texas A&M - Fall 00 13

Digital Systems

Judged by its objectives in application domain

• Performance

• Design and Manufacturing cost

• Ease of Programmability

It depends on both the hardware andsoftware components

Mahapatra - Texas A&M - Fall 00 14

Hardware/Software Codesign

A definition:

Meeting System level objectives by exploiting the synergism of hardware and software

through their concurrent design

Page 8: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

8

Mahapatra - Texas A&M - Fall 00 15

Concurrent design

Traditional design flow Concurrent (codesign)flow

HW SW

start

start

HW SWDesigned by independent groups of experts Designed by Same group of

experts with cooperation

Mahapatra - Texas A&M - Fall 00 16

Codesign motivation

Trend toward smaller mask-level geometries leads to:

• Higher integration and cost of fabrication.

• Amortize hardware design over largevolume productions

Suggestion:

Use software as a means of differentiatingproducts based on the same hardwareplatform.

Page 9: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

9

Mahapatra - Texas A&M - Fall 00 17

Story of IP cores

What are these IP Cores?

Predesigned, preverified silcon circuit block, usuallycontaining 5000 gates, that can be used in building largerapplication on a semiconductor chip.

Mahapatra - Texas A&M - Fall 00 18

Story of IP cores

Complex macrocells implementing instruction setprocessors (ISP) are available as cores

• Hardware (core)

• Software (microkernels)

Are viewed as intelectual property

Page 10: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

10

Mahapatra - Texas A&M - Fall 00 19

IP core reuse

• Cores are standardized for reuse as systembuilding blocks

Rationale: leveraging the existing softwarelayers including OS and applications in ES

Results:1. Customized VLSI chip with better area/ performance/

power trade-offs2. Systems on Silicon

Mahapatra - Texas A&M - Fall 00 20

Hardware Programmability

Traditionally

• Hardware used to be configured at the time ofmanufacturing

• Software is variant at run time

The Field Programmable Gate Arrays (FPGA)has blurred this distinction.

Page 11: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

11

Mahapatra - Texas A&M - Fall 00 21

FPGAs

• FPGA circuits can be configured on-the-fly to implement aspecific software function with better performance than onmicroprocessor.

Mahapatra - Texas A&M - Fall 00 22

FPGAs

• FPGA circuits can be configured on-the-fly to implement aspecific software function with better performance than onmicroprocessor.

• FPGA can be reprogrammed to perform another specificfunction without changing the underlying hardware.

Page 12: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

12

Mahapatra - Texas A&M - Fall 00 23

FPGAs

• FPGA circuits can be configured on-the-fly to implement aspecific software function with better performance than onmicroprocessor.

• FPGA can be reprogrammed to perform another specificfunction without changing the underlying hardware.

This flexibility opens new applications ofdigital circuits.

Mahapatra - Texas A&M - Fall 00 24

Why codesign?

• Reduce time to market

Page 13: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

13

Mahapatra - Texas A&M - Fall 00 25

Why codesign?

• Reduce time to market

• Achieve better design• Explore alternative designs

• Good design can be found by balancing the HW/SW

Mahapatra - Texas A&M - Fall 00 26

Why codesign?

• Reduce time to market

• Achieve better design• Explore alternative designs

• Good design can be found by balancing the HW/SW

• To meet strict design constraint• power, size, timing, and performance trade-offs

• safety and reliability

• system on chip

Page 14: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

14

Mahapatra - Texas A&M - Fall 00 27

Distinguishing features of digitalsystem

• Interrelated criteria for a system design

HardwareTechnology

Level ofIntegration

Degree of Programmability

ApplicationDomain

Mahapatra - Texas A&M - Fall 00 28

Application Domains

• General purpose computing system• usually self contained and with peripherals

• Information processing systems

Page 15: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

15

Mahapatra - Texas A&M - Fall 00 29

Application Domains

• General purpose computing system• usually self contained and with peripherals

• Information processing systems

• Dedicated control system• part of the whole system, Ex: digital controller in a

manufacturing plant

• also, known as embedded systems

Mahapatra - Texas A&M - Fall 00 30

Embedded System

• Uses a computer to perform certain functions

• Conceived with specific application in mind• examples: dash controller in autombiles, remote

controller for robots, answering machines, etc.

Page 16: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

16

Mahapatra - Texas A&M - Fall 00 31

Embedded Systems

• Uses a computer to perform certain functions

• Conceived with specific application in mind• examples: dash controller in autombiles, remote

controller for robots, answering machines, etc.

• User has limited access to system programming• system is provided with system software during

manufacturing

• not used as a computer

Mahapatra - Texas A&M - Fall 00 32

Degree of Programmability

Most digital systems are programmed bysome software programs for functionality.

Two important issues related to programming:

• who has the access to programming?

• Level at which programming is performed.

Page 17: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

17

Mahapatra - Texas A&M - Fall 00 33

Degree of Programmability:Accessibility

Understand the role of:

End users, application developers, systemintegrator and component manufacturers.

Mahapatra - Texas A&M - Fall 00 34

Degree of Programmability:Accessibility

Understand the role of:

End users, application developers, systemintegrator and component manufacturers.

Application Developer: System to be retargetable.

Page 18: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

18

Mahapatra - Texas A&M - Fall 00 35

Degree of Programmability:Accessibility

Understand the role of:

End users, application developers, systemintegrator and component manufacturers.

Application Developer: System to be retargetable.System Integrator: Ensure compatibility of system

components

Mahapatra - Texas A&M - Fall 00 36

Degree of Programmability:Accessibility

Understand the role of:

End users, application developers, systemintegrator and component manufacturers.

Application Developer: System to be retargetable.System Integrator: Ensure compatibility of system

componentsComponent Manufactures: Concerned with maximizing

product reuse

Page 19: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

19

Mahapatra - Texas A&M - Fall 00 37

Degree of Programmability

Example 1: Personal computer

End User: Limited to application level

Application Dev.: Language tools, Operating System, high-level programming environment (off the self components)

Component Manf.: Drive by bus standards, protocols etc.

Observe that: coalescing the system components due to higher chip densityResult: Few but more versatile system hardware components

Mahapatra - Texas A&M - Fall 00 38

Example 2.

Embedded Systems

• End user: Limited access to programming

• Most software is already provided by system integrator who could be application developer too!

Page 20: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

20

Mahapatra - Texas A&M - Fall 00 39

Level of Programmability

• Systems can be programmed at application,instruction and hardware levels

• Application Level: Allows users to specify “option offunctionality” using special language.

• Example: Programming VCR or automated steeringcontrol of a ship

Mahapatra - Texas A&M - Fall 00 40

Level of Programmability

• Instruction-level programmability– Most common ways with ISA processors or

DSP• compilers are used in case of computers• In case of embedded systems, ISA is NOT

visible

Page 21: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

21

Mahapatra - Texas A&M - Fall 00 41

Level of programmability

• Hardware level programmability

Example: Microprogramming (determine the behavior of control unit bymicroprogram)

• Emulating another architecture by alternation of µp

• Some DSP implementations too

• Never in RISC or ISA processors

configuring the hardware (after manufacturing) in the desired way.

Mahapatra - Texas A&M - Fall 00 42

Programmability

Microprogramming Vrs. Reconfigurability

Microprogram allows to reconfigure the control unitwhereas Reconfigurable system can modify both

datapath and controller.

Page 22: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

22

Mahapatra - Texas A&M - Fall 00 43

Programmability

Microprogramming Vrs. Reconfigurability

Microprogram allows reconfigure the control unitversus Reconfigurable system can modify both

datapath and controller.

Reconfigurability increases usabilitybut not the performance of a system.

Mahapatra - Texas A&M - Fall 00 44

Performance andProgrammability

• General computing applications: use of superscalarRISC architecture to improve the performance (instructionlevel programming)

Page 23: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

23

Mahapatra - Texas A&M - Fall 00 45

Performance andProgrammability

• General computing applications: use of superscalarRISC architecture to improve the performance (instructionlevel programming)

• Dedicated Applications: Use of application specificdesigns (ASICs) for power and performance

• Neither reusable nor cheap!

Mahapatra - Texas A&M - Fall 00 46

Performance andProgrammability

• General computing applications: use of superscalarRISC architecture to improve the performance (instructionlevel programming)

• Dedicated Applications: Use of application specificdesigns (ASICs) for power and performance

• Neither reusable nor cheap!

What if ASICs with embedded cores?

Page 24: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

24

Mahapatra - Texas A&M - Fall 00 47

Performance andProgrammability

• Any other solutions?How about replacing the standard processors byapplication specific processors that can be programmedat instruction level (ASIPs).

• Better power-performance than standard processor ?

• Worse than ASICs

Mahapatra - Texas A&M - Fall 00 48

Programmability and Cost:ASIPs

• Cost can typically be amortized over largervolume than on ASICs (with multipleapplications using ASIPs).

• Ease to update the products and engineeringchanges through programming the HW,

• However, includes compiler as additionalcost

Page 25: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

25

Mahapatra - Texas A&M - Fall 00 49

Hardware Technology

• Choice of hardware to implement the designaffects the performance and cost

• VLSI technology (CMOS or bipolar, scaleof integration and feature size etc.) canaffect the performance and cost.

Mahapatra - Texas A&M - Fall 00 50

Hardware Technology: FPGAs

• Performance is an order of magnitude lessthan corresponding non-programmabletechnology with comparable mask size

• For high volume production, these are moreexpensive than ASICs

Page 26: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

26

Mahapatra - Texas A&M - Fall 00 51

Level of Integration

• Integration leads to reducing number ofparts, which means, increased reliability,reduced power and higher performances

• But it increases the chip size (cost) andmakes debugging more challenging.

• Standard components for SoC are cores,memory, sensors and actuators.

Mahapatra - Texas A&M - Fall 00 52

Embedded System DesignObjective

• Embedded systems:control systems: reactive, real-time

♦function & size: micro controller to highthroughput data-processor

• requires leveraging the components and cores ofmicroprocessors

• reliability, availability and safety are vital• use of formal verification to check the correctness

• may use redundancy

Page 27: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

27

Mahapatra - Texas A&M - Fall 00 53

Codesign of ISA

• ISA is fundamental to digital system design• An instruction set permits concurrent design of HW

and compiler developments• Good ISA design is critical in achieving system

usability across applications• Goal of codesign in ISP development is to optimize

HW utilization by application & OS

Mahapatra - Texas A&M - Fall 00 54

Codesign of ISA

• For high performance in ES, selection ofinstruction set that matches the applicationis very important

• replace the standard core by ASIP

• ASIPs are more flexible than ASICs butless than ISP

• ASIP performs better than ISP

Page 28: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

28

Mahapatra - Texas A&M - Fall 00 55

Challenges with ASIP

• Compatibility requirement is less important

• Goal: support specific instruction mixes

• CAD of compiler is partly solved problem

Price of the flexibility in choosing mixed instruction set is to develop the application specific compiler.

Mahapatra - Texas A&M - Fall 00 56

Typical codesign process

SystemDescription

HW/SWPartitioning

Softwaresynthesis

Interfacesynthesis

Hardwaresynthesis

Systemintegration

Modeling

Unified representation

Instruction set levelHW/SW evaluation

Page 29: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

29

Mahapatra - Texas A&M - Fall 00 57

Steps in Codesign

HW-SW system involves

• specification• modeling• design space exploration and partitioning

• synthesis and optimization

• validation• implementation

Mahapatra - Texas A&M - Fall 00 58

Steps in codesign

Specification• List the functions of a system that describe the

behavior of an abstraction clearly with outambiguity.

Modeling:• Process of conceptualizing and refining the

specifications, and producing a hardware andsoftware model.

Page 30: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

30

Mahapatra - Texas A&M - Fall 00 59

Modeling style

• Homogeneous: a modeling language or agraphical formalism for presentation

• partitioning problem used by the designer

• Heterogeneous: multiple presentations• partitioning is specified by the models

Mahapatra - Texas A&M - Fall 00 60

Steps in codesign

Validation:

Process of achieving a reasonable level ofconfidence that the system will work asdesigned.

• Takes different flavors per application domain:cosimulation for performance and correctness

Page 31: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

31

Mahapatra - Texas A&M - Fall 00 61

Steps in codesign

Implementation:

Physical realization of the hardware(through synthesis) and of executablesoftware (through compilation).

Mahapatra - Texas A&M - Fall 00 62

Partitioning and Scheduling(where and when)

• A hardware/software partitioning representsa physical partition of system functionalityinto application-specific hardware andsoftware.

• Scheduling is to assign an execution starttime to each task in a set, where tasks arelinked by some relations.

Page 32: Hardware Software Codesign of Embedded Systemcourses.cs.tamu.edu/rabi/cpsc489/lectures/lecture... · Hardware Software Codesign of Embedded System CPSC489-501 Rabi Mahapatra Mahapatra

32

Mahapatra - Texas A&M - Fall 00 63

Summary:Research areas in codesign

• Languages

• Architectural exploration tools

• Algorithms for partitioning

• Scheduling

• SW, HW and interface Synthesis

• Verification and Testing