System On Chip - SoC

System On Chip - SoC 13 iPod Shuffle

3 iPod Shuffle

2 iPod Shuffle MP3 player

3 iPod Shuffle

K9HB608U1A-BCBC MP3 Player

OutlineIntroduction What is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 7Introduction

Technological Advancestodays chip can contains 100M transistorstransistor gate lengths are now in term of nano meters approximately every 18 months the number of transistors on a chip doubles Moores law The Consequencescomponents connected on a Printed Circuit Board can now be integrated onto single chip hence the development of System-On-Chip design

8OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 9What is SoC ?People A: The VLSI manufacturing technology advances has made possible to put millions of transistors on a single die. It enables designers to put systems-on-a-chip that move everything from the board onto the chip eventually.People B: SoC is a high performance microprocessor, since we can program and give instruction to the uP to do whatever you want to do.People C: SoC is the efforts to integrate heterogeneous or different types of silicon IPs on to the same chip, like memory, uP, random logics, and analog circuitry.

All of the above are partially right, but not very accurate!!!10What is SoC ?SoC not only chip, but more on system. SoC = Chip + Software + IntegrationThe SoC chip includes: Embedded processor ASIC Logics and analog circuitry Embedded memoryThe SoC Software includes: OS, compiler, simulator, firmware, driver, protocol stackIntegrated development environment (debugger, linker, ICE)Application interface (C/C++, assembly)The SoC Integration includes : The whole system solution Manufacture consultant Technical Supporting11OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 12System on Chip architectureTop Level DesignUnit Block DesignIntegration and SynthesisTrial NetlistsSystem Level VerificationTiming Convergence& VerificationFabricationDVTDVT Prep6 12 12 4 14 ??58Time in WeeksTime to Mask order4861Unit Block VerificationASIC Typical Design StepsTypical ASIC design can take up to two years to complete13System on Chip architectureTop Level DesignUnit Block DesignIntegration and SynthesisTrial NetlistsSystem Level VerificationTiming Convergence& VerificationFabricationDVTDVT Prep4 14 54Time in WeeksTime to Mask order2433Unit Block Verification4 2 With increasing Complexity of ICs and decreasing Geometry, IC Vendor steps of Placement, Layout and Fabrication are unlikely to be greatly reduced

In fact there is a greater risk that Timing Convergence steps will involve more iteration.

Need to reduce time before Vendor Steps.

Need to consider Layout issues up-front.SoC Typical Design Steps14System on Chip interconnectionDesign reuse is facilitated if standard internal connection buses are used .All cores connect to the bus via a standard interface .Any-to-any connections easy but Not all connections are necessary .Global clocking scheme .Power consumption .Standardization is being addressed by the Virtual Socket Interface Alliance (VSIA)

15System on Chip interconnectionAMBA (Advanced Microcontroller Bus Architecture) is a collection of buses from ARM for satisfying a range of different criteria. APB (Advanced Peripheral Bus): simple strobed-access bus with minimal interface complexity. Suitable for hosting peripherals.ASB (Advanced System Bus): a multimaster synchronous system bus.AHB (Advanced High Performance Bus): a high- throughput synchronous system backbone. Burst transfers and split transactions.

16System on Chip coresOne solution to the design productivity gap is to make ASIC designs more standardized by reusing segments of previously manufactured chips.These segments are known as blocks, macros, cores or cells.The blocks can either be developed in-house or licensed from an IP company.Cores are the basic building blocks .17System on Chip coresSoft MacroReusable synthesizable RTL or netlist of generic library elementsUser of the core is responsible for the implementation and layoutFirm MacroStructurally and topologically optimized for performance and area through floor planning and placementExist as synthesized code or as a netlist of generic library elementsHard MacroReusable blocks optimized for performance, power, size and mapped to a specific process technologyExist as fully placed and routed netlist and as a fixed layout such as in GDSII format .18System on Chip coresReusability portabilityflexibilityPredictability, performance, time to marketSoftcoreFirmcoreHardcore19System on Chip coresLocating the required cores and associated contract discussions can be a lengthy processIdentification of IP vendorsEvaluation criteriaComparative evaluation exerciseChoice of coreContract negotiationsReuse restrictionsCosts: license, royalty, tool costsCore integration, simulation and verification20OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 21The BenefitsThere are several benefits in integrating a large digital system into a single integrated circuit .These includeLower cost per gate .Lower power consumption .Faster circuit operation .More reliable implementation .Smaller physical size .Greater design security .22The DrawbacksThe principle drawbacks of SoC design are associated with the design pressures imposed on todays engineers , such as :

Time-to-market demands .Exponential fabrication cost .Increased system complexity .Increased verification requirements .23Design gap

24OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 25Solution is Design Re-useOvercome complexity and verification issues by designing Intellectual Property (IP) to be re-usable .Done on such a scale that a new industry has been developed.Design activity is split into two groups:IP Authors producers .IP Integrators consumers .IP Authors produce fully verified IP libraries Thus making overall verification task more manageableIP Integrators select, evaluate, integrate IP from multiple vendorsIP integrated onto Integration Platform designed with specific application in mind26OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 27Major SoC ApplicationsSpeech Signal Processing .Image and Video Signal Processing .Information Technologies PC interface (USB, PCI,PCI-Express, IDE,..etc) Computer peripheries (printer control, LCD monitor controller, DVD controller,.etc) .Data CommunicationWireline Communication: 10/100 Based-T, xDSL, Gigabit Ethernet,.. EtcWireless communication: BlueTooth, WLAN, 2G/3G/4G, WiMax, UWB, ,etc28OutlineIntroductionWhat is SoC ?SoC characteristics Benefits and drawbacks Solution Major SoC Applications Summary 29Summary Technological advances mean that complete systems can now be implemented on a single chip .

The benefits that this brings are significant in terms of speed , area and power .

The drawbacks are that these systems are extremely complex requiring amounts of verification .

The solution is to design and verify re-useable IP .30SoC TrendsThe SoC Paradigm and Key TrendsTime to Market PressureDesign Complexity IssuesDeep Submicron Effects31Moores Law and Technology Scaling

32ITRS Roadmap

33Accelerated IC Process Technology

34SoC Paradigm

35SoC Co-Design Flow

36SoC: At the Heart of Conflicting Trends

37Ths SoC Challenges and Key Enablers38Evolutionary ProblemsKey ChallengesImprove productivityHW/SW codesign, Transaction-Level ModelingIntegration of analog & RF IpsImproved DFTEvolutionary techniques:IP (Intellectual Property) based designPlatform-based design

39SoC Economic Trends: Mask NRE

40Productivity Gap

41ASIC v.s. FPGA Complexity

42Key TrendsASIC/ASSP (application-specific standard-product) ratio:80/20 in 2000, 50/50 nowIn-house ASIC design is downReplaced by off-the-shelf, programmable ASSPNumber embedded processors in SoC rising:ST: recordable DVD 5Hughes: set-top box 7Agere: Wireless base station 8ST: HDTV platform 8Latest mobile handsets 10NEC: Image processor 128ST: NPU >15043IP Reuse and IP-Based SoC Design

44SoC Design + Rising Complexity = New Challenges

45Key Trends: Embedded S/W Content in SoC is Way UpeS/W: Current application complexitySet-top box: >1 million lines of codeDigital audio processing: >1 million lines of codeRecordable DVD: Over 100 person-years effortHard-disk drive: Over 100 person-years effortIn multimedia systemsS/W cost (licenses) 6X larger than H/W chip costeS/W uses 50% to 80% of design resourceseS/W now an essential part of SoC products

46Current PracticeHeterogeneous multi-processor SoCs are already current practiceProblem is that each system is an ad-hoc solution: reaching complexity barrierLittle flexibilityNo effective programming modelLots of low-level programmingPoor SW productivityCode not portable

47Next-Generation SoC Platforms Key ObjectivesFlexibility: amortize NRE over more productsSofter systems: eFPGA, eSoG, eProcessors, combined with standard H/W IP (I/O, peripherals)Fast platform implementationUse of synthesizable, off-the-shelf IP componentsScalable SoC interconnectTrend towards standardized platformsFast time-to-market for platform userNeed clean programming modelShield architecture complexity

48Networks on a chip

49SoC for DVB

50Network Processor

51