Power Comparison Between High-Speed Electrical

and Optical Interconnects for Interchip Communication

High Speed Circuits & Systems Laboratory

Joungwook Moon

2011. 6.13

Contents

Introduction1.

Optical Interconnect Power Dissipation2.

Electrical Interconnect Power Dissipation3.

Comparison Between Electrical & Optical4.

Conclusion5.

Contents

Introduction1.

Optical Interconnect Power Dissipation2.

Electrical Interconnect Power Dissipation3.

Comparison Between Electrical & Optical4.

Conclusion5.

Introduction

• About Paper

• Author

• Presents an optimization scheme to minimize optical interconnect power and quantify its performance.

• Examine the power dissipation of a state-of-art elec-trical interconnection.

• Comparisons between optical and electrical inter-connects, BW at 6Gb/s at 100nm technology.

Introduction

• Different classes of digital systems impose specific re-quirements on the communication medium

• Long-haul systems use optical fibers : low attenuation at high bandwidths

• Shorter systems traditionally use Cu interconnects• The mordern IC increases dramatically, and applications

are struggling to keep up bandwidth Optical medium of communication to penetrate the short

distance world Cabinet level(1~100m) - (O) Backplane level between boards (10cm ~1m) –(O) Chip to chip level ( < 10cm) – Optoelectric conversion overhead, Microprocessor ~ DRAM Latency issue (X) BUT... On chip level( < 2cm) – Cheaper, Power, low swing (X)

Introduction

• Digital systems with communication bandwidth limita-tion can benefit enormously from the choice of optical medium

• limitated board space, connector density, pin count, insuffi-cient SNR, ISI, noise , crosstalk, impedance mismatch, package induced reflection, etc...

• In this paper, more comprehensive view of both Cu and optical systems for short distance, off-chip, band-width-sensitive applications

• Compare power dissipation with relevant parameter– Bandwidth, Interconnect length, and bit error rate

Contents

Electrical Interconnect Power Dissipation3.

Comparison Between Electrical & Optical4.

Conclusion5.

Introduction1.

Optical Interconnect Power Dissipation2.

• Off-chip Laser source @ λ=1.3um• CMOS driven MQW(Multiple Quantum Well)

modulator– (InP-based, hybrid-bonded to Si-CMOS)

• Reverse-biased PIN quantum-well detector & modulator

Optical Interconnect Power Dissipation

ReceiverTransmitter

MQW Bandgap

A. Modulator Power Dissipation• Both dynamic & static modulator power dissipation are

considered.– Dynamic power : Capacitance of modulator and buffer-chain– Static power : absorbed optical power in “ON” and “OFF” state

• (Ideal modulator – “ON” state power absorption = 0 (IL=0) )

• Power dissipation

IL = Insertion Loss (optical power absorbed during the “on” state)CR = Contrast Ratio (ratio of modulator output optical power in “on” & “off” states)Poptrec = average optical power at the receiver

η = optical power transfer efficiency v = frequency of the laser source , Vbias = DC bias applied to the modulator , Vdd = voltage swing

from Ref. 21

Power loss = 0.082 dB/cm @ λ =1.3um

Optical Interconnect Power Dissipation

B. Receiver Power Dissipation• Optical receiver : photodetector + nonintegrating tran-

simpedance amplifier + gain stage– (Its design and power dissipation is detailed in an early work.)

• The analytical design model was verified through Spice simulation

from Ref. 26

Gain stage

Optical Interconnect Power Dissipation

Optical Interconnect Power Dissipation

C. Power Dissipation Minimization• The increase in optical power increase the modulator

power , but decreases the receiver power Finding optimal laser power at total interconnect power

(receiver and modulator) is minimized

Ideal Modulator

Commonly used reflective Modulator

• Receiver power doesn’t change with laser power beyond a cer-tain point

• Receiver power is dominant• Modulator2 is larger power dis-

sipation than modulator1• A higher loss (6dB) : lower re-

flectivity difference between “on & off” state at the receiver

• Optimum laser power and resulting minimum power dissipation as a function of loss for two different bit rates

Optical Interconnect Power Dissipation

• Increase in the power dissipation with bit rate entirely due to the receiver power at higher bit rate• Technology scaling reduce power dissipation (100&50 nm)• Detector capacitance of 250fF ( somewhat pessimistic)

Tech scale down

Contents

Comparison Between Electrical & Optical4.

Conclusion5.

Introduction1.

Optical Interconnect Power Dissipation2.

Electrical Interconnect Power Dissipation3.

• Full-duplex channel, provides higher BW over smaller number of pins

• Transmitter replica used to isolate the received and transmitted signal

• Low swing current mode, bipolar, differential signaling scheme – maximum noise immunity

Electrical Interconnect Power Dissipation

• High performance GETEK board : expensive than FR4- Provide lower dielectric loss, lower signal attenuation

• Using a transmitter side pre-emphasis equalization(multi-tap FIR filter)

• Several Assumption : small rise time for lower noise, reduce channel crosstalk due to PKG. reflection

Electrical Interconnect Power Dissipation

Full consideration was given to maximize electrical interconnect performance for fair comparison with its optical counterpart

1mil = 1/1000 inch

• Stark difference between electrical & optical media : – Power dissipated in the termination resistors related to current

swing requirement– This power critically depends on the attenuation and noise

characteristics of interconnects

• Modeling the attenuation and noise source : function of the bit rate and length

• The net required noise margin for adequate BER

Electrical Interconnect Power Dissipation

VSNR : voltage SNRVnm : the net noise margin (difference of half the signal swing and the sum off

all worst-case noise source at the receiver)VGaussian : Standard deviation of all the statistical noise source

• Net available noise margin at the receiver(1) the attenuated signal swing (2) the sum of all worst-case noise sources– Proportional to signal swing :

• Transmitter –end : attenuated by the trace – (KA – trace crosstalk, impedance mismatch, PKG. reflection)

• Receiver-end : not attenuated by the board trace– (KU – reverse channel crosstalk, transmitter replica mismatch, PKG reflec)

– Fixed noise source (VNF) :• Receiver offset and its sensitivity

• The available net noise margin should be greater than the required net noise margin

Electrical Interconnect Power Dissipation

Vswtrans : Swing at the transmitterA : attenuated fraction of the signal

• The required one way swing Current (I0)

• Total power dissipated in the termination resistance

• The other sources of power dissipation– Transmitter and receiver logic circuit power ( about 100uA )– Equalization power – neglected ( # of taps are matter)– Additional transmitter for canceling the PKG. reflections – Clock and timing circuits for clock recovery – not considered

Electrical Interconnect Power Dissipation

Each power of termination resistance

Replica transmitter circuit

• Summarizes noise sources in electrical interconnect– Assuming 5% mismatch between termination resistances and the character-

istic impedance of PCB trace

Electrical Interconnect Power Dissipation

• Multi-gigabit data rate, attenuation due to the skin effect loss, and dielectric loss become extremely important

Electrical Interconnect Power Dissipation

Dielectric loss becomesmore limiting at high frequency

• For a given interconnect length, there is a maximum allowed bit rate (10cm ~ 100cm)

• The power dissipation will become much higher before this limit is reached

Electrical Interconnect Power Dissipation

The maximum bit rate for twodifferent swing requirements is shown

Contents

Optical Interconnect Power Dissipation2.

Electrical Interconnect Power Dissipation3.

Conclusion5.

Introduction1.

Comparison Between Electrical & Optical4.

Comparison Between Electrical and Optical Interconnects• Electrical interconnect power rises with length and

bit rate due to a larger attenuation

• Beyond a critical length, optical interconnect yields lower power

• This critical length reduces at higher bit rates

Comparison Between Electrical and Optical Interconnects

• Quantify the impact of critical device/system parameters– Optical interconnect : detector/modulator capacitance,

coupling loss, ideal modulator1

Coupling loss and de-tector capacitance play a pivotal role in dictat-ing critical length

Comparison Between Electrical and Optical Interconnects

• Modulator 2, this length gradually reduces to about 40cm at 15Gb/s

• Apparent saturation of critical length at high bit rate

• the electrical interconnection :

With bit rate increase, the impact of worsening trace attenuation on power dissi-pated in the termination re-sistance

• Different BER is demanded indifferent system applica-tions

• High BER can be tolerated if explicit error correction schemes are utilized

Comparison Between Electrical and Optical Interconnects

• For small BER values, the critical lengths are smaller and optical interconnects have advantage over elec-trical interconnects.

• Sensitivity of critical length on the mismatch between termination impedances and the characterization im-pedance of the PCB trace

Comparison Between Electrical and Optical Interconnects

• Critical length increase with small reduction in the impedance mis-match

Contents

Optical Interconnect Power Dissipation2.

Electrical Interconnect Power Dissipation3.

Comparison Between Electrical & Optical4.

Introduction1.

Conclusion5.

Conclusion

• Extensive power dissipation comparison between elec-trical and optical interconnects for bandwidth sensitive application in 10cm to 1m range interconnects

• Beyond a critical length, power optimized optical inter-connects dissipate lower power

• At higher bitrates and lower BER, the critical length re-duces and optics becomes more power favorable

• Optical interconnects are superior; lower attenuation and lower noise

• Their downside ; need extra power for conversion from electronics to optics and vice versa