mos-ak, san francisco, dec. 13, 2008 1 the hisim family of compact-models for integrated devices h....

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1 MOS-AK, San Francisco, Dec. 13, 2008 The HiSIM Family of Compact-Mode ls for Integrated Devices H. J. Mattausch , N. Sadachika, M. Miyake, H. Kikuchihara, U. Feldmann, and M. Miura-Mattausch Hiroshima University HiSIM Research Center Research Institute for Nanodevice and Bio Systems Graduate School for Advanced Sciences of Matter

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Page 1: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

1MOS-AK, San Francisco, Dec. 13, 2008

The HiSIM Family of Compact-Models for Integrated Devices

H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara, U. Feldmann,

and M. Miura-Mattausch

Hiroshima University

HiSIM Research Center

Research Institute for Nanodevice and Bio Systems

Graduate School for Advanced Sciences of Matter

Page 2: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

2MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 3: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

3MOS-AK, San Francisco, Dec. 13, 2008

Basic Compact Model Approaches for the MOSFET

Threshold-Voltage-Based Models (e. g. BSIM3, BSIM4)● currents expressed as functions of applied voltages● different equations for:

- sub-threshold region- linear region- saturation region

● implicit equation for surface potential● currents determined from drift and diffusion term of current density equation● developed calculation methods for the surface potential:

- iterative solution with the exact surface-potential equation ⇒HiSIM- approximate explicit solution by 1st & 2nd order perturbation theory, after prior conditioning of the surface-potential equation PSP⇒

New Generation of Surface-Potential-Based Models

New Generation of Inversion-Charge-Based Models● additional approximation to solve for inversion charge ⇒ EKV, BSIM5, ACM

21

2 gs

WI C V V V V

Lds ox th ds ds

p 0SS OX G S S S

p0

subs

2= ( ( )) = [exp ( ) ( ) 1 + exp ( ) 1 ]

nqNQ C V' y y y y

p

12

Page 4: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

4MOS-AK, San Francisco, Dec. 13, 2008

(solved by SPICE)

s

Basic Equations for Potential-Based Device Model

Page 5: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

5MOS-AK, San Francisco, Dec. 13, 2008

Consistency Property of Surface-Potential Model

The surface potential consistently determines charges, capacitances and currents under all operating

conditions.

= E: velocity : mobility

=Q()

Page 6: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

6MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 7: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

7MOS-AK, San Francisco, Dec. 13, 2008

Development History of Bulk-MOSFET Model HiSIM

1990 JJAP   Sub-1m MOSFETs short-channel effect model 1991 SISPAD “ 1st surface-potential-based model parameter extraction strategy1994 ICCAD “ simulation time & stability verification1995 Siemens Flash-EEPROM concurrent device/circuit development1998 STARC 100-nm MOSFET collaboration start

Release Activity2001 Oct. release to vendors HiSIM1.0.0 source code and manu

al2002 Jan. release to public “ “ Oct. “ HiSIM1.1.1 “

2003 Oct. Test release to STARC clients HiSIM2.0.0 source code and manual

2005 May release to CMC members HiSIM2.0.0 “ July “ + Verilog-A code Oct. “ HiSIM2.2.0 “2006 Jan. release to EDA vendors HiSIM2.3.0 2007 March “ HiSIM2.4.0 2008 Sept. release to CMC members HiSIM2.4.3 eval. for standardizati

on

Page 8: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

8MOS-AK, San Francisco, Dec. 13, 2008

Modeled Phenomena in HiSIM2.4.3 [Phenomena]      [Subjects]

Short Channel:

Reverse-short Channel:    impurity pile-up pocket implant Poly-Depletion: Quantum-Mechanical:

Channel-Length Modulation:

Narrow-Channel: Temperature Dependency: thermal voltage bandgap   ni phonon scattering maximum velocity

Mobility Models:          universal  high Field  Shallow-Trench Isolation:   threshold voltage                    mobility                   leakage current Capacitances:           intrinsic                    overlap                      lateral-field induced fringing  

Binning OptionDFM Option

[Phenomena]      [Subjects]

Non-Quasi-Static: transient time-domain   AC frequency-domain

Noise:           1/f               thermal                induced gate              cross-correlation

Leakage Currents: substrate current               gate current              GIDL current  

Source/Drain Resistances:

Junction Diode: currents       capacitances

Page 9: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

9MOS-AK, San Francisco, Dec. 13, 2008

HiSIM’s Surface Potentials at Source and Drain

The absolute values of the HiSIM surface potentialcompare well with 2D simulation.

21

0

0 ]}[1))(({)( ))()(())()(())((2' yyVyy

p

n

bsSVyqN

SGoxfbsfS

p

pbsSsubSi eeVyeVC

ox

oxox tC

kT

q

0

2

0p

ip p

nn FBgsG VVV '

dsfefff VL )0()(

Basic Surface-Potential Equation

Iterative HiSIM Solutionin Comparison to 2D-Devices Simulation

Page 10: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

10MOS-AK, San Francisco, Dec. 13, 2008

SLsaturates

Surface-Potential Dependence on Applied Voltages

Page 11: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

11MOS-AK, San Francisco, Dec. 13, 2008

Bias Dependence & Derivatives of Surface Potential

HiSIM accurately reproduces even the bias dependence of the surface-potential derivatives.

Page 12: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

12MOS-AK, San Francisco, Dec. 13, 2008

Ids vs. VxIds / Vx vs. Vx

Ids2 / Vx

2 vs. Vx Ids3 / Vx

3 vs. Vx

Gummel-Symmetry Properties (HiSIM243)model parameters: default

Page 13: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

13MOS-AK, San Francisco, Dec. 13, 2008

(approximating a quadratic potential distribution)

M. Miura-Mattausch et al., IEEE TED, 48, p. 2449, 2001.

Short-Channel-Effect Model

Page 14: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

14MOS-AK, San Francisco, Dec. 13, 2008

Including tail for high pocket-doping concentrations.

H. Ueno et al., IEEE TED, 49, p. 1783, 2002.

Vth (

V)

Pocket-Implantation Model

Page 15: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

15MOS-AK, San Francisco, Dec. 13, 2008

Model Extraction for Advanced 45nm Technology

HiSIM can model advanced 45nm technology very accurately without the necessity of binning.

Measurement

HiSIM

Wg/Lg=2m/200nm Wg/Lg=2m/40nm

Page 16: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

16MOS-AK, San Francisco, Dec. 13, 2008

Current Derivatives for Advanced 45nm Technology

The current derivatives of a 45nm technology can likewise be well reproduced with HiSIM.

MeasurementHiSIM

Wg/Lg=2m/40nm

Page 17: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

17MOS-AK, San Francisco, Dec. 13, 2008

HiSIM’s Model Evaluation Time

Iteration for surface-potential determination requires only a small fraction of the total model evaluation time.

S0 iteration

SLiteration

intrinsic devicecharacteristics

total CPU

extrinsic devicecharacteristics

Data: HiSIM2.4.0Vgs

Arb

itrar

y U

nits

Page 18: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

18MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 19: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

19MOS-AK, San Francisco, Dec. 13, 2008

2D-Device

FOX

BOX

Determination of Involved Potentials

Page 20: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

20MOS-AK, San Francisco, Dec. 13, 2008

This Device does not show a floating body effect!

I-V Curve Reproduction and Short-Channel Effect

Page 21: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

21MOS-AK, San Francisco, Dec. 13, 2008

1/f-Noise Modeling

Page 22: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

22MOS-AK, San Francisco, Dec. 13, 2008

Comparison with 1/f-Noise in Bulk MOSFETs

1/f-Noise in the SOI-MOSFET is substantially increased!

Page 23: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

23MOS-AK, San Francisco, Dec. 13, 2008

Modeling of the Floating-Body Effect

The floating-body effect is modeled on the basis of excess hole charge due to impact ionization.

Page 24: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

24MOS-AK, San Francisco, Dec. 13, 2008

Modeling of the Dynamic-Depletion Effect

The dynamic-depletion effect is accurately captured due to the consistently potential-based model concept.

Page 25: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

25MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 26: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

26MOS-AK, San Francisco, Dec. 13, 2008

Tsi=40nm

Tsi=20nm

Tsi=10nm

Tsi

The floating body potential makes modeling difficult.

gat

e

gat

e

Vgs=1VVds=0V

gat

e

gat

e

gat

e

gat

e

Body potential is floating.

Tsicarrier concentration

Specific Features of the Double-Gate (DG) MOSFET

Page 27: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

27MOS-AK, San Francisco, Dec. 13, 2008

HiSIM-DG Accuracy for the Center Surface Potential

The potentials at center and surface are determined with HiSIM-DG as accurately as in 2D-device simulation.

Page 28: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

28MOS-AK, San Francisco, Dec. 13, 2008

Short-Channel Effect in DG MOSFETs

The drastic reduction of the short-channel effect is a big advantage of the double-gate MOSFET.

Page 29: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

29MOS-AK, San Francisco, Dec. 13, 2008

NsubTSi

s0 (V

)

s0 (V

)

Potential Dependence: Silicon Thickness and Nsub

Page 30: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

30MOS-AK, San Francisco, Dec. 13, 2008

Ids-Vgs Characteristics Reproduction

Page 31: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

31MOS-AK, San Francisco, Dec. 13, 2008

Reduction of Tsi has only a small influence on the capacitance.

C-V Characteristics Reproduction

Page 32: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

32MOS-AK, San Francisco, Dec. 13, 2008

Influence of Qb cannot be ignored.

TSI=10nm, Tox=1nm, Lg=1um, Vds=50mV

Impurity-Concentration Dependence of Vth

Page 33: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

33MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 34: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

34MOS-AK, San Francisco, Dec. 13, 2008

Structure of the Accumulation-Mode MOS-Varactor

Page 35: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

35MOS-AK, San Francisco, Dec. 13, 2008

is inverse proportionalto the electric field.

Carrier-Movement Delay in Accumulation Mode

Page 36: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

36MOS-AK, San Francisco, Dec. 13, 2008

Frequency Dependence of MOS-Varactor Capacity

Page 37: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

37MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 38: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

38MOS-AK, San Francisco, Dec. 13, 2008

High-Voltage MOSFET Structures

(Asymmetric) (Symmetric)

Public/Release Activities for HiSIM_HV Model

2006 Oct. candidate for CMC standardization2007 Dec. selected for CMC standardization2008 June HiSIM_HV1.0.2 release (evaluated as first standard version)

2008 Dec. HiSIM_HV1.0.2 named CMC standard model

Page 39: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

39MOS-AK, San Francisco, Dec. 13, 2008

Channel-Length ModulationOverlap Capacitance

Beyond Gradual-Channel Approximation

HiSIM for Bulk-MOSFET

Complete Surface-Potential-Based Model

S0 : at source edge

SL : at the end of the gradual-channel approx.

S(L) : at drain edge (calculated from SL)

HiSIM2 Properties Facilitating Extension to HV-MOS

Page 40: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

40MOS-AK, San Francisco, Dec. 13, 2008

Ldrift

Ndrift

Potential drop in the drift region

All important potential values are known.No sub-circuit for the potential drop is necessary.

Consistent Potential Drop Modeling in Drift Region

Page 41: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

41MOS-AK, San Francisco, Dec. 13, 2008

HiSIM reproduces S(L) calculated by 2D-device simulator.

: potential determining   LDMOS characteristics

S(L)

S(

L) [

V]

S(L)

S(

L) [

V]

S(

L) [

V]

S(

L) [

V]

Vgs [V] Vds [V]

Consistency Evaluation of Key Potential Values

HV HV

Page 42: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

42MOS-AK, San Francisco, Dec. 13, 2008

Good agreement between HiSIM-HV results and 2D-device simulation results is achieved.

: 2D-Device Simulation Results: HiSIM-HV Results

I d [

A]

Vds=20V

Vds=10V

Vds=5V

Vds=0.1Vg

m [

S]

Accuracy Comparison of Id-Vgs

Page 43: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

43MOS-AK, San Francisco, Dec. 13, 2008

Quasi-saturation behavior of LDMOS is reproduced.

: 2D-Device Simulation Results: HiSIM-HV Results

I d [

A]

Vgs=2.5V

Vgs=5V

Vgs=7.5V

Vgs=10V

gd [

S]

Accuracy Comparison of Id-Vds

Page 44: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

44MOS-AK, San Francisco, Dec. 13, 2008

Ldrift = 1.5m Vds = 10V

inv

gs

QV

driftC

invdrift

gs

QC

V

Charge in the drift region is modeled explicitly.

Vgs [V] Vgs [V]

Reproduction of Key Capacitance Features

HV

Page 45: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

45MOS-AK, San Francisco, Dec. 13, 2008

Cap

acit

ance

[fF

]Vgs [V]

Reproduction of Intrinsic Capacitances

-4 -2 0 2 4

2.0

1.8

1.2

0.8

0.4

Vgs [V]

Cap

acit

ance

[fF

]

Cgb

Cgg

Cgd

CgsVds=0V

AsymmetricalLDMOS

SymmetricalHVMOS

HiSIM-HV is capable to reproduce all intrinsic capacitances with good accuracy.

Page 46: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

46MOS-AK, San Francisco, Dec. 13, 2008

n- (base)

Schematic structure of a modern trench-IGBT

Simplified circuit diagram of the HiSIM-IGBT model

Consistent potential extension in HiSIM-IGBT is achieved by calculation based on Kirchhoff’s laws.

Concept of the HiSIM-IGBT Compact Model

Jn

Page 47: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

47MOS-AK, San Francisco, Dec. 13, 2008

Fitting Results for the I-V Characteristics of the IGBT

HiSIM-IGBT achieves accurate reproduction of the IGBT’s I-V characteristic and also scales with the base

doping.M. Miyake et al., “A Consistently Potential Distribution Oriented Compact IGBT Model”,

IEEE PESC, pp. 998-1003, June 2008

Page 48: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

48MOS-AK, San Francisco, Dec. 13, 2008

Outline of Presentation

1. Introduction2.Modeling Based on a Consistent Potential Dist

ribution3.Bulk MOSFET Model HiSIM24.Silicon-On-Insulator (SOI) MOSFET5.Double-Gate MOSFET6.MOS Varactor7.High-Voltage Devices

High-Voltage MOSFET Insulated Gate Bipolar Transistor (IGBT)

8.Thin-Film Transistor (TFT)9.Conclusion

Page 49: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

49MOS-AK, San Francisco, Dec. 13, 2008

Typical structure of the poly-Si TFT

Channel

Insulating Substrate

poli-Si layer

Gate Insulator

Gate Electorode

Source Drain

Back side potentialis floating.

Traps deteriorateI-V characteristics.

Channel

Insulating Substrate

poli-Si layer

Gate Insulator

Gate Electorode

Source Drain

Back side potentialis floating.

Traps deteriorateI-V characteristics.

1.E-13

1.E-11

1.E-09

1.E-07

1.E-05

-2 -1 0 1 2 3 4Vg(V)

Id(A) large

trap density

1.E-13

1.E-11

1.E-09

1.E-07

1.E-05

-2 -1 0 1 2 3 4Vg(V)

Id(A) large

trap density

Concept of the Thin-Film-Transistor (TFT) Model

Effect of Traps on the I-V characteristic

(6) 1

exp1

exp0

E

ECE

E

ECENNNN fnfntKTATDt

(5) tan 0_

01 EfnEfnEfn

ETOX

VVECE MINMAX

Ks

SFBgsfn

(1) 2 TATDADSi

NNNNnpq

TFT modeling is

based on including the trap charge in the

Poisson equation. S. Miyano et al., “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008

Page 50: MOS-AK, San Francisco, Dec. 13, 2008 1 The HiSIM Family of Compact-Models for Integrated Devices H. J. Mattausch, N. Sadachika, M. Miyake, H. Kikuchihara,

50MOS-AK, San Francisco, Dec. 13, 2008

Accurate reproduction of I-V characteristic and scaling with gate length is achieved.

1.E-10

1.E-08

1.E-06

1.E-04

1.E-02

1.E+00

-5 -3 -1 1 3 5Vgs(V)

Ids(

a.u.

)

measurements simulations

L=2μ m

0.0

2.0

4.0

6.0

0 1 2 3Vds(V)

Ids(a.u.)

measurements simulations

L=2μ m

1.E-10

1.E-08

1.E-06

1.E-04

1.E-02

1.E+00

-5 -3 -1 1 3 5Vgs(V)

Ids(

a.u.

)

measurements simulations

L=0.5μ m

0.0

1.0

2.0

3.0

4.0

5.0

0 1 2 3Vds(V)

Ids(

a.u.

)

measurements simulations

L=0.5μ m

Reproduction of Fabricated TFT-Device Data

S. Miyano et al., “A surface potential based Poly-TFT model for circuit simulation”, IEEE SISPAD, Sept. 2008

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51MOS-AK, San Francisco, Dec. 13, 2008

Conclusion

● HiSIM2 is a compact surface-potential-based MOSFET model with a minimum number of approximations, due to its iterative surface-potential determination.

● HiSIM2 allows to preserve a consistent potential-based modeling in its extension toother integrated-device structures containing aMOSFET core.

A compact-model family covering all integrated devices containing a MOSFET core and sharing the

same modeling concepts could be developed.