fast packet classification using bit compression with fast boolean expansion
DESCRIPTION
Fast Packet Classification Using Bit Compression with Fast Boolean Expansion. Author: Chien Chen, Chia-Jen Hsu and Chi-Chia Huang Publisher: Journal of Information Science and Engineering, 2007 Presenter: Chun-Yi Li Date: 2009/03/11. Outline. Related Work Bitmap intersection - PowerPoint PPT PresentationTRANSCRIPT
Fast Packet Classification Using Bit Compression with Fast Boolean Expansion
Author: Chien Chen, Chia-Jen Hsu and Chi-Chia Huang
Publisher: Journal of Information Science and Engineering, 2007
Presenter: Chun-Yi Li
Date: 2009/03/11
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Outline
Related Work Bitmap intersection Aggregated Bit Vector (ABV)
Bit Compression Algorithm
Fast Boolean Expasion
Performance
3
Bitmap intersectionEach interval associated with an N-bits bit
vector.
0
0
0
0
0
0
1
0
0
0
1
0
1
1
0
0
1
0
1
1
1
0
0
0
1
1
1
0
0
1
1
0
1
0
0
1
1
0
0
0
0
1
1
0
0
1
0
1
0
0
0
0
0
0
1
2
3
4
5
6
R1
R2
R3
R6
R4
R5
Related Work
Aggregated Bit Vector (ABV)
0000 1110 000
1100 1110 000 0010 0001 101 0001 0001 110
0000 0001 100010
110 111 111
011
0000 0010 110
1000 0010 110 0001 1000 001 0010 0100 000
011
111 111 1100100 0011 110
111
1
1
1
1
0
0 0
0
0 0 1
Field1
Field2
Rule Field1 Field2
R0 00* 00*
R1 00* 01*
R2 10* 11*
R3 11* 10*
R4 0* 10*
R5 0* 11*
R6 0* 0*
R7 1* 01*
R8 1* 0*
R9 11* 0*
R10 10* 10*
Related Work
Aggregate size = 4
5
Aggregated Bit Vector (ABV) Aggregation tries to decrease the memory
access time by adding ABV. Generates false matching.
- Rule rearrangement. Faster than bitmap intersection, but use more
space.
Related Work
7
Outline
Related Work Bitmap intersection Aggregated Bit Vector (ABV)
Bit Compression Algorithm
Fast Boolean Expasion
Performance
8
Bit Compression Algorithm
Memory storage - θ(dN ㏒ N)
Require additional time for decompression
9
0 0 0 0 0 0 0 0 0 0 1 1
Don’t Care Vectors (DCV)
Bit Compression Algorithm
Removing the redundant “1” bits
Construct Don’t Care Vectors (DCV)
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Removing redundant ‘0’ bits
Bit Compression Algorithm
11For convience of memory access, fill up ‘0’ to the end of the CBVs and index table.
Bit Compression Algorithm
Append “index table lookup address” (ITLA)
Construct Compressed Bit Vector(CBV)
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Index table
00 1 3 4 0 0
01 1 2 5 6 8
10 1 2 7 0 0
11 9 10 0 0 0
Filled up with ‘0’
Bit Compression AlgorithmConstruct index table
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Bit Compression AlgorithmSearch
(DCV)
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Maxmum Overlap Analysis
β – denote the probability that PA is a prefix of PB. (PA and PB are randomly selected from the rule table)
Bit Compression Algorithm
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Region SegmentationThe region segmentation algorithm constructs an undirected graph first.
Each vertex vi corresponds to a rule Ri, and an edge is constructed between vi and vj if rules i and j are dependent.
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Region Segmentation
STEP1:C1 {1, 2, 3, 4, 5, 6, 7, 8}C2 {9, 10}
STEP2:C11 {1, 3, 4}C12 {1, 2, 5, 6, 7, 8}C2 {9, 10}
STEP3:C11 {1, 3, 4}C121 {1, 2, 5, 6, 8}C122 {1, 2, 6, 7}C2 {9, 10}
1. Find connected component.2. Remove maximum degree vectex if set smaller than
maximum overlap.
Maximum overlap = 5
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Merge Rule Set
CR1 {1, 3, 4}CR2 {1, 2, 5, 6, 8}CR3 {1, 2, 6, 7}CR4 {9, 10}
MergeCR1 {1, 3, 4. 9, 10}CR2 {1, 2, 5, 6, 8}CR3 {1, 2, 6, 7}
Index table
00 1 3 4 0 0
01 1 2 5 6 8
10 1 2 6 7 0
11 9 10 0 0 0
New index table
00 1 3 4 9 10
01 1 2 5 6 8
10 1 2 6 7 0
Two rule sets can be merged together if the rule numbers of the merged rule sets are smaller than or equal to the maximum overlap.
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Merge Rule Set
New index table
00 1 3 4 9 10
01 1 2 5 6 8
10 1 2 6 7 0
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Merge Rule Set
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Outline Related Work
Bitmap intersection Aggregated Bit Vector (ABV)
Bit Compression Algorithm
Fast Boolean Expasion
Performance
21
Fast Boolean Expasion(FBE) Original boolean expression:
(CBVS+DCVS)*(CBVD+DCVD)
Modify boolean expression:
(CBVS*CBVD)+(CBVS*DCVD)+
(DCVS*CBVD)+(DCVS*DCVD)Takes few memory accesses since CBVS and CBVD are compressed bit vector. Only extract the essential bits
from DCV that are corresponding to the set bits of CBV
Default rule
22
Outline
Related Work Bitmap intersection Aggregated Bit Vector (ABV)
Bit Compression Algorithm
Fast Boolean Expasion
Performance
23
Performance
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Performance
25
Performance
Transmission rateWithout wildcard rule
(K)
26
Performance
Transmission rateContain 20% wildcard rule
(K)
27
Transmission rateContain 50% wildcard rule
Performance
(K)