Cascode Amplifiers and Cascode Current Mirrors

Cascode amplifier is a popular building block of ICs

Cascode amplifier is a two-stage, CS-CG configuration

CG stage

CS stage

signal bias

Cascode Configuration

21 DD II =

Small Signal Model of a Cascode Amplifier

Cascode Configuration

CG stage

CS stage

Small Signal Model

* Text book solves the Cascode amplifier using the small signal model. Text book introduces Gm method to simplify the analysis. We will find Avo from small signal model. However, the solution and insight into Cascode amplifiers can be easily obtained using fundamental MOS configurations!

Open-Loop gain of a Cascode amplifier (using NMOS small signal model)

122 )1( vrgv omo ⋅+=⇒

)1( 22112211 omomomomi

ovo rgrgrgrg

vvA ⋅⋅⋅−≈⋅+⋅⋅−==

Node Voltage Method:

0122

1 =⋅−− vg

rvv

mo

oNode vo:

0011

1 =+⋅+ imo

vgrvNode v1:

iom vrgv 111 ⋅−=⇒

By KCL around Q2

Open Loop Gain (RL → ∞, io = 0):

Exercise: Compute Ro from the small signal circuit (Attach a voltage source vx to the output and compute ix, see S&S pp 509-510)

Distribution of the gain in a Cascode Amp.

)||(/ 2212 Lomov RrgvvA ≈=

22

221 1 om

LoiL rg

RrRR+

+==

)||(/ 21111 iomiv RrgvvA −==

/ 21 vviov AAvvA ==

CG stages “reduces” the load seen by the CS stage by gm2ro2

Cascode Configuration

CG stage

CS stage

Open Loop Gain: (RL → ∞)

2211111

22

221222

, 1

,

omomvoomv

om

LoiLomv

rgrgArgArg

RrRRrgA

−=−=

∞=+

+===

Output Resistance of a Cascode amplifier

1122 )1( oomoo rrgrR +⋅+=

RRgr mo ++= )1(

21221 oomooo rrgrrR ++=

R

Cascode Amplifier needs a large load

)||( 222 Lomv RrgA =22

221 1 om

LoiL rg

RrRR+

+== )||( 2111 iomv RrgA −=

For simplicity assume ro1 = ro2 = ro and gm1 = gm2 = gm

∞ gmro ∞ − gmro − (gmro)2

(gmro) ro = Ro gmro ro − 0.5gmro − 0.5(gmro)2

ro 0.5 gmro 2/gm − 2 − gmro

RL Av2(CG) Ri2 = RL1 Av1 (CS) Av= Av1 Av2

Max. Gain

Same gain as a single CS Amp.

Practical Gain

212 oomo rrgR ≈

For comparison, a two-stage CS-amplifier (CS-CS) has a gain of 0.5 (gmro)2 for RL = ro and a gain of (gmro)2 for RL = gmro

2. o Cascode amplifier needs a large load (RL = gmro

2 ). o Cascode amplifiers are popular because of their large gain-bandwidth

Cascode amplifier needs a large load to get a high gain

RL = ro3

Av ≈ − gmro

Gain did not increase compared to a CS amplifier.

This is still a useful circuit because of its high gain-bandwidth (we see this later).

To get a high gain, Av = − 0.5(gmro)2 , we need to increase the small-signal resistance of the current mirror to ≈ (gmro) ro

o Cascode current mirror

Current Mirror

Cascode

refo ILWLWI

1

2

)/()/(

=

Cascode Current mirror Identical MOS: Same µCox and Vt , and

Usually: (W/L)1 = (W/L)3 and (W/L)2 = (W/L)4

o vGS1 = vGS3 = vGS

1

2

3

4

)/()/(

)/()/(

LWLW

LWLW

=

Q1 and Q3 are always in saturation

Q2 and Q4 have to be in saturation for current mirror to work

o VDS2 > VGS – Vt

o VDS4 > VGS – Vt

Straight forward to show Exercise: Show that a single current mirror (no cascoding) works only if VD2 > VOV −VSS

and a cascode current mirror requires VD4 > 2VOV −VSS

Small signal resistance of a cascode current mirror is quite large

Equivalent circuit

Small-signal circuit

)1( 2244 oomoo rrgrR +⋅+=

Cascode amplifier with a cascode current mirror/active load

Signal

Bias

Cascode current mirror

Cascode amplifier

4321 DDDD IIII ===

4433 )1( oomo rrgr +⋅+

Gain of a Cascode amplifier with a cascode current mirror/active load

A high gain, Av ≈ − 0.5(gmro)2 , high gain-bandwidth circuit.

Draw-back: Low voltage headroom because 4 MOS should be in saturation for a given VDD

Cascode amplifier

Cascode current mirror

222212 )||(/ omLomov rgRrgvvA ≈≈=

22

433

22

4433221

1 )1(

om

oom

om

oomooiL

rgrrg

rgrrgrrRR

≈

++⋅++

==

)||(/22

4331111

om

oomomiv rg

rrgrgvvA −==

433212

432132121

oomoom

oooommmvvv rrgrrg

rrrrgggAAA+

−==

Value for the same gm and ro

omv rgA ≈2

oiL rRR ≈= 21

omv rgA 5.01 −=

2)( 5.0 omv rgA −=

Folded Cascode increases voltage overhead

Bias

I2

I1 – I2 I2

I1 – I2

NMOS CS stage Biased with I1 – I2

Signal

CG stage

CS stage

PMOS CG stage Biased with I2