Princess Nora Bint Abdulrahman University NET201- Principles of Information & Technology Systems Faculty of Computer and Information Sciences Second Semester 1437/1438 HDepartment of Networks and Telecommunications Tutorial 2 - Microprocessors

Student Name (in Arabic): ID: Section:

Q1) Fill in the blanks:

1. All of the machine language commands that the CPU understands make up the ______________.

2. A CPU does no work until it is told to, so it needs a buzzer, which is called __________.

3. The maximum number of clock cycles that a CPU can handle in a given period of time is referred to as its ______________.

Q2) Choose the correct answer:

1. What do registers provide for the CPU?

a) Registers determine the clock speed.

b) The CPU uses registers for temporary storage of internal commands and data.

c) Registers enable the CPU to address RAM.

d) Registers enable the CPU to control the address bus.

2. What function does the external data bus have in the PC?

a) The external data bus determines the clock speed for the CPU.

b) The CPU uses the external data bus to address RAM.

c) The external data bus provides a channel for the flow of data and commands between the

CPU and RAM.

d) The CPU uses the external data bus to access registers

Princess Nora Bint Abdulrahman University NET201- Principles of Information & Technology Systems Faculty of Computer and Information Sciences Second Semester 1437/1438 HDepartment of Networks and Telecommunications Tutorial 2 - Microprocessors

3. What is the function of the address bus in the PC?

a) The address bus enables the CPU to communicate with the chipset.

b) The address bus enables the memory controller chip to communicate with the RAM.

c) The address bus provides a channel for the flow of data and commands between the CPU and RAM.

d) The address bus enables the CPU to access registers.

Q4) Solve the following :

a) Suppose that a CPU has an address bus with 30 wires, what is the maximum amount of RAM this CPU can handle?

b) If a CPU has an address bus with 44 wires, what is the maximum amount of RAM this CPU can handle?

c) How many data bas wires needed to handle a 4 GHz RAM?

Princess Nora Bint Abdulrahman University NET201- Principles of Information & Technology Systems Faculty of Computer and Information Sciences Second Semester 1437/1438 HDepartment of Networks and Telecommunications Tutorial 2 - Microprocessors

Q5) Suppose that:

There are 4 instructions: I1, I2, I3 and I4. I2 takes 2 clock cycles for execution I3 CPU takes 3 clock cycles for decoding.

Draw the figure for 4-stage pipeline!

How many cycles needed for the 4 instructions to be completed?

Determine the latency for each instruction. (Hint: the instruction latency is the time to complete a single instruction from start to finish)