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TOMMUNICATION ON THE CONTINUE US009773950B2

( 12 ) United States Patent Kim et al .

( 10 ) Patent No . : US 9 , 773 , 950 B2 ( 45 ) Date of Patent : Sep . 26 , 2017

( 54 ) SEMICONDUCTOR DEVICE STRUCTURE ( 71 ) Applicant : CTLAB CO . , LTD . , Gyeonggi - do ( KR )

( 58 ) Field of Classification Search CPC . . . . . . . . . HO1L 33 / 10 ; HO1L 33 / 46 ; HO1L 33 / 52 ;

HO1L 33 / 60 ( Continued ) ( 72 ) Inventors : Chang Tae Kim , Gyeonggi - do ( KR ) ;

Jae Sung Ko , Gyeonggi - do ( KR ) ; Seok Jung Kim , Gyeonggi - do ( KR ) ; Chang Hun Lee , Gyeonggi - do ( KR )

( 73 ) Assignee : CTLAB CO . LTD . , Gyeonggi - Do ( KR ) ( 56 ) References Cited

U . S . PATENT DOCUMENTS

( * ) Notice : 7 , 497 , 597 B2 2004 / 0115849 Al

3 / 2009 Suehiro et al . . . . . . . . . . . . . . . 6 / 2004 Iwafuchi et al .

( Continued )

362 / 294 438 / 25 Subject to any disclaimer , the term of this

patent is extended or adjusted under 35 U . S . C . 154 ( b ) by 0 days .

FOREIGN PATENT DOCUMENTS ( 21 ) Appl . No . : 14 / 390 , 611 2006 - 024615 1 / 2006 2006 - 120913 1 1 / 2006

( Continued ) ( 22 ) PCT Filed : Apr . 5 , 2013 ( 86 ) PCT No . : PCT / KR2013 / 002879

§ 371 ( c ) ( 1 ) , ( 2 ) Date : Oct . 3 , 2014

( 87 ) PCT Pub . No . : W02013 / 151387 PCT Pub . Date : Oct . 10 , 2013

OTHER PUBLICATIONS International Search Report dated Jul . 10 , 2013 , issued in Interna tional Patent Application No . PCT / KR2013 / 002879 with English translation ; 10 pgs .

( 65 ) Prior Publication Data US 2015 / 0091035 A1 Apr . 2 , 2015 Primary Examiner — Matthew E Warren

( 74 ) Attorney , Agent , or Firm — Harness , Dickey & Pierce , P . L . C . ( 30 ) Foreign Application Priority Data

Apr . 6 , 2012 Aug . 24 , 2012 ( 57 ) ABSTRACT ( KR ) . . . . . . . . . . . . . . . . . . . . . . . 10 - 2012 - 0036182

( KR ) . . . . . . . . . . . . . . . . . . . . . . . . 10 - 2012 - 0093191 ( Continued )

( 51 ) Int . Ci . HOIL 29 / 22 ( 2006 . 01 ) HOIL 33 / 46 ( 2010 . 01 )

( Continued ) ( 52 ) U . S . CI .

CPC . . . . . . . . . . . . . . HOIL 33 / 46 ( 2013 . 01 ) ; HOIL 33 / 42 ( 2013 . 01 ) ; HOIL 33 / 507 ( 2013 . 01 ) ; HOIL

33 / 52 ( 2013 . 01 ) ; ( Continued )

The present disclosure relates to a method for manufacturing a semiconductor device structure , comprising the steps of : securing the position of a semiconductor device on a plate ; securing the positions of electrodes such that the electrodes face the plate ; covering the semiconductor device with an encapsulating material ; and separating , from the plate , the semiconductor device covered with the encapsulating mate rial .

8 Claims , 30 Drawing Sheets

100 200 300

200cm 182 900 60092 A MOANOCANONOODANASONS M 9 . 6

90 89a Sohn 902 80 808

US 9 , 773 , 950 B2

( 30 ) Foreign Application Priority Data Aug . 24 , 2012 Aug . 24 , 2012 Aug . 24 , 2012 Aug . 24 , 2012 Jan . 23 , 2013

8 )

HOIL 33 / 60 ( 2013 . 01 ) ; HOIL 2224 / 48091 ( 2013 . 01 ) ; HOIL 2933 / 005 ( 2013 . 01 ) ; HOIL

2933 / 0033 ( 2013 . 01 ) Field of Classification Search USPC . . . . . . . . . . . . . . . . . . . . . 315 / 246 ; 257 / 98 - 100 See application file for complete search history .

( KR ) 10 - 2012 - 0093193 ( KR ) 10 - 2012 - 0093201 ( KR ) . . . . 10 - 2012 - 0093208 ( KR ) . . . . . . . . . . . . . . . . . . . . . . . . 10 - 2012 - 0093213 ( KR ) . . . . . . 10 - 2013 - 0007331

( 51 ) ( 56 ) References Cited U . S . PATENT DOCUMENTS

2010 / 0201280 A1 * 2014 / 0175481 Al *

Int . Cl . HOIL 33 / 52 ( 2010 . 01 ) HOIL 33 / 54 ( 2010 . 01 ) HOIL 33 / 62 ( 2010 . 01 ) HOIL 33 / 42 ( 2010 . 01 ) HOIL 33 / 50 ( 2010 . 01 ) HOIL 33 / 58 ( 2010 . 01 ) HOIL 33 / 64 ( 2010 . 01 ) HOIL 33 / 48 ( 2010 . 01 ) HOIL 33 / 60 ( 2010 . 01 ) U . S . CI . CPC . . . . . . . . . . . . . HOIL 33 / 54 ( 2013 . 01 ) ; HOIL 33 / 58

( 2013 . 01 ) ; HOIL 33 / 62 ( 2013 . 01 ) ; HOIL 33 / 644 ( 2013 . 01 ) ; HOIL 33 / 486 ( 2013 . 01 ) ;

8 / 2010 McKenzie . . . . . . . . . . . . . . HO1L 33 / 46 315 / 246

6 / 2014 Tischler . . . . . . . . . . . . . . . . . HO1L 27 / 14 257 / 98

FOREIGN PATENT DOCUMENTS

( 52 ) JP KR KR

2009 - 164423 10 - 2005 - 0116373 10 - 2010 - 0060867

7 / 2009 12 / 2005 6 / 2010

* cited by examiner

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US 9 , 773 , 950 B2

SEMICONDUCTOR DEVICE STRUCTURE ( e . g . an n - type GaN layer ) , an active layer 400 for generating light via electron - hole recombination ( e . g . InGaN / ( In ) GaN

CROSS - REFERENCE TO RELATED MQWs ) and a second semiconductor layer 500 having a APPLICATIONS second conductivity different from the first conductivity

5 ( e . g . a p - type GaN layer ) , which are deposited over the This application is a national phase application of PCT substrate 100 in the order mentioned , and additionally ,

Application No . PCT / KR2013 / 002879 , filed on 5 Apr . 2013 . three - layered electrode films for reflecting light towards the which claims the benefit and priority to Korean Patent substrate 100 , i . e . , an electrode film 901 ( e . g . an Ag reflec Application No . 10 - 2012 - 0036182 , filed 6 Apr . 2012 , tive film ) , an electrode film 902 ( e . g . , a Ni diffusion barrier ) Korean Patent Application No . 10 - 2012 - 0093191 , filed 24 10 and an electrode film 903 ( e . g . an Au bonding layer ) are Aug . 2012 . Korean Patent Application No . 10 - 2012 - formed thereon , and an electrode 800 ( e . g . a Cr / Ni / Au 0093193 , filed 24 Aug . 2012 . Korean Patent Application No . laminate metal pad ) serving as a bonding pad is formed on 10 - 2012 - 0093201 , filed 24 Aug . 2012 , Korean Patent Appli - an etch - exposed portion of the first semiconductor layer 300 . cation No . 10 - 2012 - 0093208 , filed 24 Aug . 2012 , Korean In this example , the side of the electrode film 903 placed on Patent Application No . 10 - 2012 - 0093213 , filed 24 . Aug . 15 the package serves as a mounting face . In terms of the heat 2012 and to Korean Patent Application No . 10 - 2013 - dissipation efficiency , the flip chip shown in FIG . 2 or the 0007331 , filed 23 Jan . 2013 . The entire disclosures of the junction down type chip demonstrates outstanding perfor application identified in this paragraph are incorporated mances over the ones with the lateral chip shown in FIG . 1 . herein by references . This is because the lateral chip should dissipate heat outside

20 through the sapphire substrate 100 with a thickness of 80 to TECHNICAL FIELD 180 um , while the flip chip can dissipate heat through the

metallic electrodes 901 , 902 and 903 placed near the active The present disclosure relates generally to a method for layer 400 .

manufacturing a semiconductor device structure , and more FIG . 15 is a view illustrating one example of a semicon particularly , to a method for manufacturing a semiconductor 25 ductor light emitting device package or a semiconductor device structure which is of a simpler construction for light emitting device structure in the prior art , in which the manufacturing semiconductor light emitting device package is provided

Within the context herein , the term “ semiconductor with lead frames 110 and 120 , a mold 130 , and a vertical device " encompasses semiconductor light emitting devices type light - emitting chip 150 in a cavity 140 which is filled ( e . g . laser diodes ) , semiconductor light receiving devices 30 with an encapsulating material 170 containing a phosphor ( e . g . photo diodes ) , p - n junction diode electric devices , 160 . The bottom face of the vertical type light - emitting chip semiconductor transistors and the like , and the typical 150 is electrically connected to the lead frame 110 , and the example thereof is a group III - nitride semiconductor light top face thereof is electrically connected to the lead frame emitting device . The group III - nitride semiconductor light 120 . A portion of the light ( e . g . , blue light ) emitting from the emitting device means a light emitting device , such as a light 35 vertical type light - emitting chip 150 excites the phosphor emitting diode , including a compound semiconductor layer 160 such that light ( e . g . yellow light ) is generated by the made of Alq , Ga „ In ( 1 - x - » N ( wherein , Osxs1 , Osysl , Osx + phosphor 160 , and these lights ( blue light + yellow light ) ysl ) , while it does not necessarily exclude additional mate - produce white light . In this example , the mold 130 — the rials including elements of other groups , such as SiC , Sin , encapsulating material 170 , or the lead frame 110 and SiCN , CN or the like , or semiconductor layers made of those 40 120 — the mold 130 — the encapsulating material 170 serve materials . as a support , that is , a carrier , for the semiconductor light

emitting device package , while supporting the vertical semi BACKGROUND conductor device .

FIG . 54 is a view illustrating one example of the semi This section provides background information related to 45 conductor light emitting device ( Flip Chip ) described in JP

the present disclosure which is not necessarily prior art . Laid - Open Publication No . 2006 - 120913 , in which the FIG . 1 is a view illustrating one example of the semicon - semiconductor light emitting device is of a flip chip type

ductor light emitting device ( Lateral Chip ) in the prior art , employing an insulating film 910 and a metal film 920 , in which the semiconductor light emitting device includes a instead of the electrodes 901 , 902 and 903 as in the semi substrate 100 , and a buffer layer 200 , a first semiconductor 50 conductor light emitting device shown in FIG . 2 . The light layer 300 having a first conductivity , an active layer 400 for L generated in the active layer 300 is usually reflected from generating light via electron - hole recombination and a sec - the insulating film 910 and then reflected towards the first ond semiconductor layer 500 having a second conductivity semiconductor layer 300 or the substrate 100 . A portion of different from the first conductivity , which are deposited the light L is reflected from the metal film 920 . Preferably , over the substrate 100 in the order mentioned , and addition - 55 the insulating film 910 has a DBR . Any description of the ally , a light - transmitting conductive film 600 for current same reference numerals will not be repeated . spreading , and an electrode 700 serving as a bonding pad are FIG . 55 is a view illustrating one example of the semi formed thereon , and an electrode 800 serving as a bonding conductor light emitting device ( Flip Chip ) described in JP pad is formed on an etch - exposed portion of the first Laid - Open Publication No . 2009 - 164423 . This semiconduc semiconductor layer 300 . In this example , the side of the 60 tor light emitting device differs from the one shown in FIG . substrate 100 placed on the package serves as a mounting 54 in that the former is configured to have holes 910h in the

insulating film 910 such the metal film 920 supplies current FIG . 2 is a view illustrating another example of the to the semiconductor light emitting device through a light

semiconductor light emitting device ( Flip Chip ) in the prior transmitting conductive film 600 , while in the latter current art , in which the semiconductor light emitting device 65 is supplied through the electrode 700 . Preferably , the insu includes a substrate 100 ( e . g . a sapphire substrate ) , and a lating film 910 has a DBR , and is formed across the entire first semiconductor layer 300 having a first conductivity semiconductor light emitting device as well as on an etch

face .

US 9 , 773 , 950 B2

exposed portion of the first semiconductor layer 300 . In FIG . 13 is a view illustrating yet another example of a addition , the metal film 920 is formed on the etch - exposed semiconductor device structure according to the present portion of the first semiconductor layer 300 . disclosure .

FIG . 14 is a view illustrating yet another example of a Technical Problem 5 semiconductor device structure according to the present

disclosure . The problems to be solved by the present disclosure will FIG . 15 is a view illustrating one example of the semi

be described in the latter part of the best mode for carrying conductor light emitting package or the semiconductor light out the invention . emitting device structure in the prior art .

10 FIG . 16 is a view illustrating yet another example of a Technical Solution semiconductor device structure according to the present

disclosure . This section provides a general summary of the disclosure FIG . 17 is a view illustrating one example of the method

and is not a comprehensive disclosure of its full scope or all for manufacturing the semiconductor device structure of its features . 15 shown in FIG . 16 .

According to one aspect of the present disclosure , there is FIG . 18 and FIG . 19 are views illustrating examples of a reflector according to the present disclosure . provided a method for manufacturing a semiconductor FIG . 20 and FIG . 21 are views describing the principles device structure , which comprises the steps of : securing the of forming a reflector according to the present disclosure . position of a semiconductor device on a plate ; securing the 20 le ; securing the 20 FI FIG . 22 is a view illustrating one example of the overall

positions of electrodes such that they face the plate ; covering configuration of an encapsulating material according to the the semiconductor device with an encapsulating material ; present disclosure . and separating , from the plate , the semiconductor device FIG . 23 is a view illustrating yet another example of a covered with the encapsulating material . semiconductor device structure according to the present

25 disclosure . Advantageous Effects FIG . 24 is a view illustrating yet another example of a semiconductor device structure according to the present

The advantageous effects of the present disclosure will be described in the latter part of the best mode for carrying out FIG . 25 is a view illustrating one example of the method the invention . 30 for manufacturing the semiconductor device structure

shown in FIG . 24 . DESCRIPTION OF DRAWINGS FIG . 26 is a view illustrating another example of the

method for manufacturing the semiconductor device struc FIG . 1 is a view illustrating one example of a semicon - ture shown in FIG . 24 .

ductor light emitting device ( Lateral Chip ) in the prior art . 35 FIG . 27 is a view illustrating one example of the curing FIG . 2 is a view illustrating another example of a semi - operation of an encapsulating material in the process of

conductor light emitting device ( Flip Chip ) in the prior art . manufacturing the semiconductor device structure shown in FIG . 3 is a view illustrating one example of the method for FIG . 24 .

manufacturing a semiconductor device structure according FIG . 28 is a view illustrating yet another example of a to the present disclosure . 40 semiconductor device structure according to the present

FIG . 4 is a view illustrating one example of the method for disclosure . FIG . 29 is a view illustrating yet another example of a manufacturing a flip chip package according to the present

disclosure . semiconductor device structure according to the present disclosure . FIG . 5 is a view illustrating another example of the 45 FIG . 30 is a view illustrating yet another example of a method for manufacturing a semiconductor device structure semiconductor device structure according to the present according to the present disclosure . disclosure . FIG . 6 is a view illustrating one example of a semicon FIG . 31 is a view illustrating yet another example of a

ductor device structure according to the present disclosure . semiconductor device structure according to the present FIG . 7 is a view illustrating another example of the 50 disclosure

method for manufacturing a semiconductor device structure FIG . 32 is a view illustrating one example of the array of according to the present disclosure . electrodes , external extrudes and a heat - dissipation pad , as

FIG . 8 is a view illustrating another example of a semi seen from the bottom of the semiconductor device structure conductor device structure according to the present disclo shown in FIG . 31 . sure . 55 FIG . 33 is a view illustrating another example of the array

FIG . 9 is a view illustrating one example of the applica - of electrodes , external extrudes and a heat - dissipation pad , tion of a semiconductor device structure according to the as seen from the bottom of the semiconductor device struc present disclosure . ture shown in FIG . 31 .

FIG . 10 is a view illustrating another example of the FIG . 34 to FIG . 36 are views illustrating one example of method for manufacturing a semiconductor device structure 60 the method for manufacturing the semiconductor device according to the present disclosure . structure shown in FIG . 11 .

FIG . 11 is a view illustrating yet another example of a FIG . 37 is a view illustrating yet another example of the semiconductor device structure according to the present method for manufacturing a semiconductor device structure disclosure . according to the present disclosure .

FIG . 12 is a view illustrating yet another example of a 65 FIG . 38 is a view illustrating yet another example of the semiconductor device structure according to the present method for manufacturing a semiconductor device structure disclosure . according to the present disclosure .

US 9 , 773 , 950 B2

FIG . 39 to FIG . 41 are views illustrating one example of dispensing , screen printing , molding , spin coating , the appli the method for manufacturing the semiconductor device cation of a stencil , for example . It may be formed by coating structure shown in FIG . 12 . a photo - curable resin ( UV - curable resin ) thereon , followed

FIG . 42 and FIG . 43 are views illustrating yet another by irradiating light . When a light - transmitting plate is used example of the method for manufacturing a semiconductor 5 as the plate 1 , it is also possible to irradiate light from the device structure according to the present disclosure . direction of the plate 1 . Although the drawing illustrates only

FIG . 44 to FIG . 47 are views illustrating yet another one semiconductor device 2 on the plate 1 for convenience example of the method for manufacturing a semiconductor of explanation , a plurality of semiconductor devices 2 on the device structure according to the present disclosure . plate 1 can undergo the process . While it has been stated that

FIG . 48 is a view illustrating yet another example of the 10 the semiconductor device 2 is provided with two electrodes method for manufacturing a semiconductor device structure 80 and 90 , it should be understood that the number of according to the present disclosure . electrodes is not particularly limited . For instance , a tran

FIG . 49 is a view illustrating yet another example of the sistor can have three electrodes . method for manufacturing a semiconductor device structure FIG . 4 is a view illustrating one example of the method for according to the present disclosure . 15 manufacturing a flip chip package according to the present

FIG . 50 is a view illustrating yet another example of the disclosure , in which a junction down type chip is shown as method for manufacturing a semiconductor device structure the semiconductor device 2 . The flip chip type semiconduc according to the present disclosure . tor light emitting device as illustrated in FIG . 2 can be

FIG . 51 and FIG . 52 are views illustrating yet another mentioned as an example of this junction down type chip . example of the method for manufacturing a semiconductor 20 Accordingly , as in FIG . 2 , the semiconductor light emitting device structure according to the present disclosure . device can have a structure in which a first semiconductor

FIG . 53 is a view illustrating yet another example of the layer 300 having a first conductivity ( e . g . an n - type GaN method for manufacturing a semiconductor device structure layer ) , an active layer 400 for generating light via electron according to the present disclosure . hole recombination ( e . g . InGaN / ( In ) GaN MQWs ) , and a

FIG . 54 is a view illustrating one example of the semi - 25 second semiconductor layer 500 having a second conduc conductor light emitting device ( Flip Chip ) proposed in JP t ivity different from the first conductivity ( e . g . a p - type Gan Laid - Open Publication No . 2006 - 120913 . layer ) are deposited over a substrate 100 ( e . g . a sapphire

FIG . 54 is a view illustrating one example of the semi - substrate ) in the order mentioned , and additionally , three conductor light emitting device ( Flip Chip ) proposed in JP layered electrode films for reflecting light towards the sub Laid - Open Publication No . 2009 - 164423 . 30 strate 100 , i . e . , an electrode film 901 ( e . g . an Ag reflective

FIG . 56 is a view illustrating yet another example of the film ) , an electrode film 902 ( e . g . , a Ni diffusion barrier ) and method for manufacturing a semiconductor device structure an electrode film 903 ( e . g . an Au bonding layer ) are formed according to the present disclosure . thereon , and an electrode 800 ( e . g . a Cr / Ni / Au laminate

FIG . 57 is a view illustrating examples of electrodes in the metal pad ) serving as a bonding pad is formed on an semiconductor device shown in FIG . 56 . 35 etch - exposed portion of the first semiconductor layer 300 .

The semiconductor device 2 can have two electrodes 80 and DETAILED DESCRIPTION 90 , where the electrode 90 may have the same configuration

as the electrodes 901 , 902 and 903 or may have a combined Hereinafter , the present disclosure will now be described configuration of a DBR ( Distributed Bragg Reflector ) with

in detail with reference to the accompanying drawings . 40 a metal reflective film . The electrode 80 and the electrode 90 FIG . 3 is a view illustrating one example of the method for are electrically isolated by an insulating film 5 such as SiO2 .

manufacturing a semiconductor device structure according The manufacturing procedure after this stays the same as to the present disclosure , in which a plate 1 is first prepared , above , i . e . , the semiconductor device 2 is surrounded with and a semiconductor device 2 provided with two electrodes the encapsulating material 4 , and then the semiconductor 80 and 90 is secured at a position on the plate 1 with an 45 device 2 is separated from the plate 1 and the adhesive 3 . adhesive 3 . Next , the semiconductor device 2 is surrounded FIG . 5 is a view illustrating another example of the with an encapsulating material 4 , before separating the plate method for manufacturing a semiconductor device structure 1 and the semiconductor 2 . The materials of the plate 1 are according to the present disclosure , in which a plurality of not particularly limited , and examples thereof encompass a semiconductor devices 2 and 2 on the plate 1 is covered with material like sapphire or even a flat structure like a metal or 50 the encapsulating material 4 as a whole . This facilitates glass , etc . When a rigid plate formed of a metal or glass , for making those semiconductor devices 2 and 2 into one example , is used , the stability of the process may be package as a whole , after the plate 1 is removed . A process achieved , as compared with a case where a flexible plate of electrical connection between the semiconductor device 2 such as Blue tape is used . Also , the materials of the adhesive and the semiconductor device 2 will be described below . 3 are not particularly limited , and any type of adhesive can 55 Meanwhile , it is also possible to split them into individual employed as far as it can secure the plate 1 at a position on semiconductor devices 2 as in FIG . 3 . This can be achieved the semiconductor device 2 . As to the materials of the by a sawing process for example for individualizing the adhesive 3 , it is possible to use silicone epoxy , silicone plural semiconductor devices 2 and 2 once they are sepa resins and the like , which are typically used in the prior art rated from the plate 1 . The use of such an encapsulating LED packages . The separation of the plate 1 and the 60 material 4 that tends to be flexible after undergoing the semiconductor device 2 after the encapsulating material 4 is curing operation further increases the bonding between the formed can be carried out by applying heat or light capable semiconductor devices and a flexible circuit board . of melting the adhesive 3 , or by employing a solvent capable FIG . 6 is a view illustrating one example of a semicon of dissolving the adhesive 3 . It is also possible to combine ductor device structure according to the present disclosure , the use of heat or light with the solvent . Moreover , it is also 65 in which the lateral faces of the encapsulating material 4 are possible to use an adhesive tape . The encapsulating material sloped . When the semiconductor device 2 is a light emitting 4 can be formed by conventional techniques , including device , the encapsulating material 4 is given with the outer

US 9 , 773 , 950 B2 face of different angles , which in turn increases the light tor light emitting device package or semiconductor light extraction efficiency towards the outside of a package . These emitting device structure , which could not be envisaged lateral faces 4a can be obtained by inclining a screen barrier from the conventional techniques . rib during the screen printing , using a pointed cutter during FIG . 9 is a view illustrating one example of the applica the sawing . 5 tion of a semiconductor device structure according to the

FIG . 7 is a view illustrating yet another example of the present disclosure . In a semiconductor device 2C , electrodes method for manufacturing a semiconductor device structure 80 and 90 are directly connected with a wire 7A of a printed according to the present disclosure , in which after the plate circuit board 7 , while in a semiconductor device 2D , those 1 is removed , an insulating film 6 such as SiO , is provided , electrode are connected with a wire 7b through external while the electrode 80 and the electrode 90 are in an exposed 10 electrodes 81 and 91 . The printed circuit board 7 can be a state . Later , the electrode 80 is connected to an external flexible circuit board . electrode 81 , and an external electrode 91 is formed on the FIG . 10 is a view illustrating yet another example of the electrode 90 , thereby making a structure similar to a con - method for manufacturing a semiconductor device structure ventional package . The external electrodes 81 and 91 can according to the present disclosure , in which the structure correspond to the lead frames of the conventional package . 15 includes a semiconductor device 2 similar to one shown in Further , it is also possible to expand the external electrodes FIG . 2 . The semiconductor device 2 includes a substrate 81 and 91 widely and to deposit them such that they can 100 , and a first semiconductor layer 300 having a first serve as reflective films . The insulating film 6 may simply conductivity , an active layer 400 for generating light via have an insulation function , or it may form a stack of electron - hole recombination and a second semiconductor repeating pattern of SiO , Ti0 , or consist of a DBR to reduce 20 layer 500 having a second conductivity different from the absorption of by the external electrodes 81 , 92 . As in FIG . first conductivity , which are grown on the substrate 100 , and 4 , when the semiconductor device 2 has such an insulating additionally electrodes 80 and 90 are formed . The semicon film 5 , the insulating film 6 may be omitted . The deposition ductor device 2 is attached to a plate 1 using an adhesive 3 , process and the photolithography process for use in the and then covered with an encapsulating material 4 . Prefer formation of both the insulating film 6 and the external 25 ably , once the substrate 100 is removed , an uneven surface electrodes 81 and 91 are common in the semiconductor chip 301 is formed in order to increase light extraction efficiency . process , and very familiar to those skilled in the art . The use The procedure after this stays the same . The substrate 100 of those external electrodes 81 and 91 can facilitate the can be removed by a laser lift - off process for example , and mounting operation on the PCB , the COB or the like . If the uneven surface 301 can be obtained by dry etching such necessary , it is also possible to have the insulating film 6 30 as ICP ( Inductively Coupled Plasma ) . This enables a chip only , without the external electrodes 81 and 91 . The insu - level laser lift - off . lating film 6 not only protects the semiconductor device 2 FIG . 11 is a view illustrating yet another example of a and the encapsulating material 4 , but it also protects the state semiconductor device structure according to the present between the encapsulating material 4 from the process of disclosure , in which the encapsulating material 4 contains a forming the external electrodes 81 and 91 . Also , by forming 35 phosphor . Any light of a desired color can be emitted by the insulating film 6 with white materials , it is possible that using YAG , silicate or nitride - based phosphors . the insulating film 6 could serve as a reflective film . For FIG . 12 is a view illustrating yet another example of a example , white PSR ( Photo Solder Resist ) may directly be semiconductor device structure according to the present used as the insulating film 6 , or the insulating film 6 may be disclosure , in which a phosphor layer 8 is formed either coated therewith . In one example , white PSR can be screen 40 inside the encapsulating material 4 or at the bottom of the printed or spin coated on the insulating film , and then encapsulating material 4 . Apart from this , it is also possible patterned by the photolithography process in general . to form the phosphor layer 8 on top of the encapsulating

FIG . 8 is a view illustrating another example of a semi - material 4 . This can be achieved by precipitating the phos conductor device structure according to the present disclo phor inside the encapsulating material 4 , or by spin coating sure , in which the structure includes a semiconductor device 45 the encapsulating material 4 separately , or by coating the 2A electrically connected in series with another semicon encapsulating material 4 with the phosphor contained in a ductor device 2B . This configuration can be achieved by volatile liquid and then volatilizing the liquid , thereby connecting a negative electrode 80A of the semiconductor leaving only the phosphor to cover the encapsulating mate device 2A with a positive electrode 90B of the semiconduc - rial 4 . If appropriate , a plurality of phosphor layers 8 can be tor device 2B , via an external electrode 89 . Reference 50 formed . numeral 4 denotes an encapsulating material , reference FIG . 13 is a view illustrating yet another example of a numeral 6 denotes an insulating film , reference numeral 90A semiconductor device structure according to the present denotes a positive electrode of the semiconductor device 2A , disclosure , in which the encapsulating material 4 has an and reference numeral 80B denotes a negative electrode of uneven surface or irregularities 4g on the surface thereof , so the semiconductor device 2B . This configuration makes it 55 as to increase light extraction efficiency . This uneven surface possible to form an electrical connection between the semi - 4g can be formed by molding , such as pressing , nanoim conductor devices 2A and 2B integrated through the encap - printing or the like . It can also be formed by coating the sulating material 4 , without necessarily using a monolithic encapsulating material 4 with a bead material , followed by board . In case of the monolithic board , the semiconductor performing an etching or sandblasting operation for devices on the board have the same structure ; however , in 60 example . Generally the uneven surface 4g can be formed case of the method according to the present disclosure , the before or after the separation of the plate 1 . semiconductor device 2A and the semiconductor device 2B FIG . 14 is a view illustrating still another example of a are not necessarily the devices with the same functions . semiconductor device structure according to the present Needless to say , the semiconductor devices 2A and 2B can disclosure , in which a lens 4c is formed on the encapsulating also be connected in parallel . Also , the lateral faces 4a of the 65 material 4 . Preferably , the lens 4c is integrally formed with encapsulating material 4 can be sloped as in FIG . 6 , and this the encapsulating material 4 . Such an integrated lens 4c can configuration enables to obtain a high - voltage semiconduc - be obtained by compression molding , for example .

US 9 , 773 , 950 B2 10

FIG . 16 is a view illustrating still another example of a A suitable height for the p - side finger electrodes 93 and semiconductor device structure according to the present the n - side finger electrodes 81 ranges from 2 um to 3 um . If disclosure , in which the semiconductor device 2 is a flip chip the finger electrodes are thinner than the range , it can lead type semiconductor light emitting device as shown in FIG . to an increased operating voltage ; and if the finger electrodes 4 , and the lateral faces 4a of the encapsulating material 4 5 are thicker than the range , it can affect the stability of the have light reflector 4b for reflecting the light generated in the process and increase the material cost . active layer 400 ( see FIG . 2 ) upward . The light reflector 4b FIG . 20 and FIG . 21 are views describing the principles can be formed entirely or partially on the lateral face 4a . It of forming a reflector according to the present disclosure . is preferably formed on the bottom of the lateral face 4a Here , when light L1 from a light source S is incident on the where the semiconductor device 2 is located . Referring to 10 vertical lateral face 4a , in particular when the light L1 enters FIG . 16 , the upper portion 4e of the lateral face 4a , free of into a triangle C1 indicating a critical angle , it passes the the light reflector 4b , preferably has a certain level of height . lateral face 4a at right angles with the boundary between a The upper portion 4e may be formed in the vertical direction medium having a high refractive index ( e . g . the encapsulat with respect to the flat top face 4d . One example of its entire ing material 4 ) and a medium having a low refractive index configuration is shown in FIG . 22 . As the upper portion 4e 15 ( e . g . air ) and travels into the medium having a low refractive has a certain level of height , the semiconductor device index . However , when the light L1 has a large angle of structure may be used as a light source of a beam projection , incidence , it is reflected from the vertical lateral face 4a without an additional lens . FIG . 16 illustrates the light upward , and is therefore subjected to the same principles on reflector 4b in a curved shape , while FIG . 18 and FIG . 19 the top face 4d . Meanwhile , in case that the light reflector 4b illustrate other examples of the light reflector 4b . That is , 20 is inclined to the right with respect to the vertical lateral face FIG . 18 shows that two linear faces 4b1 and 462 with two 4a , the angle of incidence with respect to the vertical side 4a different angles of inclination form a reflector . FIG . 19 becomes even smaller such that even the light L2 entering shows that the lateral face 4a has an inclined face 4b1 and into the triangle C1 may not enter into the triangle C2 , and a step 4b3 thereon . The inclined face 4b1 and the step 4b3 reflects the light L2 towards the top face 4D . When the light can be incorporated in multiple times . The operation prin - 25 reflector 4b is curved , the same principles are applied to a ciples of the reflector 4b will be described with reference to line tangent to each point in the light reflector 4b . Under this FIG . 20 and FIG . 21 later . Indeed , the lateral face 4a shown application , the light reflector 4b can be formed into a linear , in FIG . 6 can be regarded as a reflector . Any description of parabola or arc shape , and if possible in the manufacturing the same reference numerals will not be repeated . Here , the process , it can have a combined shape of them . Preferably , phosphor 8 is not absolutely required . It can be conformally 30 the light reflector 4b may be formed such that every light coated over the encapsulating material as in FIG . 16 , or it incident on the light reflector 4b can be reflected towards the can be provided to all or part of the encapsulating material top face 4d , but this is not absolutely required . More 4 as in FIG . 11 . In case that the insulating film 6 and the preferably , the light reflector 4b is designed such that the external electrodes 81 and 91 are available , they are formed light L2 reflected from the light reflector 4b can enter into on the front face of the encapsulating material 4 where the 35 the triangle C3 of the top face 4d . Such a design is already electrodes 80 and 90 are located and can be removed a well - known technology to those skilled people in the subsequently in a sawing process by a blade 41 described optical field . On can see from FIG . 21 that , for a certain light below , or they may be omitted in a region where the light L , the angle of incidence when the light L is reflected reflector 4b is already formed . from the vertical lateral face 4a towards the top face 4d is

FIG . 17 is a view illustrating one example of the method 40 smaller than the angle of incidence 0 , when the light L is for manufacturing the semiconductor device structure reflected from the light reflector 4b towards the top face 4d . shown in FIG . 16 . This method is basically identical with the It is understood that the angle of incidence should be smaller procedure described in FIG . 4 to FIG . 6 , except that in the in order to increase the light emission probability through process of separating the semiconductor devices 2C and 2D the top face 4d . or forming the lateral faces 4a , it is possible to separate the 45 When the semiconductor device 2 is a light emitting semiconductor device 2 and to form the lateral faces 4a at d evice , it preferably has a light reflector 4b and / or a white the same time , by employing a saw blade 41 having a shape insulating film 6 such that the light extraction efficiency corresponding to the upper portion 4e of the light reflector upward the top face 4d or the semiconductor device 2 can be 4b . For instance , those inclined faces 4b1 and 4b2 shown in greatly increased . Likewise , even in the prior art as shown FIG . 18 can be formed by employing a blade capable of 50 in FIG . 15 , a white mold 130 is used , which composes the creating two different angles , while the inclined face 4b1 and overall configuration of a package and provides a cavity 140 , the step 4b3 shown in FIG . 19 can be formed by employing while reflecting light in the cavity 140 . In the present one blade having a shape corresponding to the inclined face disclosure , however , the aforementioned white mold 130 is 4b1 and another blade having a shape corresponding to the replaced with the light reflector 4b for reflecting light ( using step 4b3 . The application of a mechanical processing such as 55 a difference in refractive index between the encapsulating sawing is also advantageous in that the lateral faces 4a or the material 4b and outside ) , and the white insulating film 6 in light reflector 4b can be precisely formed into their desired the disclosure is distinguished from the white mold 13 in shapes . Although this is almost impossible when , as in FIG . terms of its location and functions . Moreover , the applica 15 , the encapsulating material 170 is dispensed by control - tion of the light reflector 4b and the white insulating film 6 ling its contour shape to the extent of um or greater ( e . g . , in 60 is due to a particular system of the manufacturing method case of dispensing the encapsulating material in the COB ) , according to the present disclosure . the same task is facilitated by applying the method accord - FIG . 23 is a view illustrating yet another example of a ing to the present disclosure . Also , in a conventional pack - semiconductor device structure according to the present age , a mold is usually required to obtain such a shape of the disclosure , in which a semiconductor device 2a and a lens 4c as in FIG . 14 . However , with the application of the 65 secondary semiconductor device 2b are integrally formed by method according to the present disclosure , the light reflec - the encapsulating material 4 . There is a groove 4f between tor 4b can be formed without the help of such a mold . the semiconductor device 2a and the secondary semicon

US 9 , 773 , 950 B2 11 12

ductor device 2b , and the groove 4f can take any shape , FIG . 24 . When the encapsulating material 4 is a thermoset including a slit for example . The groove 4f acts as a divider ting resin ( e . g . a silicone epoxy resin ) , it is desirable that the between the semiconductor device 2a and the secondary irregularities 4g , 4h are formed before the curing operation semiconductor device 2b , yet in such a way that these two is completed because it is not easy to form the irregularities semiconductor devices are integrally formed . It can also be 5 once the curing operation is completed . In addition , by used for preventing any unnecessary interference between allowing the curing operation to be completed during the the functions of the semiconductor device 2a and secondary formation of those irregularities 4g , 4h , it is possible to have semiconductor device 2b . It is not essential that the semi - the irregularities 4g , 4h follow the shapes of the press plates conductor device 2a has the same functions as the secondary 4h , 4k exactly . For example , it is possible to form the semiconductor device 2b . For instance , one of them can be 10 irregularities 4g , 4h , when the encapsulating material 4 is at a functional device , and the other can be a Zener diode for a temperature equal to or above its glass transition tempera preventing the static electricity . When both the semiconduc - ture . If the curing operation proceeds at a very high tem tor device 2a and the secondary semiconductor device 2b are perature at once , waves or bubbles may occur on the light emitting devices , each of the semiconductor device 2a encapsulating material 4 , and thus a clear smooth surface and secondary semiconductor device 2b can , of course , emit 15 cannot be attained . To resolve this issue , it has been found lights of different colors from each other . When both the that the encapsulating material 4 can have a clear smooth semiconductor device 2a and the secondary semiconductor surface , if the temperature is slowly increased step by step . device 2b are light emitting devices , the groove 4f is FIG . 28 is a view illustrating yet another example of a involved in the formation of a light reflector 4b . With the semiconductor device structure according to the present groove 4f being formed as the light reflector 4b , the semi - 20 disclosure , in which at the opposite side of the covered conductor device 2a and the secondary semiconductor semiconductor device 2 with the encapsulating material 4 , a device 2b are able to emit light towards the respective top heat - dissipation pad 891 is provided for dissipating heat faces 4d , without experiencing any interference with each generated from the semiconductor device 2 outside , thereby other . This groove 4f can be obtained by employing a blade producing an electrical insulation from the electrodes 80 and having a depth less than that of the entire length of the 25 90 or from both the electrodes 80 and 90 and the external encapsulating material 4 . It is also acceptable that the light electrodes 81 and 91 . In this example , the insulating film 6 reflector 4b is formed on only one of the semiconductor is formed first , and then the heat - dissipation pad 891 is devices 2a and 2b . formed on the insulating film 6 . With this configuration , a

FIG . 24 is a view illustrating yet another example of a path for supplying electricity and a path for dissipating heat semiconductor device structure according to the present 30 outside are independent of each other , such that the effi disclosure , in which the encapsulating material has an ciency of heat dissipation can be increased . Preferably , the uneven surface or irregularities 4g on top thereof , and also heat - dissipation pad 891 is also deposited together , when the an uneven surface or irregularities 4h at the bottom thereof external electrodes 81 and 91 are deposited . where electrodes 80 and 90 of the semiconductor device 2 FIG . 29 is a view illustrating yet another example of a are located . Naturally , it is possible that the irregularities 4g 35 semiconductor device structure according to the present are formed on only one side . When the semiconductor disclosure . This semiconductor device structure is identical device 2 is a semiconductor light emitting device , the with one shown in FIG . 28 in that the insulating film 6 is irregularities 4g can serve as a scattering plane for scattering formed first , followed by the external electrodes 81 and 91 light . The presence of the irregularities 4h enables to expand and the heat - dissipation pad 891 , but it is different in that a an area which the encapsulating material 4 , the insulating 40 part of the insulating film 6 is removed to enable a direct film 6 and / or the external electrodes 81 and 91 are facing , contact between the heat - dissipation pad 891 and the semi and as a result thereof , the bonding strength between them conductor device 2 . With this configuration , the efficiency of can be improved . Further , the bonding strength in the lateral heat dissipation can be increased , as compared with the case direction can also be improved as the movement in the where the insulating film 6 mainly composed of a dielectric lateral direction is restricted by the irregularities 4h . 45 material is interposed .

FIG . 25 is a view illustrating one example of the method FIG . 30 is a view illustrating yet another example of a for manufacturing the semiconductor device structure semiconductor device structure according to the present shown in FIG . 24 . In particular , it illustrates a process of disclosure , in which the external electrodes 81 and 91 and forming irregularities 4g ( see FIG . 24 ) on the encapsulating the heat - dissipation pad 891 are formed first , and then the material 4 by employing a press plate 4j , while the semi - 50 insulating film 6 is formed for electrically insulating the conductor device 2 is being secured at a position on the plate external electrodes 91 and 91 and the heat - dissipation pad

891 . FIG . 26 is a view illustrating another example of the FIG . 31 is a view illustrating yet another example of a

method for manufacturing the semiconductor device struc - semiconductor device structure according to the present ture shown in FIG . 24 . In particular , it illustrates a process 55 disclosure , in which the external electrodes 81 and 91 and of forming irregularities 4h ( see FIG . 24 ) by employing a the heat - dissipation pad 891 are formed , yet the insulating press plate 4k , after the insulating film 6 and the external film 6 is absent . electrodes 81 and 91 are formed on the semiconductor FIG . 32 is a view illustrating one example of the array of device 2 . In this example , the press plate 4k can be planar as electrodes , external extrudes and a heat - dissipation pad , as shown in FIG . 26 or can have irregularities as shown in FIG . 60 seen from the bottom of the semiconductor device structure 25 . It can also be envisaged that the press plate 4k is placed shown in FIG . 31 . In this example , the semiconductor device on top of the encapsulating material 4 , and the press plate 4 ; 2 surrounded with the encapsulating material 4 is located at being planar or uneven can be plated at the bottom of the the center ; the electrode 80 and the electrode 90 are provided encapsulating material 4 . with the external electrode 81 and the external electrode 91

FIG . 27 is a view illustrating one example of the curing 65 array , respectively ; and the heat - dissipation pad 891 is operation of an encapsulating material in the process of formed across the entire region except those mentioned manufacturing the semiconductor device structure shown in above . With this configuration , the contact area with the

1 .

13 US 9 , 773 , 950 B2

14 PCB , the COB or the like , on which the semiconductor nal encapsulating material 4 , but not into the internal encap device structure is mounted , can be expanded , and as a result sulating material 4 . In other words , the external encapsulat thereof , heat dissipation of the semiconductor device struc - ing material 4 can become a phosphor layer . The same ture can be maximized . The heat - dissipation pad 891 is principles as those described above is also applied to this preferably formed across almost the entire semiconductor 5 case , i . e . , it is possible to control the interface between the device 2 and encapsulating material 4 , but this is not both sides , and to control the outer configurations thereof . absolutely required . If necessary , the heat - dissipation pad The encapsulating material 4 that constitutes the phosphor 891 can be formed across all or part of the semiconductor layer 8 and the encapsulating material 4 that covers the device 2 , and formed across all or part of the encapsulating phosphor layer 8 may be the same material , or may be material 4 . 10 different materials having different properties from each

FIG . 33 is a view illustrating another example of the array other ( refractive index , hardness , light transmission , curing of electrodes , external extrudes and a heat - dissipation pad , rate , etc . ) . Accordingly , this embodiment can expand its as seen from the bottom of the semiconductor device struc - scope of application to the method for manufacturing a ture shown in FIG . 31 . In this example , the electrodes 80 and semiconductor device structure according to the present 90 and the external electrodes 81 and 91 are formed in larger 15 disclosure , which incorporates the same or different encap dimensions than those in the semiconductor device structure sulating material ( s ) at least two times . When the semicon shown in FIG . 32 , such that some of the heat may be ductor device has such a phosphor layer 8 , it is suitable for dissipated , via from the semiconductor device 2 , then the use as a semiconductor light emitting device . However , even electrodes 80 and 90 and the external electrodes 81 and 91 . when the semiconductor device does not contain any phos This configuration can be particularly suitable when the 20 phor , it would not necessarily be a semiconductor light semiconductor device is a flip chip type semiconductor light emitting device . emitting device in which one of the electrodes 80 and 90 is FIG . 38 is a view illustrating yet another example of the designed in larger dimensions to serve as a reflector . Mean method for manufacturing a semiconductor device structure while , the heat - dissipation pad 891 not only has a heat - according to the present disclosure . As in FIG . 34 , after the dissipation function , but also serves as a light reflective film 25 phosphor layer 8 is formed , part of the phosphor layer 8 is when the semiconductor device is a semiconductor light removed , without performing a process for removing the emitting device . Here , the heat - dissipation pad 891 prefer - plate 1 , and the phosphor layer 8 is conformally formed on ably consists of a metal , such as Al or Au , which is known each of the semiconductor devices 2 and 2 . In case that the to be excellent in terms of heat dissipation and reflectivity . process of FIG . 37 proceeds later on , the method in this Preferably , as shown in FIG . 29 and FIG . 30 , the opposite 30 example has an advantage of reducing the number of the use side of the covered semiconductor device 2 with the encap - of the plate 1 to once . sulating material 4 is completely covered with the heat FIG . 39 to FIG . 41 are views illustrating one example of dissipation pad 891 , the external electrodes 81 and 91 and the method for manufacturing the semiconductor device the insulating film 6 ( e . g . , white PSR , DBR ) , thereby maxi structure shown in FIG . 12 . Unlike the method shown in mizing the efficiency of light reflection . 35 FIG . 38 , the phosphor layer 8 is subjected to a partial

FIG . 34 to FIG . 36 are views illustrating one example of removal , instead of a complete removal , leaving part of the the method for manufacturing the semiconductor device phosphor layer 8 . Next , the semiconductor devices 2 and 2 structure shown in FIG . 11 . Here , the semiconductor devices are covered with the encapsulating material 4 as shown in 2 and 2 being secured to the plate 1 by means of an adhesive FIG . 40 and then separated as shown in FIG . 41 , thereby 3 are covered with the encapsulating material 4 containing 40 obtaining a semiconductor device structure . Naturally , the a phosphor , that is , a phosphor layer 8 . Next , the plate 1 is encapsulating material 4 can have diverse configurations , removed as shown in FIG . 35 , and the semiconductor including one shown in FIG . 13 and one shown in FIG . 14 , devices 2 and 2 are separated from each other . This method for example . enables to conformally coat the semiconductors devices 2 FIG . 42 and FIG . 43 are views illustrating yet another and 2 with a so - called phosphor or the phosphor layer 8 . 45 example of the method for manufacturing a semiconductor Moreover , the phosphor layer 8 can be made to have the device structure according to the present disclosure . As height V and the width H of the same dimensions . Therefore , shown in FIG . 42 , the plate 1 is attached to the encapsulating there is a big distinction between this type of conformal material 4 . The attachment of the plate 1 to the encapsulating coating ( the configuration of a conformal coating through material 4 can be carried out by the same method as one the removal of the encapsulating material 4 or through the 50 illustrated in FIG . 3 . The plate 1 can be attached to the removal of the phosphor layer 8 ) and the conventional encapsulating material 4 , before or after being separated conformal coating achieved by spin coating , screen printing from the electrode 2 in FIG . 3 to which the plate 1 has been or the like in the art . attached . In this embodiment , it is important that the plate 1

FIG . 37 is a view illustrating yet another example of the does not bend like a plate made of flexible materials . As method for manufacturing a semiconductor device structure 55 shown in FIG . 43 , once the plate 1 as shown in FIG . 3 is according to the present disclosure , in which the semicon - removed , a number of various processes including the ductor devices 2 and 2 manufactured in FIG . 36 are placed formation of an insulating film 6 , the formation of external on the plate 1 by means of the adhesive 3 again , and coated electrodes 81 and 91 , cutting the encapsulating material 4 , with the encapsulating material 4 again . The encapsulating and / or a photolithography process involved are required , material 4 may additionally include other phosphors and / or 60 and it is very crucial at this point that the encapsulating small particles for scattering the light . Unlike the conven - material 4 of merely a few mm height should retain its planar tional way , it is easier to control the shape of an interface profile . To this end , it is essential to use a rigid plate 1 . As between the phosphor layer 8 and the encapsulating material the material of the plate 1 , it is possible to use ceramic , glass , 4 . Indeed , the outer configuration of the phosphor layer 8 as m etal , engineering plastic or the like . The thickness of the well as the outer configuration of the encapsulating material 65 plate 1 may vary depending on the material used , but it is 4 covering the phosphor layer 8 can easily be controlled . desirable to maintain an optimal thickness , in order to Meanwhile , the phosphor may be introduced into the exter prevent bending and to maintain the mechanical stability .

15 US 9 , 773 , 950 B2

16 For instance , any thickness equal to or greater than 1 mm FIG . 51 and FIG . 52 are views illustrating yet another would be sufficient for a glass substrate . The plate 1 can be example of the method for manufacturing a semiconductor removed before or after cutting those two semiconductor device structure according to the present disclosure , in devices 2 and 2 . which an adhesive layer 11 ( e . g . Cu , Sn , etc . ) is formed into

FIG . 44 to FIG . 47 are views illustrating yet another 5 a thin layer , prior to the formation of the external electrodes example of the method for manufacturing a semiconductor 81 and 91 . Next , as shown in FIG . 52 , the adhesive layer not device structure according to the present disclosure , in being covered with the mask 12 and the external electrodes which a photoresist 9 is applied following the removal of the 81 and 91 is removed , and the semiconductor device struc plate 1 ( see FIG . 3 ) . For example , the photoresist 9 can be ture as shown in FIG . 50 can thus be obtained . The adhesive composed of white PSR serving as the insulating film 6 . An 10 layer 11 enhances the bonding strength between the external exposure operation is needed to expose the electrodes 80 and electrodes 81 and 91 and the electrodes 80 and 90 . 90 . For a mask pattern , instead of using an additional mask FIG . 53 is a view illustrating yet another example of the pattern , the electrodes 80 and 90 are used as masks . After method for manufacturing a semiconductor device structure that , as shown in FIG . 45 , light L is irradiated from the upper according to the present disclosure , in which , after the side of the encapsulating material 4 such that the photoresist 15 insulating film 6 is formed , the external electrodes 81 and 91 9 can be exposed , and regions 80a and 90a corresponding to are formed simply by electroless plating , without any etch the electrodes 80 and 90 can be removed after the exposure . ing process . FIG . 46 shows how those regions 80a and 90a look after the Referring back to FIG . 2 , in a semiconductor device photoresist 9 is removed . Preferably , the encapsulating structure ( e . g . a semiconductor light emitting device ) to be material 4 is free of a phosphor such that the light L can be 20 manufactured in practice , the electrode 800 and the elec properly transferred to the photoresist 9 . Now that the trodes 901 , 902 and 903 have a structure with a limited electrodes 80 and 90 are used as masks , and that an configuration , depending on the specifications required of alignment operation for an additional mask used is no longer the semiconductor device structure . Thus , this means , required , a more accurate exposure operation can be per - although the electrodes 800 and the electrodes 901 , 902 and formed . If necessary , as shown in FIG . 47 , the external 25 903 may be employed as exposure masks according to the electrodes 81 and 91 are electrically connected to the present disclosure , one cannot change their shapes arbi electrodes 80 and 90 , respectively . With the photoresist 9 trarily . In FIG . 2 , for example , the electrodes 901 , 902 and being composed of white PSR , the photoresist 9 can now 903 are only formed across the entire second semiconductor serve as an insulating film 6 and a light reflective film at the layer 500 , and on the exposed , first semiconductor layer 300 same time . Even a semiconductor device should be light - 30 as a result of etching the electrode 800 . Likewise , the transmissive overall . For example , in case of a group III - semiconductor device light emitting devices illustrated in nitride semiconductor device , as in FIG . 1 , it can be formed FIG . 54 and FIG . 55 are not exempt from these restrictions , into a light - transmitting semiconductor on a transparent either . sapphire substrate , a GaN substrate or a SiC substrate . That Another aspect of the present disclosure is to provide a is , as the semiconductor device 2 and the encapsulating 35 method for manufacturing a semiconductor device structure material 4 are light - transmissive , the light L used for the having no restrictions described above . exposure can go through them and be applied to the pho - FIG . 56 is a view illustrating yet another example of the toresist 9 . method for manufacturing a semiconductor device structure

FIG . 48 is a view illustrating yet another example of the according to the present disclosure , in which the photoresist method for manufacturing a semiconductor device structure 40 9 is applied after the removal of the plate 1 ( see FIG . 3 ) . For according to the present disclosure , in which the external example , the photoresist 9 may be composed of white PSR electrodes 81 and 91 are formed , prior to the formation of the serving as the insulating film 6 . An exposure operation is photoresist 9 or the insulating film 6 . In this case , the needed to expose the electrodes 80 and 90 . For a mask electrodes 80 and 90 as well as the external electrodes 81 pattern , instead of using an additional mask pattern , the and 91 can be employed as masks during the exposure . 45 electrodes 80 and 90 are used as masks . After that , light L Unlike the electrodes 80 and 90 , of which shape and size are is irradiated from the upper side of the encapsulating mate limited by the size and characteristics of the semiconductor rial 4 such that the photoresist 9 can be exposed , and regions device 2 , the external electrodes 81 and 91 are not limited by 80a and 90a corresponding to the electrodes 80 and 90 can the semiconductor device 2 , if necessary , they can be be removed after the exposure . Preferably , the encapsulating designed in a high degree of freedom and take any desirable 50 material 4 is free of a phosphor such that the light L can be pattern . properly transferred to the photoresist 9 . Unlike this , the

FIG . 49 is a view illustrating yet another example of the encapsulating material 4 can contain a phosphor to allow the method for manufacturing a semiconductor device structure phosphor to scatter the light L , thereby facilitating the according to the present disclosure , in which a plurality of exposure . Any description of the same reference numerals semiconductor devices 2 and 2 are being cut . When the 55 100 , 200 , 300 , 400 , 500 and 600 will not be repeated . Unlike semiconductor device structure is manufactured by the the semiconductor device 2 shown in FIG . 45 , the electrodes method of FIG . 44 to FIG . 47 , the photoresist 9 located 80 and 90 are not directly formed on the first semiconductor below the external electrodes 81 and 91 is split together with layer 300 and on the light - transmitting conductive film 600 , the encapsulating material 4 at the time of cutting the but a dielectric film 94 having a DBR is interposed between semiconductor devices 2 and 2 along a cutting line C . 60 the electrodes 80 and 90 and the layers 300 and 600 , and

FIG . 50 is a view illustrating yet another example of the there are electrical connections 82 and 92 for electrical method for manufacturing a semiconductor device structure communication between the layers 300 and 600 and the according to the present disclosure , in which the external electrodes 80 and 90 . In other words , the electrodes 80 and electrodes 81 and 91 are formed by a stencil method using 90 are electrically connected to the first semiconductor layer a mask 12 . When a solder paste is applied to the external 65 300 and the second semiconductor layer 500 , respectively , electrodes 81 and 91 , the semiconductor device structure can passing through the dielectric film 94 . Naturally , each elec be directly mounted onto the PCB or the like . trical connection 82 and 92 may be provided in plural

Il

17 US 9 , 773 , 950 B2

18 numbers . Preferably , for an ohmic contact with the first least part of the semiconductor device and of the encapsu semiconductor layer 300 , an electrode 83 may be formed lating material , thereby producing an electrical insulation beforehand . If appropriate , it is perfectly acceptable to form from the electrodes . the electrode 83 into an elongated finger electrode extending ( 8 ) The method for manufacturing a semiconductor along the first semiconductor layer 300 . Such a finger 5 device structure , wherein in the step of securing the position , electrode can also be formed between the light - transmitting two semiconductor devices are secured at positions on the conductive film 600 and the electrical connection 92 such plate , and electrodes of each of the two semiconductor that the current supply to the entire semiconductor device 2 devices are secured such locations that the electrodes face can be facilitated . The light - transmitting conductive film the plate ; wherein in the covering step , the two semicon 600 may be omitted . With this configuration , the electrodes " ductor devices are covered with a first encapsulating mate 80 and 90 can have a form , without being restricted by the rial , at least part of the first encapsulating material between semiconductor device 2 . The dielectric film 94 having a the two semiconductor devices is then removed , and , with DBR serves to reflect light generated in the active layer 400 the two semiconductor devices being remained covered with towards the substrate 100 , and is thus designed to adapt to 15 the first encapsulating material , the two semiconductor the wavelength of the light generated in the active layer 400 . devices having been covered with the first encapsulating For instance , when the active layer 400 generates a blue material are covered with a second encapsulating material ; wavelength ( e . g . 450 nm ) and the DBR is composed of a and wherein in the separation step , the two semiconductor stack of a repeating pattern of SiO2 / TiO2 , each DBR layer is devices covered with the first and second encapsulating designed to have a thickness of 450 nm / nsio2 and a thickness 20 materials are separated . of 450 nm / 1102 . For example , if a UV - reactive photoresist ( 9 ) The method for manufacturing a semiconductor 9 is used for the insulating film 6 and if a UV - wavelength device structure , further comprising the step of : after the light L is irradiated thereto , part of the light L passes through covering step , attaching a plate made of rigid materials to the the DBR , enabling to expose a region 89a between the encapsulating material . electrode 80 and the electrode 90 . Needless to say , it is also 25 ( 10 ) The method for manufacturing a semiconductor possible to employ any light L having a longer wavelength device structure , further comprising the steps of : covering than that of the light generated in the active layer 400 . the side where the electrodes of the semiconductor device

FIG . 57 is a view illustrating other examples of the are located with photoresist ; and exposing the photoresist , semiconductor device shown in FIG . 56 . In the drawing , the using the electrodes as masks . left - hand side view shows that the electrodes 80 and 90 can 30 ( 11 ) The method for manufacturing a semiconductor be arranged symmetrically ; the view at the center shows that device structure , further comprising the step of : forming a plurality of electrical connections 92 , 92 and 92 can be external electrodes in the electrodes by a stencil method or provided ; and the right - hand side view shows that , in electroless plating , or by means of a solder paste . This addition to the electrodes 80 and 90 , a heat - dissipation metal process is not always accompanied with a process for film 89 having regions 89a and 89a formed on both sides is 35 exposing the electrodes with a mask . Preferably , an adhesive formed . Although rectangular - shaped electrodes 80 and 90 layer is interposed between the electrodes and the external are illustrated , the electrodes are not particularly limited electrodes , so as to enhance the adhesive strength between thereto . them .

Hereinafter , exemplary embodiments of the present dis - ( 12 ) The method for manufacturing a semiconductor closure will be described . 40 device structure , wherein , in the step of securing the posi

( 1 ) A semiconductor device structure , wherein an encap - tion , the semiconductor device is a light - transmitting device sulating material serves as a carrier . and has two electrodes thereon using a dielectric film having

( 2 ) The semiconductor device structure , wherein the bot - a DBR ( Distributed Bragg Reflector ) as a medium , and the tom face of the encapsulating material is separated from a two electrodes are electrically connected with the semicon plate . 45 ductor device by passing through the dielectric film and are

( 3 ) The semiconductor device structure , wherein the outer secured at such positions on the plate that the electrodes face faces of the encapsulating material form the outer faces of the plate ; and wherein , in the exposing step , the photoresist the structure or package , except for the side where the is exposed , using the two electrodes as masks . electrodes of the semiconductor device are located . In one method for manufacturing a semiconductor device

( 4 ) The semiconductor device structure , wherein semi - 50 structure according to the present disclosure , it is possible to conductor devices are bonded using the encapsulating mate - manufacture a semiconductor device structure or package in

an easier manner . ( 5 ) A method for manufacturing a semiconductor device I n another method for manufacturing a semiconductor

structure , comprising the steps of : securing the position of a device structure according to the present disclosure , it is semiconductor device on a plate ; securing the positions of 55 possible to obtain a structure or package where an encap electrodes such that they face the plate ; covering the semi - sulating material serves as a carrier . conductor device with an encapsulating material , and sepa In yet another method for manufacturing a semiconductor rating , from the plate , the semiconductor device covered device structure according to the present disclosure , it is with the encapsulating material . possible to obtain a light emitting device structure or pack

( 6 ) The method for manufacturing a semiconductor 60 age where a light - transmitting encapsulating material serves device structure , further comprising the step of forming as a carrier . irregularities by pressing the side where the electrodes of the In yet another method for manufacturing a semiconductor semiconductor device are located . device structure according to the present disclosure , it is

( 7 ) The method for manufacturing a semiconductor possible to electrically connect a plurality of semiconductor device structure , further comprising the steps of : at the 65 devices in an easier manner . opposite side of the covered semiconductor device with the In yet another method for manufacturing a semiconductor encapsulating material , forming a heat - dissipating pad on at device structure according to the present disclosure , it is

rial .

US 9 , 773 , 950 B2 19 20

possible to electrically connect semiconductor devices of a distributed bragg reflector covering the second semi different configurations in an easier manner conductor layer and the etch - exposed portion of the

In yet another method for manufacturing a semiconductor first semiconductor layer to reflect light generated from device structure according to the present disclosure , it is the active layer toward the substrate ; and possible to form an uneven surface or irregularities on the 5 an encapsulating material , which is made of a light encapsulating material . transmitting material having a top face , a bottom face

In yet another method for manufacturing a semiconductor opposite to the top face , and with which the semicon device structure according to the present disclosure , the ductor device is covered from the first semiconductor formation of irregularities enables to improve the bonding layer side to the second semiconductor layer side strength between the encapsulating material , the insulating 10 without covering the first and second electrodes so as to film and / or the external electrodes . expose the first and second electrodes through the

In yet another method for manufacturing a semiconductor bottom face of the encapsulating material , device structure according to the present disclosure , it is wherein the first and second electrodes are located under possible to increase the efficiency of heat dissipation as well the distributed bragg reflector , and the distributed bragg as the efficiency of light reflection . reflector is positioned between the second semiconduc

In yet another method for manufacturing a semiconductor tor layer and the first and second electrodes . device structure according to the present disclosure , it is 2 . The semiconductor device structure according to claim possible to control the configuration of a phosphor layer in 1 , wherein the semiconductor device except the first and an easier manner . second electrodes thereof is made of a light - transmitting

In yet another method for manufacturing a semiconductor 20 material . device structure according to the present disclosure , it is 3 . The semiconductor device structure according to claim possible to expose the insulating film , without the use of an m without the use of an 1 , wherein at least part of the encapsulating material is additional mask pattern . provided with a phosphor .

In yet another method for manufacturing a semiconductor 4 . The semiconductor device structure according to claim device structure according to the present disclosure , it is 25 1 , wherein a lens is formed integrally with the top face of the possible to have a high level of freedom in designing the encapsulating material . electrodes that are used as exposure mask patterns . 5 . The semiconductor device structure according to claim What is claimed : 1 , wherein light reflectors are formed integrally with the

lateral faces of the encapsulating material . 1 . A semiconductor device structure comprising : a semiconductor device , including a first semiconductor 30 onductor 30 6 . The semiconductor device structure according to claim

1 , further comprising : layer having a first conductivity and having an etch exposed portion , an active layer for generating light via a white insulating film on the bottom surface , so as to electron - hole recombination , and a second semicon expose the first and second electrodes .

7 . The semiconductor device structure according to claim ductor layer having a second conductivity different from the first conductivity , which are stacked over a 35 - er a 35 2 , wherein at least part of the encapsulating material is substrate in the order mentioned , and a first electrode provided with a phosphor . and a second electrode formed at the side where the 8 . The semiconductor device structure according to claim second semiconductor layer is located and electrically 7 , wherein a lens is formed integrally with the top face of the connected to the first semiconductor layer and the encapsulating material . second semiconductor layer , respectively ; * * * * *

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