substrate noise: analysis, models, and optimization · substrate noise:analysis, models, and...

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Substrate Noise: Analysis, Models, and Optimization Edoardo Charboll Cadenc(! San Cll .1).51:14 [email protected] .Jod Phillips Cadl-:nce Ht1'kdl',l} Labomtm-it8, Hr-rkdl',l}. CA 94704 [email protected] Abstract In this paper we addresb the IImin probleIIL"i posed hy bub!!trate nobl' froU} two ('omplcmelltary points of view. \Ve look at the effl'ctb of bub- !!trate noise on perforIllallce ami rcliability in digital. analog and IlIixed- signal circuits. Thc lIlechanisms underlying noise generation, injection, and transport arE' also analyzed. Solution.-; t.o thc substrate noisc prob- lem IL-;ing design and layout t.echniqllcs. as wPlI as accurate analysis and optimization are discuSbed. Keywords: Substrate, üptiIllization, Scaling. Parabitic Extraction, Green's func- tion, Fabt eosine 1hwsfonn 1. INTRODUCTION In th(' past decade, substrate noise has hOO a ('onstant and signifi- cant impact in th(' design of analog and mixed-signal integrated circuits. OnIy rec('ntly, with the advances in chip miniaturization and innovative circuit cksign, substrate noise has begun to pIagu(' fully digital circuits as well. To combat the e!Ieets of substrate nois<' , heavily over-d<'sign('d struetnr('s are generally adopted, thus serionsly limiting the advantages of innovative technologies. For this rea,.")Oll, the modcling of substrate noi&' is re(;eiving serious attention. -r.,·1acrO-Illodcls mimicking substrate noise sourees amI bettel' simulation of transport mechanisuu; havc been The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: © IFIP International Federation for Information Processing 2000 L. M. Silveira et al. (eds.), VLSI: Systems on a Chip 10.1007/978-0-387-35498-9_57

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Page 1: Substrate Noise: Analysis, Models, and Optimization · Substrate Noise:Analysis, Models, and Optimization 458 p nEPI Figur!' 1 Substrate cro88-:·;ection of (J eMOS im'erter 2. NOISE

Substrate Noise: Analysis, Models, and Optimization

Edoardo Charboll Cadenc(! San Cll .1).51:14 [email protected]

.Jod Phillips Cadl-:nce Ht1'kdl',l} Labomtm-it8, Hr-rkdl',l}. CA 94704 [email protected]

Abstract In this paper we addresb the IImin probleIIL"i posed hy bub!!trate nobl' froU} two ('omplcmelltary points of view. \Ve look at the effl'ctb of bub­!!trate noise on perforIllallce ami rcliability in digital. analog and IlIixed­signal circuits. Thc lIlechanisms underlying noise generation, injection, and transport arE' also analyzed. Solution.-; t.o thc substrate noisc prob­lem IL-;ing design and layout t.echniqllcs. as wPlI as accurate analysis and optimization are discuSbed.

Keywords: Substrate, üptiIllization, Scaling. Parabitic Extraction, Green's func­tion, Fabt eosine 1hwsfonn

1. INTRODUCTION In th(' past decade, substrate noise has hOO a ('onstant and signifi­

cant impact in th(' design of analog and mixed-signal integrated circuits. OnIy rec('ntly, with the advances in chip miniaturization and innovative circuit cksign, substrate noise has begun to pIagu(' fully digital circuits as well. To combat the e!Ieets of substrate nois<' , heavily over-d<'sign('d struetnr('s are generally adopted, thus serionsly limiting the advantages of innovative technologies. For this rea,.")Oll, the modcling of substrate noi&' is re(;eiving serious attention. -r.,·1acrO-Illodcls mimicking substrate noise sourees amI bettel' simulation of transport mechanisuu; havc been

The original version of this chapter was revised: The copyright line was incorrect. This has beencorrected. The Erratum to this chapter is available at DOI:

© IFIP International Federation for Information Processing 2000L. M. Silveira et al. (eds.), VLSI: Systems on a Chip

10.1007/978-0-387-35498-9_57

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457 Edoardo Charbon, Joel Phillips

uevcloped, thus allowing designers to detect potential problellL'; bdore fabrieation. Specifie guiuelines have also been drafted for more aggres­sive, substrate-aware uesig11 practices.

Aeeuratcly eharacterhdng substrate noise is problcmatic for various reasons. The noise results from superposition of a large number of local and remote sources, each attenuated anu ddayeu in a uniqu(' way. l\Iod­ding signal attenuation and uday individually may be extremcly time eonsuming and would r('quin' aeeurate ad hoc characterization of a11 th(' sources, whieh is in itself a hard problem. Substrate noise (;an be decom­posed, at a maeroscopic level, in intrinsic and swit.ching noise. lntrinsic noise is a hackground spurious signal originated in active and passive deviees through various physical ph('nomena, namdy t.hermal, shot. and flicker noise. Switching noise originates in digit.al hlocks where frequent st.at.e transitions, occurring in gates across thc chip, cauS<' current. pulses t.o bc absorbcd from and transmittcd to power and ground huscs through dired feedthrough and t.he chargejdiseharge of loads. Such pulsing Clll'­

rcnts are partia11y injccted into the suhstrat.c t.hrough impact ionization and capa.citive coupling.

Switching noise couplcd through the substrate is very dest.ructive as it can he broadcasted over great distances and pickcd np hy sensit.ive circuits, by way of capaeitive coupling and hody effect. The resulting threshold volt.age modulation dynamically changes gatc dclays locally, Ums impacting performanrc in ways that. are diffirnlt to predict. Switch­ing noise has an cspcrially det.rimental effert on dynamic logic, memories and emheddcd analog cirruit.s, such as phase lock loops.

Arrurat.e est.imation of suhstrate noise r('quires several teclmiques to model switching noise injection, transport, and reception mechanisms, hoth at. t.lle microscopic and macrosropic lew·I. Moreover, means arE' ncc­essary to cmhed suhstrate noise in optimization loops and trend analysis tools. Tllis is crit.ical to help designers detect suhst.rate related problems as early as possiblc, tailoring design pract.ices, in ordcr to avoid lengthy redesign cycles.

The paper is organized as follows. In Scction 2. t.lle physical merha­nisms underlying substrate noise generation, t.ransport and ahsorption are out.lined. Sedion 3. reviews several suhstrate noise analysis tech­niqucs, while Sedion 4. prescnts subst.rate-aware opt.imizat.ion met.hods applied to physical design prohlems.

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Substrate Noise:Analysis, Models, and Optimization 458

p

nEPI

Figur!' 1 Substrate cro88-:·;ection of (J eMOS im'erter

2. NOISE COUPLING MECHANISMS

2.1 Noise Injection and Reception

Substrate noisc is causcd mainly by thc switching activit.y of fa ... 'lt dig­ital circuits ami it is injcctHl into the substrate via impurt ionizat'ion and cupucit'ive conpling mechanisms. Fig,tlre 1 shows a t.ypical cross­scction of substrat.e epitaxial layer on which a C::'IOS inverter is inte­grated. Impact ionization is causcd by dectron-hole pairs gencrated in the pinch-off region, when the c1cctric ficld exceeds a givcn thrcshold. The excess holes are collected in t.hc region of subst.rate und er the de­vice and from there t.hey are transportcd throughout thc chip. Impact ionization currents are evaluated as

j<) Ir rn ,-B/j<)(x) I.impacL = IdAc dx.

E., (1.1)

where E .• , Ern, E(x) and Id are sour ce elcctric fiel<.!, maximum elcctrie ficld, loeal clectrie fidd and drain eurrent, respectively. Constants A and B are material rclateel eocfficiC'nts. Formulae rclating these paramC'ters to mC'asurablc quantitks anel the derivation of (1.1) can be foun<.! in [1 J. Sinee Em » Es , integral (1.1) can hc approximatC'el to

4 I - IE 1 -BIErn -cy (lT TT )1 -(I.' 17 I impact:::' B m df: - I v ds - v df' rls d.<at, (1.2)

where I, amI are effective channcllcngth, drain-source voltage anel saturation voltagc, respectivcly. Cl anel C2 are material rclatcd coefficients [1J. Eqnation (1.2) is used by most MOSFET models to rcprescnt impact ionization currcnts [2].

Switching noisc can also be coupled int.o substrate capacitivcly throllgh reverse biaseel junctions amI metal-to-diffusion capacitanees. All spuri­ous currcnts injccted into thC' substra.te trawl through the bulk reaching varying elepths and rC'surfacing to bc collectcd by low-resistivity pick-ups.

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459 Edoardo Charbon, Joel Phillips

n+ /" '-......

4)lm

4)lm

(b)

Figlll'e;! Cllrrent flOll! of sllb8trate noi8e through low-resisti1Jity 81Jbstrotp with dif­!prp'nt wjedor/re('eptor confi,gurlltions, 1l8smmng groundpd blld'pllltp

The pat.hs followed by such (,1llTent.s are determincd by t.he rdativ0 po­sition of tl}(> inj0ctoL the pi('k-up amI t.he other contacts in the circuit, t}}(> subst.rate doping profile, and th0 backplate potent.ial. Figure 2 shows snbstrat.0 current. ftow lin0s for t}}(> ('ase of (a) distant and (h) dose inj0ctor/receptor syst<'m.s in a typica} high-resistivit.y suhst.rate. In t.he whole spect.rum. of silicon substrates availablc today, one ('an recog­nize two main types: one r('ferreel to as high-Tesistivity anel t.he othcr as low-resistivity substrat('. In gen0nü, t.hc first substrat.0 typ(' is mmpos00 of a uniformly dopeo laY0r wit.h a resistivity co('fficient. of 20 - 50 fkm. ThC' second type consist.s of a thick, high-r('sistivit.y epitaxial layer (0

lOflm , p 10 - 15 fkm) and a low-resistivit.y bulk(p 1m fkrn). Low-resist.ivity snbstrat('s are g('ncrally prct'0rr('0 for thC'ir good latch­up snppression properties [1]. High-resistivity ones on thC' ('ontrary, ar(' bett.er suited t.o block suhstrate nois0 hy using guaro rings ano physical circllit separat.ion. At low ano nwclium freqll0ncies, typically l('ss than 5 GHz, a11 snbstrat('s show a resistive b0havior.

Let. us ('onsiON as an 0xamplc thc GMOS inv('rter from Fignre 1, which we assnllle has lw('n integrateo int.o a high-resistivity snbstrate. The plot in Fignre :3 shows the input wavcform. amI t.he r('sulting in­j0('ted signals for both High-to-Low anel Low-to-High transitions ano various slew rates at t.he input (note th(' oiff0rent t.ime s('ale in th0 var­ious wavcforms). The plot was obt.airwo from SPIeE sinmlations using

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Substrate Noise:Analysis, Models, and Optimization 460

v. '" IL [j: ' . : V . -1 00 DU _ ...... ; ...•. . , .. . .. .................... .... .. : . .. ....... ........ .. .. .. . ........ , .......... . ... .....

. : : j 1

so . ou r-- .. .. [ ..... 1' ....... : ... : .. 1" .. , .... ; .... ·! ·· .. .. , .... , .... t .. , .. · .. , .. .. , .... f ........ , .. · , .. 1 o. ," i . aÖ " . au, ";.66 1i.00 !b . du kou o. : CLI,..) 12. IU

1 00. ou r .... .... 1" .. ····· ···· ··i .... ·· .. !· .. .. .. ··· .. : .......... ' .. 1 50. DU .. • .. .. ··: .. .. · ...... · .. ·,,· ·· .. · .. :· .. .... ·J!f.' .... .. · ........ : .... .. · .. . ... -=< U .\ ; : : rL : : :;

0 . : ': .. ·· 2 iOO:O N' , .. 6o:0"i 'lI bo:ON' 'li. oJ ' , lil 20U 0 , CLI N 1.20U

,:::,;: P\I.. .. .1.,' •. ," .1.. .I ',,' ',1 o. . T,HE CLIN) 1 2 0. 01'1

: ;;; .l; ä1. i . , •••. •••..•. i·. •• ,:1 ••..•• , ••• ; •• ; ••..••.•• •.••• : •••.•••. ••.•. ·1 . 2 .0N ' .O N 6 . 0N 9 . 0N 10 . OH 12.0"

O. TIH C CLIN) 12.0N

Fiy'/tf"l· ;J No ise injected into s'ubstrate via impact ionization and capacitwe coltpling and O.ßJ1TIl eMDS t f.chnologies) . Thf. waveforrns shouYr/. were ob­taineAl lInth 'l11.p1Jt waveforrns of varying slew rates: note the d·lf!f.rent time smles of 2flser:, :200 nsel:, 20 nsf.c. and f2 nsel:. wh·t/e the tnp1Jt llJ(J1)f.form is SCIllf.d accordingly

custom-fitted drvicr models. Assuming that. switching is synchronizrd with a dock signal, it can be shown that thr powrr has energy compo­nent.s locat.rd in a wide spect.rum. not. necessarily centered at the dock fJ'('quC'ncy. A signific:ant port.ion of this energy is usually concentrated aronnd special frequcnc:y bands, e.g. at. thC' inverse of th<:> average gatC' dday. At. DC or nC'aI' DC frequ('ncies, oue also observes large spuriol.ls current.s. This is due t.o thC' fact that impact. ionization. for its very na­turC', only genC'rates positive Cl.lrrents. Highcr frequC'ncy compouents are du(' t.o glitches amI fast switching phenomC'ua occurring in largc c:ircuits [3].

Impact ionization has the following features: (a) t}w instant in wh ich the maximum of thc waveform is [C'ctc}wd dep('nds on t.he risiug and

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461 Edoardo Charbon, Joel PhillipS

________ - - - - - - - - - - - - - - - - - - - - - - - - - - -- - - - r - - - --:

-10.0 , . I , , 1

-30, ,

I - 40,OCl

___ __ • ________________ ________ __ ...... ________ 10.... _____ I

-4 .00 -2.00 0,00 2.00 4.00

-4 Nonnahzcd .mb8tmtc noi8c spectTU7fI. of C6288 'in dß GHz

falling time of tlw input. signal; (h) t}w duration of thc pulse depends on t.he rising and falling time of thc input signal; Impact ionization pulses havc approximatcly the same shape in all shown fre(juen('ies while only their durat.ion is different. (again note the different time scalcs in Figure 3). Capacitive coupling (drain-substrate and SOUl'('c-suhst.rate reverse-hiased jllnctions) dominat.es for risingjfalling times of less than 10118.

In a typicallogic circnit of several thousands gates, the effe('t of switch­ing adivity and glitches result in a cumulative injected noise, whose power spedrum repre!:icnts a significant portion of the total energy ab­sorbed by thc circuit. As an illustration consiuer the MCN91 benchmark C6288. The drcuit's spectnlln, computed using is ShOWll in Figure 4. One can recognize thc DC, inverse delay alld high fre­<{UCllCY componcllts. Notably, at the dock fH'(}Uellcy, the spectrum is relatively ftat. If a circuit with such a large spectrum of injected noise is integratcd near sensitive componcnts, then thc noise present at the substrate'::; surface throughout the chip will be unevüllly distributed.

2.2 Delay Effects

So far we havc outlined the effects of suhstrate noisc coupling on mixed-signal circuit performance. Digit.al circuits are not immune from suhst.rate noise. The noise is injc('ted hy logic gat.es dnring switching and glitch transient.s through impact iOllizat.ion and ('apacitive coupling, and it is pi('ked up by active dcvices via capacit.ive coupling and hody effect . As a result the dclay of the datapat.h may increasc, tIms possibly ex('eeding t.he predefined dock pet·iod. Snch behavior is known as delay effect.

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Substrate Noise:Analysis. Models. and Optimization 462

• ; Fiyuf'(, 5 Aualog!! between interconuect cross-talk und s'ub8tmte capaciti'l'c couplmg

Gate dclay t::,O% is a fnnetion of several fadors, including fanout, supply voltage, transistor geometry, inpnt waveform, and charge excess cansed by charge sharing effects. Ignoring tlw loading chl(' to intercon­J1(>et wiring, the gate dday is usually approximated by [4J

whcre Ce; = Cox l-'VL i::> thp gate capacitanee. REFF, thc effcctive rp­::>istancp, is thc avcragp trau::>ü,tor resi::>tallcc during thc output voltage swing alld i::> proportional to Rtf" with

L/W Rt,. = j1COS(VDD - Vi') ,

where L amI are tlw dimensions of the transistor, VDD the snpply voltage>, Cox t}l(' gate oxide eapacitance, and Vi' the threshold voltage. Vi' is in turn proportional to the square root of thc voltage V,b applied between its substrate> contact and thc source. Hence,

The second main contribution to parasitic gate dday is duc to ca­pacitivc conpling. The analysis of this effect is essentially identical to that of cross-talk hetween interconnect lines. In this eH .. 'ie the aggressor is the substrate nnderneath the victim interconnect line or device. Fig­ure 5 shows the coupling mode>l eqllivalenee, with coupling capacitances Ce = CS' Resistor Rl represents the impcdance which holds the victim node at ground potential. Using standard analytic charge coupling mod­els [4J one can cstimate the charge noise> present in the interconned line duc to substrate noisc. Figure> G shows the model proposcd for a typi­cal cross-coupling system. A dose form analytic model for the response voltage to charge injection 'Ul(t) was derived in [4], The voltage at the

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463 Edoardo Charbon, Joel Phillips

Victim Aggressor

7 Ce 7

ROt "'1" Flg1J.1'f! (j Stand(Jr'd (,r'O,9,9-co1Jpling model

peak and the instant at whkh it occurs are respectivcly

{ 71 { C e- l if 71 = 7'2

tp = ....!:l..!Lln (2:l.) IJl(tp) = i(' ( 'Tl T' Ti T 7' l' 7' 2 1 otherwise., 2- 1 2 L'I+Cc 1'2

where 71 = (RlIIR2)(Cl + Ce) aml t.he waveform oft.he aggre8sor node is a..'>sumed to be a decaying exponential step with time constant. 72. From charge noise one can derive the extra delay prescnt on a gate [4J.

Empirical dclay models ba8ed on cross-talk have bccn propo8ed in t.he literature. One such model, rclat.ing t.he lmgth of the parallel running wirc land the average spacing s to thc extra delay 67, wa8 proposed in [5J. Tlw model computes 67 a....,

alm 67=-­

sn '

where ü is a fitting cOllstant, while rn and n are empiricaJly observed to be near 2 amI 1, respectiwly.

3. SUBSTRATE ANALYSIS The goal of substrate analysis is to obtain a compact represcntation

of the interactions of eircuit elements that couple through the substrate. An equivalcnt circuit, 01' some other model that represent8 the (pos8ibly frequency-dependent) impedance or admittance matrix de8cribing sub­strate coupling must be obtained in order to include the substrate effects in circuit simulation 01' optimization. One approach is to pcrform ex­periments on a sma11 numbcr of contacts [öJ and fit cU! empiricalmodel to the results. The other is to addrcss the differential equations that describe substrate transport in a numerical or scmi-allalytical manner [7, 8, 9. 10, 11].

The basic relation de8cribing substrate transport is the continuity equation

o V'. (O'V'<I>{x, y, z. t)) + Dt (V'. ( V'<I>(.r, y, z, t))) = 0, (1.3)

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Substrate Noise:Analysis. Models. and Optimization 464

where f. and (T are rcspectively the local diclectric p('rmittivity and eon­duetivity of the substrate. f. and (T are potentially :;patially varying due to the substrate layer :;tructure, device and weIl implantfi, and the preH­ence of other intt'grated component:;. If the dieleetric relaxation time. Te = f.1(T, is mueh smalleI' than any time-scale of interest, then the Hee­ond term in Equation (1.3) may be negleeted and the substrate treated as purely resbtive. A complex conduetivity (T' = (T + jvJE may be Ui;cd to model dynrunic effects without change to the basic analysifi proce­dure, though model extraction is complicated fiince either an equiV"ctlent cireuit TImst b<, fit t.o data obt.ainNI by solving the differential equat.ion at scveral points in th<, frequency domain[12, 13] or a model rcduetion proc<'durc[14, 15, 16] performed.

Tn uniform material, Equation (1.3) r<,dllces to the Laplace equation

(1.4)

Boundary conditions come from contacts, uSllally considerf'd equipot,en­tial; edges. where zero-nonnal-current (Xeumann) conditions hold; 01'

material interface:;, where the current J = must be continuoUfi, leading to the boundary condition = where

I ön refers to the normal derivative. and (T +, (T _ rüfer to conduetivity on oPPOl:lite sides of the interface. To extraet a eolumn of the impedance matrix corresponding to a specific eontact, the potential of that eon­tact i:; set to a :;illgle volt. The currents flowing into each of the other contacts, computed from intcgrating the normal derivative of the poten­tial over each eontact's surfaee. give the relevant mutual admittances. Solution of the equationH governing the HubHtrate requirefi Hophifiticated teehniques, but, fortunatdy. the :;olution of the Laplace equation is one of the most well-Htudied problems in the applied mathematics literature.

j\tlethodH based on differential formulations of the Laplace equation ean eaHily analyze substrates with fipatially-varying refiistivities. Finite difference[17] 01' finite elemmt[18] techniques are usually ufied to difi­crctize Equation (1.3). These mcthocb convert the Laplace cquation into a Het of Hparne algebraic equations. for cxample by replacing thc derivativeH of by differellccfi :;uch aH

ö24J <I>i+l,j,k - 4Ji-l,j,k - 2<l>i,j,k

ö'2:r -1.

(1.5)

wherc b.i is th<, x-direct,<,d grid spacing at. the grid point indexed by { i, j, k }. Th<'se equations may b<, solv<'d by standard spars<, linear system [19] solution tCChlliqll<'s bas<,d on on Gaussian eliminat.ion hut. du<' to the large degree of mat.rix fill that occurs during the factorization of a matrix that dcriv<'s from a t.hre<'-dimcnsional mesh, it.erative solution algorithms

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465 Edoardo Charbon, Joel Phillips

often provide better pcrformance in considcrably le!:>s memory. :vIodern iterative schemes (ire usually Krylov-subspace [20] algorithms such as the conjugate-gradient or G::\IRES methods. For the diseretization of elliptic differcntial equations, preconditioning is required to achieve convcrgcnce in a reasonablc number of iterations. Incomplete factorization[2L 20] preconditioners are popular. but preconditioners ba.,-;cd on multigTid[22] or multiresolutional ideas[23] can be considcrably more cffectivc.

Whcn the matcrial conduc:tivities and perInittivities are rclativdy ho­mogeneous (e.g., the resistivity varies along one dimension alld/or is pieeewise-constant with not. t.oo many regions of differf'nt conduc:tiv­it.y), then integral f'qnation techniqnf's arf' compf'tit.iw. ßy translating thf' three-dimensional partial differential f'quation into an intf'gral f'qua­t.ion over the two dimensional sl1rfaCf'S that. hOllnd the problem domain (usually t}w substratf' contaets), integTal f'qllation mcthods rf'ducf' thc number of llnknown variahles that must 1)(> analyzf'd and can provide superior l)(>rformancf' if f'fficient. techniques are used to solvf' thc linf'ar equat.ions.

Thf' simplf'st. int.f'gral equation encountf'red in tl}(> sllbstrat.f' context. is t}w first-kind equat.ion [24, 25]

<I>(r) = i G(r. r/)j(r/)(Pr/ (1.6)

t.hat rf'lates injf'cted cont.act. cnrrent.s j (r/) to known contact potent.ials <P(r). Physically, G(r,r/) rcpresf'nts t.he potmtial at. r due to a point. charge placed at. a point r/ and is called a Grf'en's fllnct.ion. Onee the Green 's function is known, Equation (1.6) allows onf' to determiIw the inject.ed currents, from which the pot.ential and CUITf'nts at any point in tl}(> substrate can he eompllted.

In the absence of any boundaries, tlmt is in the frf'e-space case, t.he function G(r, r/) reC111Cf'S to 1/( 47l"0"1r - r/I). In principlc t.he free-spacf' Grf'en's funetion may be used for substrat.e extract.ion cakulations, how­f'ver, thf' boundary conditions at. domain bOllndarif's must. be explicitly enforced, wh ich implif's discrf'tizing tlw boundaries[2G]. In the subst.rate analysis problem, it is more convenient to df'rive a Green's function t.ailored to the layerf'd media boundary condit.ions. These Grf'f'n's func­tions, which incorporatf' any f'ff('cts due to vf'rtically-varying conduc­tivity ami possibly finitf' ext.f'nt of the subst.rat.f', simplify the numeri­cal procedure sincf' the intf'gral equation only nef'ds bf' writt.en over thf' multiply-connect.ed surface definf'd by substrat.e cont.act.s tImt. arf' usually in the top layer of t.he matf'rial. However, t.he Grf'f'n's function can 1)(> expensiV(> to eomput.f'. Püssible methüds für f'valuating t.he Green's func-

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tion include ill1age-bascd techniques[27, 28, 10], separation-of-variables (SOV) [29], and speetral dOll1ain analysis[;Hl].

In thc cngineering cOll1ITlllnity, the lHllnerieal solution of electromag­nctic integral equations is usually done via ll1ethod-of-moment[:n] 01'

boundary-delllcnt techniques. The silllplest such schemc is to discrctiL':c thc d0ll1ain of thc integral (in this ca:"e, the substrate contacts) into a number of polygonal seetions callcd panels. Given Dirichlet boundary conditions on thc panels. the unknowns are the injected currcnts, and on each pand the injected current is assullled to 1)(' com;tant. The po­tential <Pi of a contact panel is defined as the result of sumll1ing ovcr the contribution from current injeeted at every other panel in thc domain and averaging the potential over the pand,

<Pi = L 4I)4. r r G(x, x')dajdo,i = L ZijI) ) ".I" 1, JA; JA) )

(1.7)

wlwre the sum rnns over all panels j, Ai and A j an' the arcas of contaets i and j respect.ivdy, and I j is the clUTent inj<,eted from panel j, and the int.egral is over the pan<,l surfaces. This proc<,dure produces a matrix <'ql.lation

ZI= cl> ( 1.8)

where the matrix Z is dense, that is, ev<'ry ent.ry is non-L':ero hecause anormal current. inject.<,d from any pand induces a pot.<'ntial at every other panel in t.he suhstrate.

In realistic problems, t.he matrix in Eqnation (1.8) can he quit.c large. Constructing and dircctly inverting t.he full Z mat.rix for th<, cntirc substrate contact confignrat.ion ca,n b<, prohibitively expcnsive, and so more efficient methods hav<' lw<'n sought by many authors. Physically hased heuristics involving approximations to t.he inverse of t.he Z ma­trix[29, 32, 9] can accclerat.e tlw matrix solution process a.;; well as thc following nonlin<'ar simulation. ::\'umerical stahility and crror cont.rol in th<'se procedures can bc difficnlt t.o quant.ify.

:\tIore rigorous analysis accel<'ration t.<,chniqucs t.ypically <,xploit. the analytic properties of thC' Gr<'<'n's fnnct.ion. rar prohlems with bounded domains, th<, mult.ilayer Green's funct.ion can he comput.cd in 0(71, log 71,) time using rast eosine Transform (FCT) t<,chniques. The FCT can bc used t.o build a t<'chnology-o.ep<'nd<'nt table that. is used to acc<,lcrate the matrix const.ruction proccdnr<, for one of t.he dir<'ct t<'chniqn<'s. \Vlwn combined wit.h a matrix simplificat.ion procedure amI lmv-rank update t<,chniques[33], t.he owrall proc<,dur<' can be dfcct.iw, particularly whcn cmhedded in thc loop of an optimiL':ation proc<,dure.

\Vhcn direct techniqnes are no longer f<'asiblc, it.<'rativc matrix so­lution algorithms such as GMRES[:34] must he ns<'o.. Th<' dominant

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computational cost in such an algorithm ü; thc computation of a matrix­vector product with the matrix Z. The speed of the FCT can be ex­ploited to directly compute thc matrix-vector products in such an it­erative procedure [;35] in nearly optimal time, if the contacts may be unifarmly subdivided and are fairly densely spaced. For cOlllplicated contact distributions, several algorithms have been devclopcd that can cOlnpute a matrix-vector product in dose to O(n) time and memory by approximating the action of the matrix Z.

J'vIost of the matrix approximation algorithms are based on thc fact that the potential inducf'd hy an injected currf'nt has a spatially eomplf'x profile only near the injf'ction sonree. Far away from the souree it ean he ea."ily approximated to within a given error. FCT and FFT rclated techniques ean he applied hy using loeal corrections [:3G, 37] that remove any eonstraints on the relation between the FCT /FFT grid amI the underlying discretization. The authors of [38] have elf'veloped an algo­ritlllll that interpolates the Green's function in a hierarchkally spatially­(lf'composed manner, and then uses a proeedure similar to the Singnlar Vahlf' Deeomposition to furtllf'r eompress the intf'rpolation elements.

Recently algorithms have heen deVf'loped that combine the matrix approximation with an aceelcration of the iterative matrix solution pro­cedurf' itself. The multigrid method of [39J is based on eonstructing a hierarchical represelltation of thf' irreglliar problf'm domaill. At each level of hierarchy, a coarser representation of the discretized prohlem is eonstructed by using a geomf'tric-moment-matehing scheme to approxi­mate tllf' rough features of the finer geomf'try. The eoarser grid prohlems can be solVf'd rclatively cheaply, so the solutions to the coarse grid proh­lems are used to accclf'ratf' the iterative solution of the linear systems on the finer levels. The convergence of the iterative solver is extremcly rapid, requiring only a few iterations to converge to engineering toler­ances. A similar multiresolution approach was described in [40], where a wavelet-like basis for the panel unknowns is constructed hy matching moments of the multipole field expansions. The wavelet-like basis is used to perform rapid matrix-vector products and also provides a natural, and very effective, preconditioner.

4. OPTIMIZATION AND SCALING Optimization phases typically performed in physical design incluele

floorplanning anel placement. The algorithms used in floorplanning and placement are ba..,eel on incremental improvement techniques. Due to its "glohal" effects feIt everywhere in the chip, substrate noise cannot be easily translated into a compact analyticalmodf'l accounting far the

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entire substratc aren. Hence, even if a small inercmcntal modification is perfonned on the chip. the whole substrate analysis needs be reevaluated. The traditional approach to this problem consists of using a sehe me based on finitc difference methods. Tö reduce the time complexity of the problem the density of the mesh that lllimics the substrate bulk is drastically simplified, thU8 rcsulting in an accuraey reduction [8. 41]. Another potential problem with this approaches is a 8trict rcquirement of aIignment between grid and layout objects.

An alternative method is one which transforms thc substrate prob­lem into a 8impl<'I" one, for exampl<, Ilsing simplifi<,d analytical models of contact.-to-colltact. resistallces[6, 42]. Mor<,ov<,L the plw;ellce in the design of <'ven relativcly small analog circllits complicat<,s the substrat<, noise analysis probl<'Ill.

Approacll<'s bas<,d on illt<'gral <'quation techniques can make bett<,r use of the locality of incr<'Illental chang<'s. The k<,y of such techniques is a fast complltation of variations amI trends of substrate transport given changes in its physical strllcture. An often exploited tedmiqll<' is ba.',<,d on the fact that small adjustments in the position and orienta­tion of layout elements results in a small change in thp matrix Z. Using the Sherman-Morrison updatp, Z-l can bp computed in quadratic time complexity. Another mpthod is based on the use of sensitiviti<,s to deter­mine the effect on substrate conduct.ion by a small change in the contact organization. Sensitivities can be computed apriori efficiently and al­low one to obtain a r<,latively accurate substrate nois<' map aftpr several component moves.

Re-design genprally involves scaling in x- and y- dirpctions, whilp tech­nology migration involves a thrpe-dinl<'nsional scaling. Sensitivity analy­sis is performpd to quantify thp pffects of small changes in doping profiles and doping concentrations to, for example, a grid of contacts and their associated substratp rpsistanccs. Similar regular structures can be dc­signed to t<,st the effpcts of migrating to a diffprent technology.

lmprovements on thp p('fformance dpgradation duc to substrat<,- in­duced switching noisp can 1)(> achiev<'d by placing noise injecting amI noisp sensitiv<' modules at a ccrtain distance or by creating special strllc­turps, such as low-resistivity guard-rings, around noise injectors [29]. The first provision is genprally implpmelltpd in a placement tool using the conventional Simulatpd Annealing (SA) move-set. Tll<' spcond issue is usually solved by eXh'nding the search space, allowing the annealing to choose fr01n a nHlnber of alternative implementations for a module. induding one with a guard-ring implemented mound it.

In order for a placer to Iw effeetive in preventing violations to per­formance specifications. the following features are often implementcd in

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469 Edoardo Charbon, Joel Phillips

th(' tool. (1) A model for each noise injeeting module, characterizing th(' waveform and the spatiallocation ",here the noiHe is injected as precisely as possible. (2) A model of substrate transport for efficient Hubstrate cur­rent evaluation, possibly independent of the drcuit configuration. (3) A model for substrate noise absorption and its effeet on performance.

The evaluation of performance degul.uation duc to substrate noiHe iH generally the most time consuming. In [33] for examplt" such problem is approached in the following way:

1. generate constraints for eaeh node of lloise-s!'ll.'1itive modules

2. generate thp resistive Iletwork assodaterl \vith suhstrate

:3. quanti(y violations to eonstrailltb

The calcnlation of all violations in step 3 to the given constraint.s iH car­ried out. by ::;olving t.he underlying circlut and evaluat.ing the appropriate parameters at. <'ach criticalnode.

At each stage of the aIlllC'aling only steps 2 and 3 need be rC'peat.cd, ::;incC' st<,p 1 is carri<'d out. only once for each chip. The efficiency of a simulator ba::;ed on int.C'gral equation teclmiqnes, though high, i.., ::;t.ill insufficicnt for such computationally intensive algorit.hm as 8A, henc<' , appropriat.<, h<'uristics ar<' generally d<'velop<'o. In 8A, at. high anneal­ing temperat.ur<,s, con::;io<'rable reshuffling i::; allowed on the componC'nts of t.he layout.. Hence, th<, locations of switching noise generators ano receptors can 1)(' significantly modified. On t.he other hano, only when changes in component location reflect a significant. change in any pCl·for­mance llwasure, t.he <'ntire ::;ub::;t.rate net.work should bc evalnated along with t.he c::;t.imate of performanc<, o<'gradation. This observation is gen­erally uHeu to ereate combined heuristics for the evaluation of subHtrate effects after each tentative annealing move.

The placement algorithm h&.., been proven to converge to a global minimum under the RomeojHajek conuitions [43] when it is mouified to account for noise substrate transport evaluatioIl [44]. A tool based on this algorithm was used exteIlsivcly in the design of a RAYIDAC chip, whieh was eventually fabrieated and successfully teHted [45].

5. CONCLUSIONS Thc main problem 8.'lsociated with ::;ubst.rate noi::;e i::; a generaliz<'o

degradation of performanc<, induceo mainly by the app<'aranc<' of ::;pu­rious currents generated by the circuit's oigit.al swit.ching activity. The paper focuses on thC' models of noi::;e t.ransport. in view of creating opt.i­mized circuit.s or technologie::; in mixeo-::;ignal amI digit.al d<'signs. 80h1-tions t.o thf> substrate noisc probl<'Ill are presented in light. of thC' rc::;ults obt.ained from industrial exampl<,::;.

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