sts _ tlf 2014 idt

NI STS in High Volume Manufacturing

Glen E Peer

Director of Test Engineering

August 4, 2014

2

IDT Snapshot Founded 1980

Workforce Approximately 1,700 employees

Headquarters San Jose, California

Manufacturing Penang, Malaysia

Core Expertise Timing, high speed mixed signal design, serial interconnects, memory interfaces, power management, and radio frequency (RF)

Where IDT Products Used

Next-gen 4G infrastructure, network communications, cloud datacenters, power management

Sales Channels Worldwide network of direct, manufacturing representatives and distribution sales

Financials FY14 revenue - $484.8M Market cap approx. - $1.78B Cash investments - $454M

Research and Development

Over $100M+/ year, leading to 900+ issued or pending patents

Markets and Growth Drivers

4G Infrastructure:

Wireless, the preferred method to access the Internet,

driving continued innovation in RF, Data Interconnects,

and Timing

Network Communications:

Mobile traffic and increasing bandwidth demands require

IP networks to adapt to handle real-time traffic

High Performance Computing:

Cloud Datacenters and Wireless Infrastructure technology

requirements are converging

Power Management:

Mobile devices & Infrastructure must use power more

efficiently & conveniently

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• Buffers/Level Translators/Fan Outs

ICS8535-31

ICS853s111

ICS8312

Product Types

5

● Zero Delay/Freq Generators & Synthesizers

ICS8432-51 / ICS8442 Synthesizers

ICS8725-01 ZDB & Generator

Product Types

6

● Programmables: VCXOs, Freq Sources & Universal Freq Translators

IDT8n3qv01 VCXO IDT8t49n282 UFT

ICS810252 VCXO & JA

Product Types

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Precision Tpd & Skews (< 30pS Skew)

Precision Tpd & Skews (<200pS ZD windows)

Advanced Features such as Input monitoring, Holdover, Phase alignment

Programmable output types, GPIO, i2c & SPI interfaces (200+ registers), SCAN test

Mixed supply modes and output types (1A required):

Precision frequency programming & measurements (<20ppm)

Various output technologies requires split supplies or programmable terminations


PLL feedback techniques

Quality and speed of inputs (multi-GHz devices)


Quality of inputs

True Frequency measurements

● Buffers/Level Translators/Fan Outs

● Zero Delay/Freq Generators & Synthesizers

● Programmables: VCXOs, Freq Sources & Universal Freq Translators

Challenges

8

IDT High Performance Timing Test Evolution ● Netcom test evolution: From off the shelf ATE to full custom to hybrid

Big Iron ATE - (off the shelf ATE) pros - Full per pin resources - Easy to create generic boards - Easy to generate quick programs using available tester resources

cons - No true AC system - DUT boards are expensive (12-24 layers) - Increasingly difficult to support

In House - (full custom) pros - Good AC performance thru external instrumentation - Easy to generate programs using C++ - Inexpensive DUT boards using DUT/MUX combos

cons - full custom design hardware & software - aging, difficult to setup and support - form factor not optimal for production - single PMU is serial = SLOW

Combo In House/Commercial ATE - (hybrid) pros - Good AC performance thru external instrumentation - Easy to generate programs using C++ & NT GUI - Inexpensive DUT boards using mother/daughter board

cons - Increasing difficult to support – ATE EOL - form factor not optimal for production - expansion requires “bolt-ons”

National Instruments STS (PXI) - (quasi-hybrid) pros - Exceptional AC performance thru internal instrumentation - Easily expandable, hundreds of instruments available - Inexpensive DUT boards using mother/daughter board - Excellent support from NI - New instrumentation, long life expectancy - Clean form factor ideal for production

cons - New architecture & test methodology - IDT has first systems – in final development - New market for NI, still learning industry & customers and how to support.

9

National Instruments PXI Tester NI STS Tester based on PXI modular instrumentation

IDT part of “early adopter” tester development program

New PXIe-1085 Chassis

New PXIe-8135 Controller

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National Instruments PXI Tester Family Scalable Tester Family

STS T-Bench STS T1 STS T2 STS T4

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STS Tester Hardware Overview

• Fixed interface board with daughter card option

• Bottom-side has standard mating connectors (e.g. DSUB, VHDCI, etc)

• Very cost-effective option

• Standard Instrumentation

Cables (T4 photo shown)

T2: 22¼” x 22¼” x 37½” (56.5cm x 56.5cm x 78.7cm)

• Zero footprint

• STS T2 tester has 2 bays

– Each bay is a 4U, standard 19” rack

– Accommodates 4U 18-slot PXI or other instruments

• Open center cavity for custom HW

– Fan Cooling provided

– T2 – 2U x 19”

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National Instruments STS T2 Tester

STS T2 Tester Mainframe

Contains 2 PXI 18slot Chassis

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IDT / National Instruments STS T2 configuration

STS T2 enclosure w/2 18-slot PXI chassis (PXIe-1085 w/PXIe-8135 CPU)

Functional Sub-System:

High speed, 200MHz digital I/O channels w/PPPMU: (PXIe-6556) 96

DC Sub-System:

Device power supplies (SMU) (PXIe-4145): 8

Static DIO for control lines (PXI-6509) 288

High current AUX supplies (6A) (PXIe-4113) 2

Low current AUX supplies (1A): (PXIe-4110) 3

AC Sub-System:

Brilliant Instruments BI221 w/prescaler: 4

Brilliant Instruments BI302 multiplexers: 4

(64 multi-GHz Brilliant Instruments TIA channels total)

National Instruments STS T2 Tester

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Hardware Overview – Block Diagram

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Hybrid Hardware Overview – Block Diagram

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IDT STS T2 Motherboard IDT designed interface connecting AC & DC subsystems with DUT

Fits on 16.5” x 16.5” NI STS loadboard frame. Includes interface circuitry to allow DUT boards to be less complex

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Brilliant Instruments TIA & MUX

BI221 TIA

BI302 MUX

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Software Overview

• Suite of software for test development, execution, and debug

– NI TestStand – Semiconductor Module (TesterOS)

• Sequence Editor/Operator Interface

• Binning, Handler Integration, Pin/Channel Map, STDF, Mulitsite,

• Built-in steps for common measurements (e.g. continuity, Vcc, etc)

– Custom code module development software

• NI LabVIEW, LabVIEW FPGA, C/C++, and/or .NET

• Includes all NI advanced math/analysis functions

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STS TesterOS GUI

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STS in Production

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STS in Production

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AC Performance Data

1.50000E-09

1.52000E-09

1.54000E-09

1.56000E-09

1.58000E-09

1.60000E-09

1

20

39

58

77

96

115

134

153

172

191

210

229

248

267

286

305

324

343

362

381

400

419

438

457

476

495

514

533

552

571

590

609

628

647

666

685

704

723

742

761

780

799

Q0

Q1

Q2

Q3

8535-31 Tpd Repeatability Tests

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AC Performance Data

-5.00000E-12

2.00000E-25

5.00000E-12

1.00000E-11

1.50000E-11

2.00000E-11 1

33

65

97

129

161

193

225

257

289

321

353

385

417

449

481

513

545

577

609

641

673

705

737

769

801

833

865

897

929

961

993

Tsk (3.135V)

Tsk (3.135V)

8535-31 Skew Repeatability Tests

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STS Correlation

PXI good to Current ATE. Qty =~135K (8535-31) All PXI good units manage to pass current ATE Bin1 with exception of 27 units that failed AC testing. This is invalid due to better PXI hardware. Confirm under Scope.

6 units that failed output levels, due to different guardband levels. In short, no miss-correlation issue.

CurrentATE Rejects to PXI platform. To check for any PXI under-kill. (Failed CurrentATE, but pass PXI) Qty =~54K (8535-31) ~54K parts tested at current platform and Valid rejects were again tested to PXI-platform. Total ~193 rejects were verified. ALL of them manage to fail at PXI platform. No PXI under-Kill issue.

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Appendix

- IDT Test Functions

- ICS8535-31 Testplan

- IDTs NI STS T2 resources & PXI chassis slot map

- IDTs NI STS T2 motherboard dimensions

- NI STS T2 In Austin (NI) Under Development

- NI STS T4 Mainframe

- BI MUX Architecture & Specs

- BI TIA Architecture & Specs

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Software Overview

LabVIEW test code, with TestStand on TestOS V.1:

LabVIEW code library development to access the DUT Test ModeTM : Configure the DUT for various test modes

BIST (Built-In Self-Test): Trigger the DUT for the self-test. Read back the report

Automatic Frequency Control(AFC): Program the register map

NVM program: Save the register map in Non-volatile Memory

Functional tests modules: Leverage the tests from existing IDT-Tempe sample code

Continuity Test

Input and Output functionality

Power supply test: DUT current drain test

Frequency Test

LUT_Trim

Etc.

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IDT8535-31 Testplan

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National Instruments PXI Tester

Chassis_1 (Inhibit Mode: DEFAULT; FANS: Auto)

PXI Chassis Instrument List Slot No. NI MAX Alias

NI PXIe-8135 Controller 1 CNT1

NI PXIe-8374 MXIe x4 Master 2 MXI1

NI PXI-6509 DIO 3 DIO2

NI PXIe-6556 HSDIO

4

5 HSDIO1

6

BI BI302 MUX 7 MUX1

BI TIA221 Time Interval Analyzer 8 TIA1

9

10

NI PXIe-6556 HSDIO

11

12 HSDIO2

13

14

BI BI302 MUX 15 MUX1


NI PXIe-4145 SMU 17 SMU2

NI PXI-6509 DIO 18 DIO1

Chassis_2 (Inhibit Mode: DEFAULT; FANS: Auto)

PXI Chassis Instrument List Slot No. NI MAX Alias

NI PXIe-8370 MXIe x4 Remote 1 MXI2

NI PXI-4113 DC PWR Supply 2 PS2

NI PXIe-6556 HSDIO

3

4 HSDIO3

5

6

BI BI302 MUX 7 MUX3


9

10

BI BI302 MUX 11 MUX4


NI PXIe-4145 SMU 13 SMU1

NI PXIe-6556 HSDIO

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15 HSDIO4

NI PXI-4110 DC PWR Supply 16 PS1

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NI PXI-6509 DIO 18 Handler

Current IDT Specific STS T2 Configuration & PXI Chassis Slot Map

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IDTs Tester Under Construction!

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National Instruments STS T4 PXI Tester

NI STS T4 Tester Mainframe

Contains 4 PXI 16slot Chassis

About same size as J750 head

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Brilliant Instruments MUX

Inputs – Ch 0 to Ch 8 Frequency range: DC to 3 GHz Minimum pulse width: 100 ps Coupling: DC Input impedance: 50 ohm into a user

programmable termination voltage Termination voltage (Vt): -2.0 V to +3.0 V (see

restrictions below) Each channel has its own Vt Resolution: 100 uV Accuracy: 3 mV Trigger threshold voltage (Vth): -3.0 V to +5.0 V Each channel pair uses the same Vth Resolution: 200 uV Accuracy: 6 mV Sensitivity: 50 mV rms sine, 50 mVp-p pulse

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Direct Time Measurement of Pulse Trains Measure Jitter, Frequency, Time Interval (Skew),

Pulse Width, Risetime, Event Timing, Time Interval Error (TIE), and More 8 ps Single-Shot Resolution (12 Digits/s Frequency) DC to 400 MHz Frequency Range for all

Measurement Functions Including Pulsewidth, Plus a Prescaler for Frequency and TIE Measurements to 2.5 GHz (BI220, standard) or 5.0 GHz (BI221, optional) Up to 1 Million Continuous Zero Dead Time

Measurements Per Second 1 ns Minimum Pulse Width Highly Sophisticated and Flexible Arming (Triggering)

PXI Interface

On-board Memory for 8 Million Measurement Points

– Can Be Read While Measurements are Taking Place

Brilliant Instruments TIA

sts _ tlf 2014 idt

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