status presentation

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Status Presentation Status Presentation Group 7: 1394b Receiver Group 7: 1394b Receiver Aparna Trimurty Aparna Trimurty Stancil Starnes Stancil Starnes Jeff Shlipf Jeff Shlipf March 28th, 2002. March 28th, 2002.

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Status Presentation. Group 7: 1394b Receiver Aparna Trimurty Stancil Starnes Jeff Shlipf March 28th, 2002. Objective of presentation. To report modifications and advancements to the project since the design report. Status: stages 1 and 2 completed, stage 3 in progress. Stage 1. - PowerPoint PPT Presentation

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Page 1: Status Presentation

Status PresentationStatus Presentation

Group 7: 1394b ReceiverGroup 7: 1394b Receiver

Aparna TrimurtyAparna Trimurty

Stancil StarnesStancil Starnes

Jeff ShlipfJeff Shlipf

March 28th, 2002.March 28th, 2002.

Page 2: Status Presentation

Objective of presentationObjective of presentation

• To report modifications and To report modifications and advancements to the project since advancements to the project since the design report.the design report.

• Status: stages 1 and 2 completed, Status: stages 1 and 2 completed, stage 3 in progressstage 3 in progress

Page 3: Status Presentation

Stage 1Stage 1

• Purpose: testing an optomodule out Purpose: testing an optomodule out of its original environment(TI card) of its original environment(TI card) by placing it on a evaluation board by placing it on a evaluation board built by the group.built by the group.

• Opto module used: Agilent Opto module used: Agilent technologies HFBR-53D5technologies HFBR-53D5

• Status : CompleteStatus : Complete

Page 4: Status Presentation

Stage 1: Design detailsStage 1: Design details

Page 5: Status Presentation

Stage 1: Test setupStage 1: Test setup

• GTS 1250 GBIC GTS 1250 GBIC test system test system pattern pattern generator generator

• Textronic TDS Textronic TDS 7154 Digital 7154 Digital Phosphor Phosphor Oscilloscope Oscilloscope

Page 6: Status Presentation

Stage 1: Test resultsStage 1: Test results

• Ch2 K28.7Ch2 K28.7• Ch 2 PRBS7Ch 2 PRBS7

Page 7: Status Presentation

Stage 2Stage 2

• Purpose: testing the Maxim Purpose: testing the Maxim Receiver evaluation kitsReceiver evaluation kits

• MAX 3266 – transimpedance MAX 3266 – transimpedance amplifier(TIA) amplifier(TIA)

• MAX 3264 – limiting amplifierMAX 3264 – limiting amplifier• Status: Complete.Status: Complete.

Page 8: Status Presentation

Stage 2: Design detailsStage 2: Design details

• MAX 3266 power MAX 3266 power connector design- connector design- can connect to a can connect to a regular AC adaptor.regular AC adaptor.

• MAX 3264- changed MAX 3264- changed connectors of ac connectors of ac adaptor to match adaptor to match board connector.board connector.

• Caused by a lack of Caused by a lack of accurate 5V power accurate 5V power supplies.supplies.

Page 9: Status Presentation

Stage 2: TestingStage 2: Testing

Page 10: Status Presentation

Stage 3Stage 3

• Purpose: Purpose: the design and the design and fabrication of a functional and fabrication of a functional and cost effective receiver board cost effective receiver board based on the MAXIM boardbased on the MAXIM board

• Status: in progressStatus: in progress

Page 11: Status Presentation

Stage 3: modified designStage 3: modified design

•New New designdesign

•Old Old designdesign

Page 12: Status Presentation

Stage 3: ModificationsStage 3: Modifications• 1.1.  The The LevelLevel pin was grounded on the 3264 to maximize output pin was grounded on the 3264 to maximize output

voltage. voltage. • 2.2.    The The SquelchSquelch pin was grounded on the 3264 to disable pin was grounded on the 3264 to disable

squelch. It is important to see all signals in testing, no matter squelch. It is important to see all signals in testing, no matter how small they may be.how small they may be.

• 3.3. The The CAZ1CAZ1 and and CAZ2CAZ2 pins on the 3264 are left open. In the pins on the 3264 are left open. In the specification sheet it is stated that for gigabit Ethernet these specification sheet it is stated that for gigabit Ethernet these pins should be left open.pins should be left open.

• 4.4. The The FilterFilter pin was left open on the 3266 to enable DC pin was left open on the 3266 to enable DC cancellation.cancellation.

• 5.5. The Loss-of-Signal circuit was omitted to further simplify the The Loss-of-Signal circuit was omitted to further simplify the board. This also allowed for the board. This also allowed for the THTH pin to be left open as this pin to be left open as this simply sets the threshold of the LOS circuit. simply sets the threshold of the LOS circuit.

Page 13: Status Presentation

Stage 3: ModificationsStage 3: Modifications

• 6.6.            The power filtering inductors were omitted. This The power filtering inductors were omitted. This was possible based on the fact that three separate was possible based on the fact that three separate supplies will be used and long power cords will be used supplies will be used and long power cords will be used between the board and the power supplied. between the board and the power supplied.

• 7.7.            A single 1nF capacitor is used for decoupling the A single 1nF capacitor is used for decoupling the power supplies. Based on the use of three separate power supplies. Based on the use of three separate supplies 1nF should suffice.supplies 1nF should suffice.

• 8.8.            Decoupling capacitors for the input and output of Decoupling capacitors for the input and output of the circuit as well as between the TIA and LA chips were the circuit as well as between the TIA and LA chips were left in to maintain a good signal. left in to maintain a good signal.

Page 14: Status Presentation

Stage 3: PCB layout and Stage 3: PCB layout and design considerationsdesign considerations

• Red squares are power Red squares are power supplies. The input power is supplies. The input power is for the TIA, the 2 output for the TIA, the 2 output ones are for LA ( as LA has 2 ones are for LA ( as LA has 2 stages of amplification)stages of amplification)

• 3 separate power supplies 3 separate power supplies are used to reduce noise on are used to reduce noise on board.board.

• Board layout assumes front Board layout assumes front pin of connector is ground pin of connector is ground and the inner pin is VCC. and the inner pin is VCC. Power supplies not following Power supplies not following this assumption will be this assumption will be modified to work with the modified to work with the design.design.

Page 15: Status Presentation

Proposed part listProposed part list

# Part Description Manufacturer Part Number

Price (all)

To Obtain

4 .01uF capacitor – 0805

ECJ-2VB1H103K $.97 Order from Digikey

3 1nF capacitor – 0805

ECU-V1H102MEN

$.97 Order from Digikey

1 .1uF capacitor – 0805

ECJ-2VF1E104Z $1.06 Order from Digikey

2 100 Ohm resistors –0805

ERJ-6GEYJ101V $.80 Order from Digikey

1 67 Ohm resistor –0805

ERJ-6GEYJ680V $.80 Order from Digikey

1 50 Ohm resistor –0805

ERJ-6ENF49R9V $.90 Order from Digikey

3 SWC Power Supply Connector

RAPC722 $3.12 Edgar ordered some

3 Jameco SMA connectors

901-143-6 N/a A bag in lab

Page 16: Status Presentation

Future ConsiderationsFuture Considerations

1.1. Verifying the functionality of PCB board design.Verifying the functionality of PCB board design.

2.2. Having Bob House create the board using the gerber Having Bob House create the board using the gerber filefile

3.3. Order part list .Order part list .

4.4. Work on fixing the errors in our Agilent board that are Work on fixing the errors in our Agilent board that are ouputing an erroneous eye. ouputing an erroneous eye.

5.5. Solder, test, and troubleshoot the new board in a Solder, test, and troubleshoot the new board in a similar manner as the MAXIM kits.similar manner as the MAXIM kits.

6.6. If board produces a good eye it should be tested in If board produces a good eye it should be tested in conjunction with the 1394b transmitter board and OE conjunction with the 1394b transmitter board and OE board.board.