motor drive 2

8/6/2019 Motor Drive 2

1/26

High frequency DPWM controller IC for ac-dc converter

Internal guide

R.Valarmathi M.E.,

Lecturer,

Department of EEE,DSEC,

Perambalur. By

K.Senthilnathan

D.Balamurali

S.Appandairaj

S.Raja


2/26

ABSTRACT

This paper deals with the implementation of high frequency digitally controlled PWM

pulse generation using VLSI technology. The rapid progress in motor control and

microelectronics has made the DC drives a major field of interest. The existing controlschemes have many drawbacks. In phase angle control, extinction angle control,

symmetrical angle control schemes, the lowest order harmonic is third, and is very

difficult to filter out the lower order harmonics. Also input power factor of phase

controlled converter decreases as firing angle increases. Lower order harmonics can be

eliminated or reduced by selecting type of modulation for pulse width and number of

pulses per half cycles. Though lower order harmonics are eliminated by PWM controlschemes. The analog or microprocessor based PWM control schemes have their own

drawbacks. The analog control methods have various drawbacks such as temperature

drift, ageing effect of components, more components count for the system, necessity for

making physical parts and susceptibility to electro magnetic interference.

Some digital control methods also had many drawbacks. Firstly, discrete

principally RAM and counter are combined together switching times are calculated andstored in RAM, resulting in simple circuit. However the frequency of motor speed is

difficult to control and is not compact. Secondly, to obtain higher switching frequency, a

fast processor such as DSP is necessary resulting in high cost and also a long time is

required to develop software in a new processor structure. Moreover, processor control by

software is not suitable for switching circuit, which generates lot of noise, resulting in

high risk of collapse.


3/26

Dynamic and ever progressing change in VLSI has radically affected the design process

cheap, reliable and time saving. Moreover the FPGA based design is more reliable thanmicroprocessor based system and they dont need any control software.

A single chip for the implementation of modulator, rather than a system consisting

of microprocessor and external memory, as many advantage including less use of power

and space, short design time, greater speed, reliability and less electromagnetic

interference.

The conventional implementation of this technique, which had some shortcoming.

In the existing control scheme work, a DPWM converter is implemented using power

transistor. This converter is tested with R and DC motor load. The AC input is rectified

using uncontrolled bridge rectifier; power transistors obtain DPWM. High frequency

DPWM controller IC designed by VLSI technology generates driving pulses required

by power transistors. The average value of output voltage is varied by varying width of

pulses, which is done by varying width of driving pulses from DPWM. Since firing

angle is not changed in this method, power factor is maintained unity.


4/26

PWM CONVERTER FED D.C DRIVE

Block diagram of DPWM converter fed D.C drive using minimum hardware is shown in

fig 8.1. This circuit has minimum hardware since it uses single transistor. The PWM

pulses are generated using a high frequency DPWM controller IC. The pulses from

high frequency DPWM controller IC cannot drive the transistor directly. These pulsesare amplified using a driver circuit. The amplified pulses are given to he base of power

transistor. The DPWM converter converts fixed A.C in to Variable D.C. This variable

D.C voltage is given to the D.C motor. Varying the width of the pulses varies the speed

of the D.C motor.

PWM CONVERTER FED DC DRIVE CIRCUIT


5/26

REFERENCE CLOCK SYSTEM CLOCK

nc

00H

RING COUNTER

Q0 Q1 Q2 Q3

2-bit

counterOut

nc bitComparator

1 Out

R

Q

S

nc bitComparator

2

OUT

0 1 2

4:1 MUXnd

d

nc


6/26

EXPERT SYSTEMS AND SOLUTIONS

Email: [email protected]

[email protected]

Cell: 9952749533www.researchprojects.info

PAIYANOOR, OMR, CHENNAI

Call For Research Projects Final

year students of B.E in EEE, ECE, EI,

M.E (Power Systems), M.E (Applied

Electronics), M.E (Power Electronics)

Ph.D Electrical and Electronics.

Students can assemble their hardware in our

Research labs. Experts will be guiding theprojects.


7/26


8/26


9/26


10/26


11/26


12/26


13/26

POWER SUPPLY CIRCUIT

5 V POWER SUPPLY

The power supply used for driver circuit is shown in fig 8.4 is given to

PAL22V10 IC, BUFFER & TIMER. The 230 V ac supply is stepped down to 6v

using 230 V / 6 v transformer. The low voltage a.c is rectified using a dioderectifier. The output of rectifier is filtered using 1000-microfarad electrolyte

capacitor filter. This unregulated D.C is given to the voltage regulator 7805. The

output of 7805 is given to another filter capacitor 1 microfarad to reduce the ripple.

A bleeder resistor is connected in parallel with capacitor. This provides a path for

the capacitor to discharge.

POWER SUPPLY (+5V)


14/26

12 V POWER SUPPLY

The power supply used for driver circuit is shown in fig 8.5 is given to

optocoupler. The 230 V ac supply is stepped down to 15v using 230 V / 15 v

transformer. The low voltage a.c is rectified using a diode rectifier. The

output of rectifier is filtered using 1000-microfarad electrolyte capacitor filter.

This unregulated D.C is given to the voltage regulator 7812. The output of

7805 is given to another filter capacitor 1 microfarad to reduce the ripple. A

bleeder resistor is connected in parallel with capacitor. This provides a path

for the capacitor to discharge.

POWER SUPPLY (+12V)


15/26

BASE DRIVE CIRCUIT

The pulses from the high frequency DPWM controller IC are given to the optocoupler

through the buffer 74244.The clock to PAL22VT10 IC is given through 555 TIMER

This buffer provides protection for high frequency DPWM controller IC. The 68-ohmresistance in the input side of optocoupler reduces current drawn by optocoupler.

The opto coupler provides isolation between power circuit and control circuit. When

a pulse is applied to the input of MCT2E, the LED conducts. Light falls on the base

of transistor and the transistor conducts. When the transistor in the opto coupler

conducts, the input voltage to the transistor T2 is made zero. T2 does not conduct

and the output of T2 is high.When the input to the MCT2E is low, the diode does not conduct. The potentiometer

does not conduct. The input to the transistor T2 is made high. Transistor T2 conducts

and the output is low. Thus the output f driver circuit is in phase with input.


16/26


17/26

LIbrary IEEE;

use ieee.std_logic_1164.all;

entity dpwm is

Port (clk,reset:in std_logic;

Din:in std_logic_vector(3 downto 0);

Ct:inout std_logic);

End;

Architecture x of dpwm is

Component ringcounter

Port(clk, reset:in std_logic;

q:out std_logic_vector(3 downto 0);

end component;component counter

Port(clk, reset:in std_logic;

q:inout std_logic_vector(1 downto 0);

end component


18/26

component comparator

port(a,b:in std_logic_vector(1 downto 0);

DOUT: out std_logic);

End component;

Component mux41

Port(a,b,c,d:in std_logic;

S:in std_logic_vector(1 downto 0);

Y:out std_logic);

End component;

Component rsff

Port(r,s,clk:in std_logic;

Q:inout std_logic);

End component;

Signal ringout:std_logic_vector(3 downto 0);

Signal muxout:std_logic;


19/26

Signal counterout,gnd:std_logic_vector(1 downto 0);

Signal comp1 out,comp2out:std_logic;

Signal reset1,set1:std_logic;Begin

Ring:ringcounter port map(clk,reset,ringout);

Mux:mux41 port

Map(ringout(3), ringout(2), ringout(1), ringout(0),din(1 downto 0),muxout);

Counter1:counter port map(ringout(3),reset,counterout);

Compar1:comparator port map(counterout,din(3downto 2),comp1 out);

Compar2:comparator port map(counterout,gnd,comp2out);

Rsff:rsff port map(reset,set1,clk,ct);

Gnd


20/26


21/26


22/26

CONCULSION

This paper describes as complete controller IC

for high frequency AC/DC switching converter.

Novel controller architecture and configuration of

the key building block: the digital pulse-widthmodulator is introduced to meet the requirements

of high speed dynamic response, tight output

voltage regulation and programmability without

external passive components.T

he DPWM has 4-bitresolution and generates the switching frequency of

1 MHZ and a system clock frequency of 4 MHZ. The

complete chip design is based in hardware

description language (HDL).


23/26

The hybrid digital PWM circuit was simulated using

PSPICE and the output waveforms for the various

values of duty ratio are obtained. The simulatedDPWM output was applied to the AC-DC converter

with Resistive and Permanent Magnet DC motor load.

The speed of Permanent Magnet DC motor was varied

by varying the width of the pulses. The converter

implemented in this project has better power factor

since it uses symmetric PWM. Driver circuit and

DPWM converter are initially tested on a breadboard.

Later they are fabricated using a printed circuit board

(PCB).


24/26

BIBLIOGRAPHY

1. G.Wei, M.Horowitz, A Low power switching powersupply for self clocked systems, International

Symposium on Low Power Electronics and Design

ISLPED 1996.

2. H.Matsuo, Y.Mimura Y.Nakao, F.Kurokawa Anovel digital controller for the PWM and/or PFM

controlled switching DC-DC converter IEEE

INTELEC 1998.

3. H.Matsuo F.Kurokawa H.Etou, Y.IshizukaC.Chen, Design oriented analysis of the digitally

controlled DC-DCconverterIEEE PESC 2000,

pp.401-407.


25/26

1. L.Peng X.Kong Y.Kang J.Chen.A novel PWM

technique in digital control and its application to an

improved DC/DC converter IEEEPESC 2001,

pp.254-259.2. Abram P. Dancy, Rajeevan Amirtharajah, and

Anantha P. Chandrakasan High-Efficiency

Multiple-Output DC-DC Conversion for Low- Voltage

SystemsIEEE transaction on Very Large ScaleIntegration Systems vol 8.No 3,pp.438-445.June

2000.

3. Benjamin J.Patella, Aleksandar Prodic and Dragan

Maksimovic (2003) High-Frequency Digital PWM

Controllers IEEE transaction on Power Electronics

vol 18.No 1, pp.252-262, Jan 2003.

4. Muhammad H.Rashid (2003), Power Electronics

Circuits, devices and applications second edition,

Pearson Education, India.


26/26

8.G.K. Dubey (1989),POWER SEMICONDUCTOR

CONTROLLED DRIVES, Prentice Hall, Englewood

Clifts, New Jersey.

9.DIGITAL ELECTRONICS PRACTICE USING

INTEGRATED CIRCUIT by RP .Jain and M.M.S.

Anand.

10.Introduction to VLSI Circuit and systems by

John P. Uyemura.

motor drive 2

Documents