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  • Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm
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Mari Ohfuchi 1 and Taisuke Ozaki 2 1 Fujitsu Laboratories Ltd. 2 Institute for Solid State Physics, The University of Tokyo Implementation and Application of Gate Voltage in NEGF Calculations 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

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Page 1: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Mari Ohfuchi1 and Taisuke Ozaki21Fujitsu Laboratories Ltd.2Institute for Solid State Physics, The University of Tokyo

Implementation and Application

of Gate Voltage in NEGF

Calculations

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Page 2: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

My 2nd Visit to South Korea This Month

1 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Nov. 24 − 252nd OpenMX

Developer's MeetingDaejeon, 3 h

Oct. 30 − Nov. 37th A3 Symposium

on Emerging Materials

Buyeo, 2.5 h

Page 3: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Introduction

Motivation and Significance for the Implementation of a Gate Function in NEGF Calculations

Implementation of a Gate Function

Symmetric Zigzag Graphene Nanoribbon Spin Filter

Application to All Two-Dimensional (2D) Tunneling Field Effect Transistors (TFETs)

P-doped GeSe/MoS2/VS2 TFETs

Summary

2

Outline

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Page 4: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Introduction

3 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

MPUMicro processor unit

MOS (metal oxide semiconductor)

transistor

GLph

MPU High-Performance Physical Gate Length

Non-classical CMOS

High-κ metal gate

High mobility channel materials

Physics-Based Simulation, OpenMX

Dimensional scaling

Equivalent scaling

Tunneling, Spin

Page 5: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Whole device

Toward Whole-Device Simulations

4

20142011

Num

ber

of Ato

ms

10,000

1,000

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

2016

3,000

Appl. Phys. Express 4, 095101 (2011)

Appl. Phys. Express 7, 025101 (2014)

O(N) Parallelization of NEGF calculations

2018

Implementation of Gate Voltage

Page 6: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Implementation of a Gate Function

5

Symmetric Zigzag Graphene Nanoribbon Spin Filter1

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

1T. Ozaki et al., PRB 81, 075422 (2010).

σπ: symmetric

π*: antisymmetric

Antiferromagnetic junction

k

ETransmission

π

π*

k

ETransmission

Vb = 0 Vb > 0

I

Vb

updown

eVb

Page 7: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Model for tests of the implementation

6

z x

y

Symmetric Zigzag Graphene Nanoribbon

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Ferromagnetic junction

TransmissionVSG < 0

E

Double gate structure

Page 8: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

3D Poisson equation

7

Periodic BCOpen BCBoundary condition (BC)

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Parallelization in bc plane (63x125)

Parallelization in only c line (125)

a (90)

b (63)

c (125)

Page 9: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Programing

8 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

tran_variables.hopenmx_common.hlapack_prototypes.htran_prototypes.hAllocate_Arrays.cFree_Arrays.cinit_alloc_first.ctruncation.c: Preparation for transforming from AB to C partitionTRAN_Input_std.cTRAN_Poisson.c

Modification of only 10 Files

TRAN_Poisson_FDG

Transformation from C to AB partition

FFT for the boundary conditions

Transformation from AB to C partition

2D real space Poisson equation

FFT to real space

Page 10: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Hartree Potential (eV)

9

VSD = 0.3 V, VSG = −10 V

xy

zx

zx

xy

VSD = 0 V, VSG = 0 V

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

z x

y

Page 11: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Transmission

10 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

VSD = 0.3 V, VSG = −10 VVSD = 0 V, VSG = 0 V

E

E

updown

This provides another possible spin filter.

Page 12: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

All 2D Material Tunneling FETs

11

Graphene

hBN

Transition metaldichalcogenide (TMDC)

Phosphorene

Group-IV monochalcogenide

Discovery (2004)

C NB graphene

Ta WHf

Nb MoZr

V CrTi

C atom

Te

Se

S

Te

Se

SP

Ge

SnGeSe

MoS2

2016 COPYRIGHT FUJITSU LABORATORIES LTD.

Page 13: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

GeSe/MoS2/VS2 Tuneling FETs (TFETs)

12 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

ChannelSource Drain

MoS2

TFET

VS2

The lattices of these materials are matched with a relatively small unit cell.

P-dopedGeSe

The subthreshold swing

(SS) in conventional FETs

is limited to 60 mV/dec.

VSG

ISD

SS

Page 14: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

DFT code: OpenMX

Exchange-correlation potential:

GGA-PBE with van der Waals correction

Norm-conserving pseudopotential:

Troullier-Martins

Pseudo atomic orbitals (PAOs)

Geometry optimization:

Ge7.0-s3p3d3f2, Se7.0-s3p3d2f1, P7.0-s3p3d2f1, Mo7.0-s3p2d2f1, S7.0-s3p3d2f1, V6.0-s3p3d2

Transport: s2p2d1

Temperature: T = 300 K

Computational Details

13 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

Page 15: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Atomic Structure

14 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

x

z

x

y

ChannelSource Drain

Gate

Gate

LCh

2.6 nm

GeSe

MoS2

VS2

244

2.6 nm

Numberof atomsLCh

1.9 nm

280

Interlayer distance: 0.323 nmContact length: 0.6 nm

Page 16: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Gate Control

15 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

Partial density of states (PDOS) of Mo atom in the center of the channel (LCh=1.9 nm)

VSD = 0.1 V

Page 17: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Device Properties

16 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

VSD = 0.1 V

SS = 3.6 V/dec@LCh = 2.6 nm

SS =8.5 V/dec@LCh = 1.9 nm

> 10

2.6 nm

Ion/IoffLCh

1.9 nm

> 103

The subthreshold swing (SS) would be further improved by using a high-κ material as a gate dielectric that is a vacuum in the present model.

Page 18: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Computational Cost

17 2015 COPYRIGHT FUJITSU LABORATORIES LTD.

LCh (nm)Number of atoms

Numberof mpi

Number of threads

Time(day)

1.9 244 105 7 1.5

2.6 280 105 7 2.7

Computer: Fujitsu PRIMERGY CX400

Information Technology Center, Nagoya University568 nodes28 cores (128 GB)/node

We need further parallelization of Poisson equation calculation.

Page 19: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

Summary

18 2016 COPYRIGHT FUJITSU LABORATORIES LTD.

We implemented a gate function in OpenMX (DFT-based NEGF code), by applying open boundary conditions to the 3D Poisson equation.

We designed GeSe/MoS2/VS2 TFETs and examined the device properties using the developed code.

Ion/Ioff > 10, SS = 8.5 V/dec @ LCh = 1.9 nm

Ion/Ioff > 103, SS = 3.6 V/dec @ LCh = 2.6 nm

This could be a powerful tool for exploring novel nanoelectronic and spintronic devices.

Page 20: Implementation and Application of Gate Voltage in NEGF ...t-ozaki.issp.u-tokyo.ac.jp/meeting16/OMX-Ohfuchi-2016Nov.pdfNumber L Ch of atoms 1.9 nm 280 Interlayer distance: 0.323 nm

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