i~ service manual 6188 - hitachi rail

172
IUNION SWITCH & SIGNAL I~ SERVICE MANUAL 6188 A member of the ANSALDO Group 5800 Corporate Drive, Pittsburgh, PA 15237 Installation, Operation and Maintenance MICROCODE-II MICROPROCESSOR-BASED CODED TRACK CIRCUIT SYSTEM June,1985 A-06/85-2779 ID0045F,0046F COPYRIGHT 1993, UNION SWITCH & SIGNAL INC. PRINTED IN USA STANDARD: N451082-3901 N451082-3903 N451082-3906 STICK LOGIC: N451082-3910 N451082-3920 ANSALDO Trasporti

Upload: others

Post on 29-Mar-2022

11 views

Category:

Documents


0 download

TRANSCRIPT

PDF Viewing archiving 300 dpiIUNION SWITCH & SIGNAL I~ SERVICE MANUAL 6188 A member of the ANSALDO Group 5800 Corporate Drive, Pittsburgh, PA 15237
Installation, Operation and Maintenance
June,1985 A-06/85-2779 ID0045F,0046F
STANDARD:
REVISION INDEX
Revised pages of this manual are listed by page number and date of revision.
Date
CONTENTS
Section
I GENERAL 1.1 1.2 1.2.1 1.2.2 1.2.2.1 1.2.2.2 1.2.2.3 1.2.2.4 1.2.2.5 1.2.2.6 1.3 1.3.l 1.3.2 1.3.3
INFORMATION INTRODUCTION COMPONENTS card File Printed Circuit Boards CPU (N451204-3301) Bi-Polar Logic I/0 (N451204-3601) Mini-Driver (N451204-3102) conditional Power supply (CPS) (N451204-3501) Track I/0 (N451204-3801) surge Supression PCB N451204-3701, -3702 SPECIFICATIONS Physical/Mechanical Electrical Miscellaneous
II FUNCTIONAL DESCRIPTION 2.1 MICROCODE TERMINOLOGY 2.2 GENERAL CONFIGURATIONS AND FUNCTIONS OP UNITS 2.3 TRACK CIRCUIT OPERATION 2.4 CONTROL OF INPUTS AND OUTPUTS 2.4.l Relay Contact Inputs (,f'ypical Application) 2.4.2 Output to Relay coils and/or Signal .Lamps 2.4.3 Track Coding 2.4.3.l Track Interface and Signal 2.4.3.2 Code Format and Security 2.5 MISCELLANEOUS CHARACTERISTICS 2.5.1 Voltage Distribution 2.5.2 CPU PCB General configuration/Operation 2.5.3 Logic I/0 PCB System cross References
SECTION III 3.1 3.2 3.3
3.4 3.5 3.5.1 3.5.2 3.5.3 3.5.4 3.6 3.7 3.7.1 3.7.2 3.7.2.l 3.7.2.2 3.7.3 3.7.3.1 3.7.3.2 3.7.4
INSTALLATION . GENERAL CARD FILE MOUNTING PCB PREPARATION (Track I/0 Receiver Block Length Adjustment) BATTERY AND CHARGER WIRING AND SURGE PROTECTION connection to Weidmuller Plugs Battery Track Leads Relay Logic POWER-UP AND INITIAL DIAGNOSTICS FINAL SYSTEM VERIFICATION General Verifying Master Side communications synchronization .of the Track Circuit Relay Logic Indications Verifying Slave Side communications synchronization of the Track Circuit Relay Logic Indications cross Checking Relay Logic I/0
i
UNION SWITCH a SIGNAL ~
1-1 1-1 1-4 1-4 1-6 1-6 1-7 1-7 1-7 1-7 1-8 1-8 1-8 1-8 1-9/10
2-1 2-1 2-2 2-2 2-3 2-3 2-4 2-7 2-7 2-7 2-7 2-7 2-9 2-12
3-1 3-1 3-1 3-1
3-4 3-5 3-5 3-5 3-6 3-6 3-8 3-9 3-9 3-9 3-9 3-10 3-10 3-10 3-10 3-11/12
ffi UNION SWITCH & SIGNAL
V TROUBLESHOOTING AND MAINTENANCE 5.1 FIELD 5.1.1 General 5.1.2 Troubleshooting Procedure 5.1.3 Track Voltage Readings (Brush Recorder) 5.2 SHOP MAINTENANCE 5.2.1 General 5.2.2 CPU PCB (N451204-3301) 5.2.2.1 Detailed Circuit Description 5.2.2.2 Test Procedure comments 5.2.2.3 Recommended Test Equipment 5.2.2.4 Test Set-Up 5.2.2.5 Test Procedure 5.2.2.6 Close-out 5.2.3 Bi-Polar Logic I/0 PCB (N451204-3601) 5.2.3.1 Detailed Circuit Description 5.2.3.2 Recommended Test Equipment 5.2.3.3 Test Set-Up 5.2.3.4 Test Procedure 5.2.4 Mini-Driver PCB N451204-3102 5.2.4.1 Circuit Description 5.2.4.2 Recommended Test Equipment 5.2.4.3 Test Set-Up 5.2.4.4 Test Procedure 5.2.5 Track I/0 PCB (N451204-3001) 5.2.5.1 General Circuit Description 5.2.5.2 Detailed Circuit Description 5.2.5.3 Required General-Pupose Test Equipment 5.2.5.4 Track I/0 PCB Test Set 5.2.5.5 Preliminary Test Set-Up 5.2.5.6 Initial Power Supply Test 5.2.5.7 Receiver Test and Calibration 5.2.5.8 Transmitter Test and Calibration 5.2.5.9 Battery Reset Test and calibration 5.2.6 CPS PCB N451204-3501 5.2.6.1 5.2.6.2 5.2.6.3 5.2.6.4 5.2.6.5 5.2.7 5.2.7.1 5.2.7.2 5.2.7.3
Detailed Circuit Description Test Procedure comments Recommended Test Equipment Test Set-Up Test Procedure surge supression PCB N451204-3701, -3702 Required Test Equipment Test Procedure for -3701 PCB Test Procedure for -3701 PCB
VI CORRECTIVE MAINTENANCE
UNION SWITCH & SIGNAL
4-1/2 4-1/2 4-1/2
5-1 5-1 5-1 5-1 5-7 5-10 5-10 5-10 5-10 5-15 5-15 5-16 5-16 5-18 5-19 5-19 5-24 5-24 5-26 5-31 5-31 5-32 5-35 5-37 5-40 5-40 5-41 5-48 5-49 5-59 5-60 5-60 5-61 5-64 5-65 5-65 5-66 5-69 5-70 5-72 5-76 5-76 5-76 5-77
6-1
m UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL m CONTENTS (Cont'd)
Section
VII SUPPLEMENTAL DATA 7.1 RECOMMENDED REFERENCE LITERATURE 7.2 INPUTS AND OUTPUTS - CROSS REFERENCES
APPENDIX A A.l A.2 A.3 A.4 A.5 A.6 A.7 A.7.1 A.7.2 A.8
APPENDIX B
APPENDIX c C.l c.2 c. 3 C.3.1 c.3.1.1 C.3.1.2 C.3.1.3 C.3.1.4 c.3.2 C.3.3
c.4 c.5 c.5.1
Figure
1-1 1-2 1-3 1-4 2-1 2-2 2-3 2-4 2-5 3-1 3-2 5-1 5-2
PARTS LIST CARD FILE CPU PCB N451204-3301 BI-POLAR LOGIC I/0 PCB N451204-3601 MINI-DRIVER PCB N451204-3102 Track I/0 PCB N451204-3801 CPS PCB N451204-3501 SURGE SUPPRESSOR PCB N451204-3701, -3702 PCB -3701 PCB -3702 MOTHERBOARD PCB N451605-8501
MICROCODE BLOCKING UNIT N451557-160X
MICROCODE STICK LOGIC N451082-3910, N451082-3920 INTRODUCTION COMPONENTS FUNCTIONAL DESCRIPTION Color Light Display Inner Logic I/0 PCB's Inputs and Outputs outer Logic I/0 PCB's outputs outer Logic I/0 PCB's Inpijts Sample Microcode Stick Logic Operation
· Control of Inputs (PCB Hardware) output to Relay Coils And/Or Signal Lamps (PCB Hardware) INSTALLATION OR -3901 OR -3903 RETROFIT MAINTENANCE General - system Troubleshooting
ILLUSTRATIONS
Microcode Basic System Diagram Typical Master Transmission with Shunt on Track Typical Track Signal With Microcode Units Synchronized Microcode PCB Arrangements Microcode Unit Block Diagram Microcode Available Codes Microcode Unit Voltages CPU PCB Block Diagram system configuration of Logic I/0 PCB LED's Blocking Unit Application Microcode Battery, Track Lead and Relay Logic Wiring Microcode system Troubleshooting Procedure Typical waveform: unsynchronized T.C.
iii
A-2 A-6 A-8 A-10 A-12 A-14 A-16 A-16 A-16 A-18
c-1 C-1 C-2 C-2 C-2 C-2 C-3 c-4 c-1 c-1
c-7 c-a C-8
1-2 1-3 1-4 1-5 2-5/6 2-8 2-10 2-11 2-13/14 3-2 3-7 5-2 5-8
ffi UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL ffi
Figure
5-3 5-4 5-5 5-6 5-7 5-8 5-9 5-10 5-11 5-12 5-13 5-14 5-15 5-16 5-17 5-18 5-19 5-20 5-21 5-22 5-23 5-24 7-1 A-1 A-2 A-3 A-4 A-5 A-6 A-7 A-8 c-1
C-2 C-3
Table
2-1 2-2 3-1 3-3 3-4 5-1 5-2 7-1 B-1 c-1 C-2
ILLUSTRATIONS (Cont'd)
Typical Waveform: Synchronized T.C. Synchronized T.C. With 60 Hz Interference. Typical waveform: Unbalanced T.c. Typical Waveforms: M.S. Freq. Interference & Filter. CPU PCB Schematic Diagram CPU PCB Test Set-Up Logic I/0 PCB Schematic Diagram Logic I/0 PCB Test Fixture and Test Equipment Set-Up Logic I/0 PCB Test waveforms Mini-Driver PCB Schematic Diagram Mini-Driver PCB Function Generator Set-Up waveform Mini-Driver PCB Test Fixture and Test Equipment Set-Up Mini-Driver PCB Function Generator Alternate Waveform Mini-Driver PCB Test waveforms Track I/0 PCB Schematic Diagram Track I/0 PCB Test Fixture Schematic Diagram Track I/0 Test Fixture Preliminary connections Track I/0 PCB Test waveforms CPS PCB N451204-3501 Schematic Diagram CPS PCB N451204-3501 Test Set-Up CPS PCB N451204-3501 Test waveforms surge Supression PCB Schematic Diagram Microcode Motherboard Schematic Diagram Microcode card File Assembly CPU PCB Component Layout Bi-Polar Logic I/0 PCB component Layout Mini-Driver PCB N451204-3102 Component Layout Track I/0 PCB component Layout CPS PCB Component Layout surge suppression PCB Component Layout Motherboard component Layout Stick Logic Unit, Logic I/0 PCB LED Functions for Color Light Display
5-8 5-9 5-9 5-9 5-13/14 5-17 5-21/22 5-25 5-29 5-33/34 5-35 5-36 5-37 5-38 5-43/44 5-53/54 5-59 5-62 5-67/68 5-71 5-73 5-79/80 7-5/6 A-3/4 A-7 A-9 A-11 A-13 A-15 A-17 A-19 C-2
Sample Microcode Stick Logic Operation C-5/6 Microcode Stick Logic System Troubleshooting Procedure C-9
TABLES
Input-Buffer and Input-Driver card File Locations Logic I/0 PCB: LED and I/0 Cross References Microcode Maximum Track Circuit Lengths Weidmuller Plug Designations Microcode Inputs Requiring Driver Connections CPU Diagnostics Quick-Reference Chart CPU PCB: IC12 Operation General Microcode I/0 cross References Microcode Blocking Unit Part Numbers/Frequencies Microcode Stick Logic Buffer and Driver Locations Stick Logic, CPU Diagnostics Quick-Reference Chart
iv
2-4 2-12 3-3 3-5 3-8 5-1 5-11 7-1 B-1 c-7 c-8
m UNION SWITCH & SIGNAL
SECTION I GENERAL IN?ORMATION
UNION SWITCH & SIGNAL m
Microcode is a microprocessor-based coded track circuit system for use in non-electrified territory. It provides train detection and bi-directional communication between adjacent signal locations, as well as detection of broken rail and insulated joint breakdown. A Microcode.unit (card file) provides two functionally independent half units (Side A and Side B), each performing as the end of a track circuit at insulated joints. Figure 1-1 shows a basic system diagram.
The Microcode Stick Logic (N451082-3910 and -3920) performs all functions of a standard unit. It has the additional feature of internal stick logic to eliminate external relay requirements. Refer to Appendix c for detailed information on the Microcode Stick Logic.
The Microcode unit is comprised of the following hardware:
Microcomputer
1. Encodes inputs into message (signal) to be transmitted onto the track.
2. Decodes the message received from the tracks and directs output to the appropriate interface hardware.
3. Continuously makes internal checks, and checks the integrity of input and output connections. Any detected fault results in the output being placed in the most restrictive state.
Track Interface (One for each side)
1. Transmitter: Under the control of the microprocessor, the transmitter provides the drive necessary to transmit the signal on to the track.
2. Receiver: The receiver provides the signal conditioning and sensitivity adjustments for the signal received from the track.
Input Interface (One for each side)
Provisions are made on the Logic I/0 board for five parallel, independent inputs.
output Interface
Provisions are made on the Logic I/0 board for five parallel, independent outputs.
3urge Protection
Provision is made on surge suppression board(s) to limit the ~ffects of low level surge currents before they reach the electronics.
°' ..... co· CD .. 'O
..... I .....
&' en .... 0
IQ l"I DI s
+
EB
ffi . UNION SWITCH & SIGNAL UNION SWITCH a SIGNAL ffi The inputs and outputs can be multiplexed with external relay logic to provide communication of up to 32 separate codes over the track circuit. Any or all inputs from one side may be connected to the outputs of the other side. Thus, a standard unit can be used as a full repeater, or any inputs can be repeated at a location as desired. A unit is provided with reduced hardware where a dedicated repeater is required.
A redundant check is made on each received message before changing the outputs. Transmission and delivery time is approximately 1.8 seconds in the standard unit, and approximately 0.9 seconds in the repeater unit.
Microcode can be employed on track circuits of up to 13,000 ft., with 3 ohm/1000 ft. minimum ballast (continuous welded rail, 115 lb. and up). (Refer to Table 3-1 on page 3-3 for complete listing of maximum track circuit lengths for different ballast resistances, rail weights and types of rail.) The unit provides .06 ohm shunt detection with no other equipment in series with the circuit.. Where Microcode is applied with motion detection equipment and US&S blocking units, the allowable block length is reduced by 1000 ft. for each blocking unit. Microcode is designed for operation in track circuits with or without motion detectors and blocking units.
The Microcode functions as a multiplexer where parallel inputs to the unit at one end of the track circuit are encoded and transmitted over the track. The signal is received at the other end, decoded and output in parallel via the appropriate interface circuitry. communication between the units at the ends of a track circuit is established as follows:
!. The Master (Side A of unit) transmits continuously with pauses between each message when not receiving a track signal. A typical signal is shown in Figure 1-2 below (actual message would depend on inputs):
loll •----APflflOXIMATILY .I IICONDI -----111"1
Figure 1-2. Typical Master Transmission with Shunt on Track
2. The Slave (Side B of unit) will only transmit in response to a received track signal. With a shunt on the track circuit, neither end is receiving a track signal and outputs at both ends are down.
3. After the track circuit clears, the Slave will transmit in response to the Master and vice-versa, instead of inserting the pause after each transmit. The two units are then •synchronized• and the track signal would appear as shown in Figure 1-3.
6188. o. 1-3
m UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL m MASTEAXMIT SI.AVE XMIT MASTEAXMIT
Figure 1-3. Typical Track Signal With Microcode Units Synchronized
1.2 COMPONENTS
1.2.1 card File
All Microcode components are contained in a sheet metal card file. TWo mounting brackets are provided which may be attached vertically or horizontally for shelf or wall mounting. Microcode card files are shipped with different arrangements of printed circuit boards as determined by application. A different unit part number is assigned for each file arrangement. These are shown in Figure 1-4.
The basic Microcode card file has slots for up to tens• X 1• plug-in printed circuit boards, however only eight of these slots are used in the -3901. Microcode units. The boards plug into a printed circuit •motherboard•. To the left and right of the PCB section are identical c-core transformers. A detachable front cover is placed over the PCB/transformer bay to retain the PCB's in the motherboard connectors and acts as a partial RF shield for the microprocessor (CPU PCB). A detachable cover on the rear of the card file allows access to the transformers and locking clip pins on the motherboard. Slots are located above and below the PCB/transformer bay for ventilation of PCB-generated heat.
Along the top of the card file is a Weidmuller plug strip which connects all power and signal wiring to the Microcode. It consists of either six or 70 separate plastic shell plugs (total determined by unit part number) fitted onto a horizontal channel. The plugs are retained by a pair of book-end plugs and aligned by an internal guide rod. Each plug contains one upper and one lower wire clasp hole. The conductor is locked by a machine screw. Wiring from the motherboard and transformers use the lower Weidmuller plug holes. All wiring to external equipment uses the upper plug holes.
A 15 amp circuit breaker is located to the left of the Weidmuller plugs for power protection and control.
6188, p. 1-4
PCB COMPLEMENT (N451204· )
,<. SUR'-E f3702) 70 WEIDMULLER CONNECTORS A. TRACK (·3801) E. CPU (·3301) 0 x A B c 0 E F G H z B. (NOT USED) F. LOGIC (,3601) I I I I I
C. LOGIC (·3601) G. (NOT USED) D. CPS (·3501) H. TRACK (·3801)
TRANS· TRANS·
I I I I ii N451012·3901
70 WEIDMULLER CONNECTORS I )C. SVRGE (·3702) 0 x A B c 0 E F G H z A. TRACK (·3801) E. CPU (·3301) I I I I I I I I
B. (NOT USED) F. MINI-DRIVER (·3102) TRANS· C. LOGIC (·3601) G. (NOT USED) TRANS· FORMER FORMER
D. CPS (·3501) H. (NOT USED) * I I I I I II II
N451082·3903 (MASTER) *NOT USED
70 WEIDMULLER CONNECTORS I A. (NOT USED) E. CPU (·3301)
0 x A B c 0 E F G H z I l I I I I I I
B. (NOT USED) F. LOGIC (·3601) C. MINI-DRIVER (3102) G. (NOT USED) TRANS· TRANS·
FORMER FORMER 0. CPS (·3501) H. TRACK (·3801) • t. Su,tGe:{-3702) I I I I I I I I I
N451082·3903 (SLAVE) *NOT USED
u---2 WEIOMUlLER -LJ 2 WEIOMULLER - LJ )(. SURGE (-1702)
CONNECTORS CONNECTORS
0 x A B c 0 E F G H z A. TRACK (·3801) E. CPU (-3301) I I I I I I I I I I
B. (NOT USED) F. (NOT USED) E] TRANS· C. (NOT USED) G. (NOT USED) FORMER D. (NOT USED) H. TRACK (·3801)
R
i!. su~GE (-3702) I I I I I I I I I I I I I N451082-390I
CPU PCB PROMS
N451082·3901 9 N451575-0610 10 N451575-0611 N451082-3903 9 N451575-0610 10 N451575·0611 N451082·3906 9 N451575-0612 10 N451575-0613
Figure 1-4. Microcode PCB Arrangements
6188, p. 1-5
m UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL m 1.2.2 Printed Circuit Boards
1.2.2.l CPU (N451204-3301)
The Central Processing Unit (CPU) PCB performs all logical decisions and calculations for the Microcode unit. It is always installed in slot E of the card file. Principal functions of the CPU board include processing of data from other Microcode units, data encoding and transmission to other units and automatic testing of all I/0 circuits and PCB's. Among ·the key components of this board are:
Microprocessor IC
The principle controlling component of the CPU PCB is a 6809 Microprocessor chip. It is an NMOS device operating from a single 5 Vdc power supply.
EPROM IC
There are two Erasable Programmable Read-Only Memory (EPROM) IC's on the CPU PCB which are used to store system software and code tables. They provide the system with 4K bytes of memory. The EPROMS are factory-programmed and replaced in the field when program changes are desired.
PIA IC's
The CPU board contains five 6821 Peripheral Interface Adapter (PIA) !C's. The PIA's interface all signals between the CPU board and the remaining boards in the unit.
PTM IC
The CPU board contains one 6840 Programmable Timer Module (PTM). The PTM consists of several independent counters and is used for timing miscellaneous operations on the board, such as the watchdog routine.
RAM IC's
There are two, Random Access Memory (RAM) IC's on the board which together have a capacity of lK x 8 bytes of memory. The microprocessor uses the RAM's for short-term or •scratch-pad• memory.
LED
A single Light Emitting Diode (LED) is installed on the CPU board to monitor an automatic diagnostics routine which occurs at power-on, and to assist in bench troubleshooting of the system.
6188, p. 1-6
133 UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL 133 1.2.2.2 Bi-Polar Logic I/0 (N451204-3601)
The Logic I/0 board is the interface between the CPU PCB and the wayside equipment, including the relay contact inputs and the relay coils and/or signal lamps controlled in the track circuit system. The board consists of five input-buffer circuits, five output-driver circuits and a single input-driver circuit. Principal components include switching transistors for conditioning of data signals and optical-coupler IC's for electrical isolation of signals. The Logic I/0 board contains 10 LED's, in two groups of five numbered 1 through 5 and 6 through 10. These monitor outputs and inputs, respectively.
1.2.2.3 Mini-Driver (N451204-3102)
The Mini-Driver PCB is used exclusively in Microcode units which communicate on only one track circuit. Its function is to supply the input drive voided by the removal of a Logic I/0 board. Neither logic or track inputs/outputs are necessary in the side of a unit not connected to a track circuit. However, the input drive (+or-, depending on which side of the card file the board is in) is functionally necessary. Additional logic circuitry on this board simulates both logic and track inputs/outputs. This enables the use of standard software on both dual and single function units. The CPU PCB assumes dual direction communication at all times and expects to receive certain logic signals, which the Mini-Driver PCB provides.
1.2.2.4 conditional Power supply (CPS) (N451204-3501)
The conditional Power Supply (CPS) PCB provides regulated 12 Vdc necessary to operate wayside relay coils and/or signal lamps. It does so on the condition that vital check signal is constantly received from the CPU PCB. A single LED on this board indicates the presence of the 12 volt output. The Conditional Power Supply PCB includes a tuned LC circuit, transistor oscillator stage and a 12 volt output circuit.
1.2.2.5 Track I/0 (N451204-3801)
The Track I/0 board is responsible for interfacing coded data between the rails and the CPU PCB. It consists of one transmitter and one receiver section which share track connections via the adjacent transformer. The board also contains a power supply that converts the 12 Vdc from the wayside battery down to 5 Vdc to operate components on other boards in the unit. By interrupting this 5 volt supply, the Track I/0 PCB turna off the microprocessor whenever battery voltage drops below 9.8 Vdc or rises above 16.2 Vdc. This resets the microprocessor. As battery voltage rises from the lower trip point, the Track I/0 board does not reconnect the 5 volt supply until the voltage is approximately 11.5 Vdc. This is designed to assure a smooth system restart once the. battery has been adequately recharged. The high trip point prevents the unit from running on overcharged batteries. Battefy voltage must fall below approximately 15 volts before the unit will be restarted.
6188, p. 1-7
m UNION SWITCH & SIGNAL UNION SWITCH Ii SIGNAL m 1.2.2.6 surge supression PCB N451204-3701, -3702
The surge suppression PCB protects the Microcode system from low level power surges. outputs 1, 4, 5, 8, 9 and 10, inputs 9 and 10, and the side leads on the track transformers are routed through all three versions of this PCB. The -3701 PCB provides surge protection for all of the above circuits on the -3920 Bipolar Stick Logic unit. (Only outputs 1 and 8 are capable of driving lamps; the other outputs are optimized to protect relay drives, thus they cannot be used to drive lamps.) The -3.702 PCB only provides surge protection for the Track I/0 PCB.
1.3 SPECIFICATIONS
1.3.1 Physical/Mechanical
overall dimensions:
Track lead resistance:
Input-driver loop resistance:
Relay wiring resistance:
6188, p. 1-8
Removable front cover
Up to 70 Weidmuller connectors
9.8 to 16.2 volts de, 12 Vdc nominal
0.5 volts, peak-to-peak
25 watts (max.)
50 ohms (max. )
ffi UNION SWIT~H a SIGNAL
1.3.3 Miscellaneous
UNION SWITCH a SIGNAL ffi
13,000 ft@ 3 ohms/1000 ft. ballast for 115 lb. and greater continuous welded rail (less 1000 ft. for each motion detector blocking unit). 0.06 ohm shunt detection. Refer to Table 3-1, page 3-3 for complete listing of maximum track cir.cuit lengths at different ballast resi•tances, rail weights, etc.
1.8 sec. Code change communication between blocks (worst case) less than 2.2 sec.
5 independent parallel inputs and outputs
32 (max.) direct I/0 with Microcode
300 to 420 milliseconds
Test EPROM's (CPU PCB only) PCB test fixtures (customer built) Reset flash counter
CPU - Bi-Polar Logic I/0 - Mini-Driver - conditional Power Supply­ Track I/0 - surge Supression -
N451204-3301 N451204-3601 N451204-3102 N451204-3501 N451204-3801 N451204-3701 N451204-3702
6188, p. 1-9/10
UNION SWITCH II SIGNAL m
This describes Microcode units which bridge two_ adjacent track circuits at an insulated joint location. These units consist of two independent relay-logic and/or track interface systems controlled by the CPU board.
Single-Function
This refers to Microcode units used at the ends of the last track circuits in the Microcode-controlled signal territory. These units consist of one relay-logic and track interface system controlled by the CPU board.
Standard Unit
A standard Microcode unit interfaces both relay-logic and track code data. standard units may be either dual-function or single-function.
Repeater Unit
This describes Microcode units (dedicated repeater, N451082-3906) which only repeat coded data from one track circuit to the next. Thus, repeater units can only be dual-function. A repeater is developed from a standard unit by connecting track inputs and outputs from one side of the unit to the other.
Side •A• I/0 (Master)
This refers to relay-logic and track code lines interfaced by the Logic I/0 and Track I/0 (or Track I/0) PCB's to the left of the CPU PCB. The designations for the individual lines are given an •A• suffix (i.e., Input lA).
Side •e• I/O (Slave)
Relay-logic and track code lines to the right of the CPU PCB are given a •B• suffix.
Master Side
This refers to the side •A• track interface (Track I/0 PCB and transformer). This side always transmits the first signal to the Microcode at the opposite end of the track circuit during the start of system communications. The transmission is controlled by the CPU PCB.
Slave Side
The side •B• track interface must receive a signal from the Microcode at the opposite end of the track circuit before it can make a return transmission.
6188, p. 2-1
EfJ UNION SWITCH & SIGNAL UNION SWITCH 6 SIGNAL EfJ 2.2 GENERAL CONFIGURATIONS AND FUNCTIONS OF UNITS
N451082-3901
This unit is a standard, dual-function unit capable of interfacing up to five independent relay inputs and outputs each on side A and side B (10 total for the unit).
N451082-3903
This is a standard, single-function unit shipped with two different PCB arrangements. The unit with Track I/0 and Logic I/0 PCB's on side A is capable of interfacing up to five independent relay inputs/outputs and operates only as a Master transmitter on the track circuit. The alternate PCB arrangement is also capable of interfacing up to five inputs and outputs and operates only as a Slave transmitter. The Mini-Driver PCB supports CPU PCB operation for the non-track circuit side of the unit.
N451082-3906
This is only a repeater. Since it does not interface wayside relays and signal apparatus, it contains no Logic I/0 PCB's or a CPS PCB (normally used to power Logic I/0 PCB outputs).
2.3 TRACK CIRCUIT OPERATION
Microcode units operate independently within the signal territory, although communications between units at opposite ends of a track circuit are cooperatively formatted. Each track circuit is terminated by one Microcode unit at each end, with the dual-function units serving as a common terminal for two adjacent track circuits (intermediate location). Signal territories will use various numbers of dual-function units, but only one each of the single-function units at the end track circuits. A given track circuit is always controlled through the side A interface of one unit and the side B interface of the opposite unit.
Before fully bi-directional communications can occur between two units, the Master end Microcode must transmit a start-up signal to the Slave end Microcode: during this period, the track circuit is •unsynchronized•. The CPU logic in the Slave end Microcode must judge this transmission to be in good order before a transmission can be made back to the Master end Microcode. Once both units successfully receive, process and transmit coded data, the track circuit is •synchronized•; the Master/Slave description is no longer pertinent to system operation. Since the relay and track interfaces in a dual-function unit operate independently, one side may be communicating on a synchronized track circuit while the other side witholds transmissions because of an unsynchronized track circuit.
At track circuit synchronization (i.e. track circuit unoccupied), relay-logic inputs to the transmitting Microcode are automatically processed and output by the receiving Microcode. A 500 Hz. check signal generated by the CPU PCB is
6188, P• 2-2
UNION SWITCH & SIGNAL UNION SWITCH 6 SIGNAL
used to maintain the power output of the CPS PCB. A fault would prevent the CPU from generating the check signal and thus place the wayside signals in the most restrictive state.
Restarting Microcode communications again requires synchronization of the track cicuit.
2.4 CONTROL OF INPUTS AND OUTPUTS (See Figure 2-1)
2.4.1 Relay contact Inputs (Typical Application)
All relay logic inputs to a standard Microcode unit are interfaced by the Logic I/0 PCB. Five input-buffer circuits input relay heel data to the CPU PCB. The inputs are verified by pulses supplied by input-driver circuits on the Logic I/0 and/or Mini-Driver PCB's (one input-driver per board).
A relay heel input (energized or deenergized) to an input-buffer is read by the CPU PCB. The CPU outputs signals to the input driver on the same board containing the input buffers, and to the input-driver on a Logic I/0 or Mini-Driver board on the opposite side of the card file. The input-drivers, in turn, generate opposite-polarity voltages which are applied to the front and back contacts of the relays. If the signal returned via the contacts agrees with the position of the heel, the CPU board qualifies the input for encoding. If no verification signal is received by the CPU, or the signal is out of agreement with the heel indication, the CPU reads a fault and causes all outputs to go to zero.
In this application, the Dl input-driver line is always connected to a relay front contact and sets that input •high•, resulting in a relay-energized output from the receiving Microcode. All unused inputs are connected in parallel to the 02 input-driver. The polarity of the input-driver signal is determined by the card file slot the Logic I/0 or Mini-Driver is plugged into (Dl for side A slots, D2 for side B slots). In other applications, inputs are taken directly from the opposite side of the Microcode (i.e., •A• outputs to •B• inputs and vice-versa). Logic I/0 and Mini-Driver PCB input driver system positions are listed in Table 2-1.
6188, p. 2-3
ffi UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL ffi Table 2-1. Input-Buffer and Input-Driver Card File Locations
Unit Part No. Input Relay Heel to Front Contact From Back Contact From N451082- * Side Input Buffer Input Driver •+• Input Driver•-•
-3901 A Logic I/0 PCB, Logic I/0 PCB, Logic I/0 PCB, slot c (1A-5A) slot C slot F
B Logic I/0 PCB, Logic I/0 PCB, Logic I/0 PCB, slot F (lB-58) slot c slot F
-3903 A Logic I/0 PCB, Logic I/0 PCB, Mini-Driver PCB (Master) slot c (1A-5A) slot c slot F
B
-3903 A (Slave)
B Logic I/0 PCB, Mini-Driver PCB, Logic I/0 PCB, slot F (lB-58) slot c slot F
2.4.2 output to Relay Coils and/or Signal Lamps
All Microcode outputs to wayside equipment are interfaced through the Logic I/0 boards, with output power regulated by the conditional Power Supply (CPS) PCB. Each Logic I/0 board is capable of interfacing up to five parallel outputs to relay coils or combinations of relay coils and signal lamps, so long as certain power restrictions are observed. There are five output-driver circuits on the Logic I/0 board used for this function: each output-driver is augmented with a verify-output circuit.
An output-driver circuit receives a control signal from the CPU board. The level of that signal determines the voltage state on the 12 Vdc supplied to the relay coil or signal lamp. At the same time this output is aligned, the verify-output circuit sends a complimentary monitor signal back to the CPU PCB. If the returned signal of the verify circuit is not in agreement with the initial CPU control signal, the CPU orders all outputs to go to zero, causing the most restrictive state in the wayside signals.
6188, p. 2-4
CAUTION
DO NOT USE SNUBBING CAPACITORS ON RELAY COILS DRIVEN FROM MICROCODE. CAPACITOR SNUBBING MAY RESULT IN ERRONEOUS ENERGIZATION OF OUTPUT RELAYS.
NOTE
The N451082-3901 and -3903 Microcode units, as shipped, are not intended for direct drive of signal lamps or relays. The Surge Suppression PCB's used in these units only provide Track I/0 protection.
UNION SWITCH & SIGNAL t:t UGHTNJNG .
· . ...---- ARRESTERS ----...
N451204-3801 ..----., 11----~--- 1-..---f i--------------------------4 .. --- TRACK l tO N451?04-3801 BATTERY POSITIVE 9.ev TO 16.2\IOC 9.8V TO 16.2VOC
OUTPUTS
)< )<
, /
( CONTROLLED BY INPUTS )
IN/ I
I I \I+ sooHz I
01 I 2 3 4 5 I ~ :
j I ' • ' ~ t- • - - ~ 2 -···--·-·::
: , .• , 1 I : i A B C O E 0
1 1 I 2 3 4' 5 I ..... ..._ _ _J +-····-· .. .i
: OUTPUTS INPUTS I 41,;- '3\ :,' t I 2 I \:..) 1
, LOGJC l 10 3 -----,'----' : ...._--,-~ A N45720"1·3601 4
ABC OE 02
+ - © - f'o\ I : ~ I 5 " L- .L. - _J +---------i
- \.::.J I I ------4 T t7'I .: ---- ___ ':.::::::::::•::.: ~ .2•.. ~~~lf i-'?I-; \::_J I
{ V+ v- GENERATOR I ! ! -------"$_.,.....____ L ___ ~ ; ---------1
• •-• .., --./ ...........- T ,. ______ ., "'----.. I , © '•:
0 w ... .. ...J 0 Vl
V+
.____ _ ____,[: - I
+ : 02
• I I I
...!... ., .,,.
__; '---------------' !'>---~-.,-.,
+
REGULATED 12VOC I &AMPS
w--.--E
.. -------- -- - --.
\ ' svoc \ IN
t.lJCROPROCESSOR t1451204-3301 \
i 0 I I I
I I I
i.fl.11.. - - -· - - - - - - - - - - 1 • • I
©
,-------- - - : ©
I A 6 C D E. ---M A INPUTS ------MB __ ...._ __ c
I I I . I I
..------4----IM O ..---.---WE ,-------- -- - .
.. ..., - ... . I 2 3 4' 5 OUTPUTS
• I I t I I I I I I I ,
I 1--':._--'
GENERATO~; y. V+ 5 I--'.--------- ----
i © I I I I I I I I I I I I I I I I I I
• I . I
,-----' I I I I I I I .
02
GENERA TOH • v- V+ -------"' +SVDC __ f +
( FROM TRACK l /•) l
CCJNOITI ONAL POIIER SUPPLY
Figlre 2-1. Microcode unTtBlock Diagram
. I I
t t : !
i • i
I j l
5188, p. 2-5/6
m UNION SWITCH & SIGNAL UNION SWITCH Ii SIGNAL m 2.4.3 Track Coding
2.4.3.l Track Interface and Signal
The Track I/0 PCB and adjacent transformer make up a CPU/track interface for the Microcode. This PCB contains one transmitter and one receiver circuit which share the same connections to the rails. The transmit circuit receives two signals from the CPU board, including a transmit on/off signal and the pulsed code. The transmit on/off signal allows the PCB·to develop an ac voltage (XX volts, peak to peak, nom.) through the primary coil of the card file transformer. The voltage polarity is switched by PCB transistors controlled by the CPU. ·
The receiver circuit is active at all times, however, the microprocessor ignores any inputs during the transmit •on• time.
Microcode transmits coded data between units by pulsing equally •weighted• voltages of opposite polarity on the rails. One connection is made to each rail, via a card file transformer. The voltage applied to the primary of the transformer is stepped down to an open circuit voltage of 2 volts peak-to-peak (nom.) on the secondary. At least 340 millivolts peak-to-peak must be maintained .at the receiving unit before bi-directional communications can occur. Each rail connection has a fixed polarity. connections are switched on either side of insulated joints so that rail polarity is alternated from block to block. A Microcode system must not operate with two consecutive track circuits having the same rail-to-rail polarity.
2.4.3.2 code Format and Security
The code put onto the track is half duplex in nature. Each code is made up of five positive and four negative pulses, or nine total pulses. Duration of the code varies from 300 to 420 milliseconds, depending on the time sum of the individual pulses, which are either 30 or 60 milliseconds long. The 32 codes available with Microcode are shown in Figure 2-2.
The Microcode CPU logic uses the track code to monitor the general continuity of the track circuit. The positive pulses in each new code are counted by the micropro~essor to verify a total of five. A broken rail or defective insulated joint will likely garble or erase the code, in which case the CPU would change all outputs to zero (most restrictive signal condition). The CPU logic is not capable of determining what kind of fault interrupted the code.
2.5 MISCELLANEOUS CHARACTERISTICS
2.s.1 Voltage Distribution
All operating power for Microcode systems, including the running of PCB components and driving external devices, is derived from a 12 Vdc external battery. This supply is converted and regulated to +5 Vdc on the Track I/0 board(s) to run components on the Logic I/0 (or Mini-Driver), CPU and CPS
6188, p. 2-7
UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL ffi
INPUTS INPUTS CODE 1 2 3 4 5 CODE 1 2 3 4 5
0 0 0 0 0 0 16 0 0 0 0 1
1 0 0 0 0 17 1 0 0 0 1
2 0 1 0 0 0 18 0 1 0 0 1
3 1 1 0 0 0 19 1 1 0 0 1
4 0 0 1 0 0 20 0 0 1 0 1
5 1 0 1 0 0 21 1 0 1 0 1
6 0 1 1 0 0 22 0 1 1 0 1
7 1 1 1 0 0 23 1 1 1 0 1
8 0 0 0 1 0 24 0 0 0 1 1
9 1 0 0 1 0 25 1 0 0 1 1
10 0 1 0 1 0 26 0 1 0 1 1
11 1 1 0 1 0 27 1 1 0 1 1
12 0 0 1 1 0 28 0 0 1 1 1
13 1 0 1 1 0 29 1 0 1 1 1
14 0 1 1 1 0 30 0 1 1 1 1
15 1 1 1 1 0 31 1 1 1 1 1
INPUT DEFINITION: REFERENCES: OV ~ LOGIC 1 • 01 • INPUT VOLTAGE (LOW) •LED (ON)
A= 60mS
LOGIC O • 02 • INPUT VOLTAGE (HIGH) • LED (OFF) B = 30mS
Figure 2-2. Microcode Available Codes
6188, p. 2-8
ffi UNION SWITCH a SIGNAL UNION SWITCH a SIGNAL ffi boards. The Track I/0 board transmit/receive circuits use battery 12 Vdc. The external 12 Vdc is also conditioned by the CPS board to drive relay coils and/or signal lamps via the Logic I/0 board control. The Logic I/0 boards also interface the CPS 12 Vdc to supply the front and back contacts of the control input relay for position verification. The general schematic of Microcode voltages is shown in Figure 2-3.
2.5.2 CPU PCB General configuration/Operation (See Figure 2-4)
The CPU board is built around the single microprocessor chip and two major groups of components: memory (EPROM's and RAM's) and data interface (PIA's). The microprocessor and these groups communicate by various address and data busses.
The Microprocessor on the CPU board initiates all logical decisions for the board and the entire Microcode unit. It is powered from a separate 5 Vdc line from the Track I/0 PCB and clocked by the 4 MHZ crystal XTAL 1.
The system software instructions for the microprocessor are stored on two EPROM's, each of which has a capacity of 4,096 8-bit words~ The EPROM's are linked to the microprocessor by an 11-bit address bus and 8-bit data bus. Also in the memory group are two RAM's which provide temporary data storage during program operations. Each has a capacity of 1,024 4-bit words. The RAM's are linked to the microprocessor by a 10-bit address bus and an 8-bit data bus.
There are five PIA's on the CPU board to interface all signals between the board and the remaining PCB's in the unit. Each PIA has 16 parallel lines available to cover the interfacing of the signals. The PIA's are linked to the microprocessor via an 8-bit data bus and 3 address lines.
When power is applied to the Microcode unit, the system first undergoes a self-diagnostics routine in which checks are run on CPU hardware and software. Once CPU logic is verified, tests proceed to other Microcode PCB's and selected circuits outside the unit. The CPU LED indicates the progress of the diagnostics routine (refer also to section 4.4). When the CPU is satisfied with diagnostics results, it will automatically move into routine system operation.
There are 73 total input/output lines on the CPU PCB, including:
a. Five relay contact (heel) inputs from each Logic I/0 board.
b. TWO outputs to Logic I/0 board input-driver circuits (one for each board).
c. Five energize outputs for relay coils and/or signal lamps, to each Logic I/0 board.
Five verify-output circuit ~onitors from each Logic I/0 board to complement the energize outputs.
e. TWO receiver•+• pulse inputs from the track code receiver circuits on the Track I/0 boards.
6188, p. 2-9
.,., .... c.Q c: .., II)
N I w . 3: .... 0 .., 0 0 0 Q, II)
~ .... rt"
--F--J I L-
L ::- 12V - 18VPP "---
r· + - - INPUl ... "' "' f+ BUFFERS L0-8ATT 1!>1
SHUTDOWN ~ &POWER SUPPLY .
(CONSTANT VOLTAGE CHARGER tUVMAX.)
r-------, --, I I + .1 I I I I I - I I v I • I "'¥ I I - -~--J -L_
.__, - LOGIC
+ ' + N N .. L0-8ATT
m
• MHZ 01 1050
l1r- 1c12 EPSO
" v 02 - 1
~ RESET 6821 VMA
MICRO 1\ R E 00 OATA BUS/8 0007
1/ s E 07 T AO - I ·- -AO·A11 /12 Al - PIA 1 B .__ - - A5 I
IC9 AO
6821 llf2
v RESET _
A IC10 0 . --0 AO - IC3
PROM R u,
~ A• - PIA3 PIAJA s AIW 6821
AO-A11 /12 8 g v ----,,.2 u -s (J '/ 1502
2732 ti RESEl -
IC7.8 . TWO
1 AO-A9 /10 A5 PIA• PIA•A RIW 6821
'/ 02 - '/ 10$1 , / RESET 00-07 v -
l\ I v 00-07 PIA4 8
IC6 AO
Al AO !CS -A2 Al
I . 6&40 A• PIA 5 PIA 5 A A6 -RIW 6821 - -PTM c - 02
A 1051
!\ I TIMER
v 00-07 PIA 5 B . Figure 2-4. CPU PCB Block Diagram
6188, P• 2-11
m UNION SWITCH & SIGNAL UNION SWITCH 6 SIGNAL m f. Two receiver•-• pulse inputs from the track code receiver circuits on the
Track I/0 boards.
g. Two transmit-enable outputs to the code transmit circuits on the Track I/0 boards.
h. 'l'«o transmit-pulse outputs to the code transmit circuits on the Track I/0 boards.
i. One 500 Hz square-wave output (generated by the microprocessor) to the CPS board.
Refer to Table 7-1 for. a complete cross-referenced listing of the I/0 lines from the CPU PCB PIA's.
2.5.3 Logic I/0 PCB System cross References
There is a fixed, input-output correspondence between the relay contact inputs to a transmitting Microcode and the coil or lamp energizing outputs from a receiving Microcode. Figure 2-5 shows the relationships of the lines and LED's with respect to the side A and B Logic I/0 boards on opposite ends of a track circuit. Use Table 2-2 to follow each line from the side A Microcode to the side B Mircocode and vice-versa (references omitted for slot Band slot G PCB's):
Table 2-2. Logic I/0 PCB: LED and I/0 Cross References
Transmit PCB Input LED Receive PCB Output LED Side Slot !!2.:. ~ Side lli!. No. ~ -
B F lB 6 A c lA(-)* 1 B F 2B 7 A c 2A(-)* 2 B F 38 s A c 3A(-)* 3 B F 4B 9 A c 4A(-)* 4 B F SB 10 A c SA(-)* 5 A c lA 6 B F lB(-)* 1 A c 2A 7 B F 2B(-)* 2 A c 3A s B F 38(-)* 3 A c 4A 9 B ·F 4B(-)* 4 A c SA 10 B F SB(-)* 5 B G 68 6 A B 6A(-)* 1 B G 7B 7 A B 7A(-)* 2 B G SB s A B SA(-)* 3 B G 9B 9 A B 9A(-)* 4 B G !OB 10 A B lOA(-)* 5 A B 6A 6 B G 6B(-)* 1 A B 7A 7 B G 7B(-)* 2 A B SA s B G SB(-)* 3 A B 9A 9 B G 98(-)* 4 A B lOA 10 B G· lOB(-)* 5
*Outputs sink current from a common v+ bus.
6188, p. 2-12
...., .... IQ c l"1 ID
N I UI • (Jl
'< m rt' ID a 8 ::s ...., .... IQ c l"1 I» rt' .... 0 ::s 0 ....,
s IQ .... 0
I:"' O'I tlJ ...... t::, 0) -0) m ... 'C • N I
...... w
' ...... ....
----n, r I I I I I I • I I v I I I .. + .. AND .. - I t I
LINES f':,T I j EACH OUT .............._i ' __ j
-,_L -----
INPUT 38 OUTPUT3B
Bl·OIRECTIONAL COMMUNICATION OF
I • • I "+"ANO"-" I I LINES FOR I ,t j
EACH OUTPUT~ L...----.i L _______ J
INPUT 1A (/)
INPUT2A ,.. 0
I LJ L
SIDE''8" RELAY CONTROL
I I
~-t J .__ __ _
MICROCODE UNIT2
SIOE .. A ..
UNIT2 SIDE"A"
c z a z I ~ ::c .. u,
c5 z > ,..
UNION SWITCH A SIGNAL ffi
Because Microcode supervises vital track circuit functions, proper installation and cut-in is essential to achieving reliable system operation. The procedures in this section must .be car.tied out exactly as described, and only by qualified and properly equipped personnel. The-installer should have a thorough understanding of Microcode operation, however a knowledge of microprocessor operation is not required.
This section covers installation procedures common to all Microcode applications. The customer should consult his special system documentation for any additional, application-dependent instructions.
3.2 CARD FILE MOUNTING
The Microcode card file is designed for shelf or wall mounting. The angle brackets may be attached in the vertical or horizontal position. The three holes in each bracket are on 2-13/16 inch centers and are 5/16 inch in diameter. Placement of the card file should take into account the need to minimize cable length to other equipment, access to PCB's etc.
3.3 PCB PREPARATION (Track I/0 Receiver Block Length Adjustment)
Microcode units are shipped with all required PCB's installed, as specified by application (see Figure 1-4). None of the PCB's, except for the Track I/0 (N451204-3801), require any field adjustments prior to system cut-in. The Track I/0 PCB contains a switch which adjusts receiver senstivity to track circuit length. The sensitivity to be used is determined by the •effective• block length, which is equivalent to the actual block length plus 1000 feet for each tuned blocking unit (if any) in series with the Microcode track leads.
A blocking unit may be installed in series with one of the Microcode track leads to increase the impedance presented across the tracks at motion sensor frequencies. The blocking units have a low but appreciable impedance at Microcode frequencies and thus must be included in the block length calculation. Blocking units should be installed where an insulated joint (signal block end) is within the approach of a motion sensor. Blocking units may be necessary at the end of a track circuit where a motion sensor approach ends within the insulated joint. This requirement will vary widely with the motion sensor frequency, ballast conditions and the quality of the motion sensor approach terminating shunt. Where an application of this type is encountered, the motion sensor manufacturer should be consulted to determine where a blocking unit should be used. Where blocking units are required, refer to Appendix B for appropriate US&S part number. Figure 3-1 illustrates two examples of blocking unit application.
6188, p. 3-1
BLOCKS
' __ .. U_N_IT_
Figure 3-1. Blocking Unit Application
MICROCODE N451082·3901 OR ·3903
The calculations for the effective block lengths in Figure 3-1 are:
Block A:
Actual Block Length TWo Blocking Units Effective Block Length
Block B:
Actual Block Length one Blocking Units Effective Block Length
Position 3 - Track circuits of 11,000 to 13,000 ft. (effective block length).
Position 2 - Track circuits less than 11,000 ft. (effective block length).
CAUTION
THE TRACK I/0 PCB RECEIVER ADJUSTMENT MUST BE PROPERLY SET ACCORDING TO THE TRACK CIRCUIT EFFECTIVE LENGTH, OTHERWISE THE MICROCODE MAY BE UNABLE TO DETECT A BROKEN RAIL OR 0.06 OHM SHUNT CONDITION.
Make certain on dual-function Microcode units which control track circuits of different lengths, that each Track I/0 PCB is reinstalled on the correct side of the card file after setting the receiver adjustment switch.
Table 3-1 on the following page gives the recommended maximum operating distances for Microcode with different rail weights, types of rail and minimum ballast conditions. The distances are given in feet and include 0.1 ohm track lead loop reistance at each end of the track circuit. These distances must be reduced by 1000 feet for each 0.1 ohm additional track lead loop resistance, and 1000 feet for each blocking unit used in the track circuit. This table includes corresponding Track I/0 receiver sensitivity switch settings.
6188, p. 3-2
Continuous Welded
100 115 118 126 132 136 140 142 152 155
Booded
100 115 118 126 132 136 140 142 152 155
2
Pos. 13 Pos. 12
10,000 8000 10,000 8000 10 ,000 8000 10,0~0 8000 10,000 8000 10 ,000 8000 10,~oo 8000 10,000 8000 10 ,000 8000 10,000 8000
. 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000 9,000 7000
Minimum Ballast Resistance (Ohms/1000 ft.)
3 4
Pos. t3 Pos. 12 Pos. 13 PO&. t2 Pos. t3
12,000 10,000 15,000 13,000 16,000 13,000 11,000 15,000 13 ,000 16,000 13,000 11,J)OO 15,000 13,000 17,000 13 ,000 11,000 15,000 ll,000 17,000 13,000 11,000 15,000 13,000 17,000 13,000 11,000 16,000 14 ,000 18,000 13,000 11,000 16,000 14,000 .18,000 l3 ,000 11,000 16,000 14 ,000 18,000 13,000 11,000 16,000 14 ,000 18,000 13,000 11,000 16,000 14,000 18,000
11,000 9000 13,000 11,000 15,000 11,000 9000 l3 ,000 11,000 15,000 11,000 9000 l4 ,000 12,000 15,000 12,000 10,000 14,000 12,000 16,000 12,000 10,000 14,000 12,000 16,000 12,000 10,000 14 ,000 12,000 16,000 12,000 10,000 14 ,000 12,000 16,000 12,000 10,000 14,000 12,000 16,000 12,000 10,000 14,000 12,000 16,000 12,000 10,000 14 ,000 12,000 16,000
EB c z 6 z I ::. n %
• en 5 6 a
w I .....
Pos. 12 Pos. 13 Pos. t2 . 3: !J• 0 .., 0 0
14,000 18,000 .l.6,000 0 0.
14,000 19 ,000 17,000 ID
15,000 19,000 17,000 15,000 19,000 17,000
3: OJ ><
15,000 19,000 17,000 tJ• a
16,000 19,000 17 ,000 i 16,000 19,000 J..7 ,000 8 16,000 20,000 18,000 16,000 20,000 .l.8,000 16·,000 20,000 18 ,ooo
.., OJ 0 ~
I:"' ID ::,
14 ,000 17,000 15,000 '° CT 14,000 17,000 15,000 14,000 17,000 15,000
:::,- c (4 z
6 14 ,000 17,000 J.5,000 14 ,ooo 17 ,ooo 15,000 14 ,000 J.7,000 J..5,000
z I ;4
• en a z > ,-
EB
UNION SWITCH & SIGNAL UNION SWITCH 6 SIGNAL m 3.4 BATTERY AND CHARGER
A Microcode unit requires one 12 volt battery for operating power in all applications. Battery specifications are as follows:
voltage range: 9.8 to 16.2 volts de, (12 Vdc nominal)
Voltage ripple: 0.5 volts, P-P
WARNING
A SUSTAINED VOLTAGES OP 18 OR MORE VDC MAY DAMAGE THE SECONDARY SURGE SUPPRESSOR AND/OR MICROCODE UNIT.
Table 3-2 below lists the different levels of current draw on the battery with different Microcode output configurations:
Table 3-2 Microcode Battery current Draw
Battery Voltage Output Configuration current Draw
16.2 Vdc 12 Vdc·-load (no lamps) 2.0 amps
12.0 Vdc 12 Vdc load (no lamps) 2.5 amps
9.8 Vdc 11.l Vdc (no lamps) 2.75 amps
16.2 Vdc Two 18-W lamps @ 10 V* 5.0 amps
12.0 Vdc Two 18-W lamps @ 10 V* 6.5 amps
9.8 Vdc Two 18-W lamps @ 8.4 V* 6.5 amps
16.2 Vdc Four 18-W lamps @ 10 V* 8.5 amps
9.8 Vdc Four 18-W lamps @ 7.7 V* 10.0 amps
12.0 Vdc Four 18-W lamps @ 10 V* 11.0 amps
*Through Dropping Resistors
The battery charger should be a constant voltage type (due to the wide range of current draw of the unit with varying track and output loading). A recommended model is the US&S CVF Battery Charger, part number J726263.
6188~ p. 3-4
UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL E!3 3.5 WIRING AND SURGE PROTECTION
3.5.1 connection to Weidmuller Plugs
The maximum wire gauge which may be used in Weidmuller plugs 1, 2, 34, 35, 67 and 68 (battery and track lead connections) is t9 AWG. All other plugs (relay logic connections) can take up to 114 AWG. Wires should have at least 1/2 inch of insulation removed for reliable electrical contact in the plug. The conductor should not be •tinned•. The upper Weidmuller .wire locking screw should be tightened to 15 inch-pounds with a flat blade screw driver and the wire pull-tested. Do not loosen the lower wire locking screw. completed wiring should be bundled with wire ties; the ties may be laced through the clips on the top of the card file for orderliness. Table 3-3 lists the Weidmuller plug designations:
~ Designation
0 l 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17
Ext. Dr.(+) Track+ A Track - A output lA+ output lA­ Output 2A+ output 2A­ output 3A+ Output 3A­ output 4A+ output 4A­ OUtput SA+ Output SA­ Output 6A+ output 6A­ output 7A+ Output 7A­ Output SA+
3.5.2 Battery
No. Designation ~ Designation ~ Designation
18 Output SA- 19 output 9A+ 20 Output 9A- 21 Output lOA+ 22 Output lOA- 23 Input lA 24 Input 2A 25 Input 3A 26 Input 4A 27 Input SA 28 Input 6A 29 Input 7A 30 Input SA 31 Input 9A 32 Input lOA 33 Drive(+) 34 + Battery 35 - Battery
36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
CAUTION
Drive(-) Input lB Input 2B Input 3B Input 4B Input SB Input 6B Input 7B Input SB Input 9B Input lOB output lB+ Output lB­ Output 2B+ Output 2B­ Output 3B+ Output 3B- 0Utput 4B+
54 Output 4B- 55 output SB+ 56 Output SB- 57 Output 6B+ 58 Output 6B- 59 Output 7B+ 60 Output 78- 61 Output 88+ 62 Output 88- 63 output 98+ 64 output 98- 65 output lOB+ 66 output lOB- 67 Track+ B 68 Track - B 69 Ext. Dr. (-} 70 CPS V-
TURN OFF MICROCODE CIRCUIT BREAKER BEFORE INSTALLING BATTERY WIRING, OTHERWISE EQUIPMENT DAMAGE MAY RESULT.
Wiring between the Microcode unit and its battery should be kept as short as possible and away from other wiring which may be subjec_t to large voltage surges which may induce voltage ripple (noise) into the system. Following are battery wiring specifications:
6188, P• 3-5
UNION SWITCH & SIGNAL
Loop resistance of leads:
15 ft. (maximum)
30 ft. (maximum)
0.5 ohms (maximum)
The battery circuit must be protected with lightning arresters and secondary surge suppressors. US&S recommends use of the USSP-11 secondary surge suppressor (N451552-0503), which is intended to provide both forms of protection. Battery wiring to Microcode is shown in Figure 3-2.
3.5.3 Track Leads
Wiring between the Microcode and track leads should be kept as short as possible, and should incorporate US&S lightning arresters, as shown in Figure 3-2. Following are track lead wiring specifications:
Wire gauge into Weidmuller plugs ( 1, 2, 67, 68) :
Loop resistance at leads:
0.1 ohms (maximum)
Length of track lead wiring is only constrained by the 0.1 ohm loop resistance limit (maximum from unit to track and back). It is usually necessary to use a heavier gauge wire than 19 AWG to reach the tracks at or under 0.1 ohm. Heavier wire should be terminated at the lightning arresters ahead of the Microcode, and 19 AWG used between the arresters and the Microcode.
CAUTION
MICROCODE TRACK LEAD WIRING MUST BE INSTALLED SO AS TO ESTABLISH ALTERNATING POLARITY ON THE RAILS BETWEEN BLOCKS. IF POLARITY IS NOT ALTERNATED, THE SYSTEM WILL BE UNABLE TO DETECT A FAULTY INSULATED JOINT CONDITION.
3.5.4 Relay Logic
Relay logic wiring specifications are as follows:
Wire gauge into Weidmuller input, input-drive and output plugs (3-33, 36-66):
Loop resistance at leads on input and input-drive lines:
Loop resistance at leads on output lines:
6188, P• 3-6
50.0 ohms (maximum)
75.0 ohms (maximum)
INSULATED JOINT
GAUGE I -----o 2 68 0--1-----,
#9AWG (MAX)
#9AWG (MAX)
I
USUALLY GREATER THAN #9 0 5 640
"':" #14 AWG MAXI
8 610
0 11 580
013 560
015 54 WEIDMULLER CONNECTORS:
016 53 1. 2. 67. 68 • TRACK LEADS
'3 · 22. 47 . 66 • OUTPUTS 017 520 23 · 32. 37 · 46 = INPUTS 018 510 33 "' INPUT DRIVE 1 36 • INPUT DRIVE 2 019 500 34 • BATTERY + 020 490 35 • BATTERY -
021 480
022 470
23 460
24 450
25 440
26 430
27 420
028 41
029 40
030 39
031 38
032 37
1-,,:_ _______ _. ..... #9AWG (MAX)
Figure 3-2. Microcode Battery, Track Lead and Relay Logic Wiring
m UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL m The resistance of the wiring and the relay contacts between the driver connections and the inputs from the relay logic should be kept as low as possible. Excessive resistance can cause a loss of signal, in which case the Microcode would interpret the inputs as failed.
All Microcode inputs must be hard-wired to one or the other input drivers, even if they are not used. The card file part number determines which inputs require connection to a driver line. These are listed in Table 3-4:
Table 3-4. Microcode Inputs Requiring Driver Connections
card File Part No. Active Inputs
N451082-3901 lA-SA, lB-SB
N451082-3906 Not used
* - Unit with Master (Side A) side functional only. ** - Unit with Slave (Side B) side functional only.
All relay front contacts must be wired to input-drivel and back contacts to input-drive 2. All unused inputs must be wired to input-drive 2, otherwise extraneous relay-energized outputs will be generated by the receiving Microcode. Note in Figure 3-2 that unused inputs are bus-connected to input-drive 2. In certain instances, an input may be cross-connected with an output on the opposite side of the unit.
CAUTION
DO NOT USE SNUBBING CAPACITORS ON RELAY CO'ILS DRIVEN FROM MICROCODE. CAPACITOR SNUBBING MAY RESULT IN ERRONEOUS ENERGIZATION OP OUTPUT RELAYS.
3.6 POWER-UP AND INITIAL DIAGNOSTICS
Before the circuit breaker is turned on, equipment and wiring should be given a final check to insure proper termination, resistance limits etc. This includes the proper polarities for the battery connections (+de in Weidmuller plug 34, -de in plug 35), all active inputs wired to the input drivers, and correct receiver sensitivity adjustments on the Track I/0 PCB's.
When power is connected, the single LED on the CPU PCB (slot E) should go on, then off, indicating system power is on.
Each Microcode unit is equipped with a power-on diagnostics program. The diagnostics is designed to verify the operating condition of the unit when powered up (reset). Local wiring to and from the unit is checked to insure
6188, P• 3-8
m UNION SWITCH a SIGNAL UNION SWITCH a SIGNAL
(1) that all inputs are connected to Input Drivel or Input Drive 2 and that (2) outputs are not shorted together. Each circuit board is also tested internally. A single LED on the CPO board is used to indicate the completion of each test. The number of flashes of this LED can be used to isolate a problem to a PCB or lqcal wiring to that PCB. To further isolate the problem to a board or adjacent wiring, use spare PCB's. If spares are not immediately available, swap boards between opposite sides of the unit. If the problem persists, the problem exists outside of the board. Refer to section s.1.2 for system test procedures whe~ board swapping does not resQlve the problem.
To verify that the CPO diagnostics has located a fault, reset the breaker to restart the diagnostics. The Microcode cannot be put into operation until the apparent fault is removed. Refer to section V for interpretation of the diagnostics indications and troubleshooting procedures.
3.7 FINAL SYSTEM VERIFICATION
NOTE
Microcode units in the adjacent track circuits must be fully connected and pass power-up diag­ nostics before the subject unit can be verified as operational.
After passing the diagnostics program, the Microcode LED's should show the following patterns:
a. The CPO PCB LED will go off.
b. The Track I/0 PCB LED's will flash as the track circuit(s) become •synchronized•.
c. on the relay-interfacing Microcodes (all units except ·N451082-3906), the CPS PCB LED will come on and the LOgic I/0 PCB(s) LED's will light steadily showing the state of the various relay logic inputs and outputs.
The logical way to evaluate Microcode operation is to examine Side A and Side a as independent systems. Note on unit N451082-3903 that checks concern both the functional side and inactive sides of the unit.
3.7.2 verifying Master Side communications (All Units Except Slave Type N451082-3903)
3.7.2.l Synchronization of the Track Circuit
In the unsynchronized mode, the· Master side Track I/0 LED's will flash about once every second. Each •flash• consists of a rapid, alternating burst between the LED's. When the track circuit is synchronized, the LED's should show the rapid flash pattern continuously.
6188, P• 3-9
ffi UNION SWITCH Ii SIGNAL UNION SWITCH a SIGNAL
The Master side Track I/0 LED's should not take more than five seconds to go into the synchronized pattern after the start' of the initial, unsynchronized transmission. If the track circuit fails to synchronize (LED's hold in the slow flash state) and the receiving Microcode is known to be working properly, a fault such as a bro.ken rail or poor ballast probably exists in the track circuit itself. Refer to section V for recommended track circuit checking procedures.
3.7.2.2 Relay Logic Indications (Not Applicable to Unit N451082-3906)
When the unit switches from the diagnostic to unsynchronized mode (Track I/0 LED's in slow flash mode), Logic I/0 LED's 6-10 (lower on PCB) should display the state of the local relay logic inputs to the unit. LED's 1-5 should be off. When the track circuit becomes synchronized, LED's 1-5 should display the state of the relay logic inputs to the transmitting Microcode. This indicates proper communication of the relay code through the track circuit.
If no LED'S among 1-5 light upon track circuit synchronization, one of two problems may be present. Either none of the inputs to the transmitting Microcode are energized (unlikely), or the track leads to the local Microcode are switched. The leads on Weidmuller plugs 1 and 2 may be switched to see if any Logic I/0 LED's (1-5) come on. If this procedure works, track lead connections must be rechecked at all points to insure that polarity is being alternated between blocks. Refer to section v.
3.7.3 Verifying Slave Side communications (All Units Except Master Type N451082-3903)
3.7.3.1 Synchronization of the Track circuit
In the unsynchronized mode, the Slave side Track I/0 LED's should be dark. When the Microcode at the other end of the track circuit transmits and the local Microcode acknowledges, the Track I/0 LED's should flash continuously (same manner as the Master Track I/0 LED's after synchronization). If the Track I/0 LED's flash momentarily, go dark for about one second, then flash erratically, the signal from the transmitting Microcode may be too weak to be properly received. The track circuit should be examined for a short or open circuit condition. Refer to section V for recommended procedures.
3.7.3.2 Relay Logic Indications (Not Applicable to Unit N451082-3906)
When the unit switches from the diagnostics to the unsychronized mode, Logic I/0 PCB LED's 6-10 (lower) should display the state of the local relay logic inputs to the unit. When the track circuit becomes synchronized, Logic I/0 LED's 1-5 (upper) should display the state of the relay inputs to the transmitting Microcode at the other end of the track circuit. This indicates proper transmission of the relay code through the track circuit.
If no LED's among 1-5 light upon track circuit synchronization, switch track leads on Weidmuller connectors 67 and 68. If this procedure works, track lead wiring must be rechecked at all points to insure that polarity is being alternated between blocks. Refer to section v.
6188, p. 3-10
UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL ffi 3.7.4 cross Checking Relay Logic I/0
once all Microcode units are verified operationalr the configuration of the relay inputs at one end of the track circuit should be checked against the outputs at the other end, in both directions. The Logic I/0 LED's 1-5 of the transmitting unit should match exactly the Logic I/0 LED's 6-10 of the receiving unit. The complete PCB and LED cross reference list appears in Table 2-3.
6188, P• 3-11/12
4.1 INSPECTION
Microcode units should be periodically inspected in conjunction with inspections of related equipment, in accordance with the customer's preventive maintenance schedule. The inspection should include the following:
1. Make certain all Weidmuller terminal strip connections are tight and that wires are free of nicks, cuts and fraying.
2. Make certain that all Microcode systems wiring is also in good condition.
3. Check that the card file front cover is secure. If loose, remove cover and check that all PCB's are fully inserted in their slots.
4. Check the mounting of the card file and tighten any loose fasteners.
4.2 CLEANING
Do not use any kind of solvents, detergents or abrasive cleaners on the Microcode card file or internal components. Accumulated dust and dirt should be removed with a vacuum cleaner, if possible. Remove PCB's before using vacuum cleaner inside card file.
6188, p. 4-1/2
5.1 FIELD
5.1.1 General
SECTION V TROUBLESHOOTING AND MAINTENANCE
UNION SWITCH It SIGNAL m
Field repairs on Microcode consist of tightening connections, repa1r1ng system wiring, correcting track circuit problems and replacing faulty PCB's with spares. Vital PCB's which prove to be faulty should be returned to US&S for repair. To obtain the proper returned material report form (RMR) contact your US&S district sales representative or the sales manager listed on the back cover of this manual.
5.1.2 Troubleshooting Procedure
The Microcode field troubleshooting procedure is provided in flowchart form, as shown in Figure 5-1. Where the procedure calls for troubleshooting of the track, use a brush recorder to take a reading of the track voltage at the Microcode. Go to section 5.1.3 for analysis of recorder results. Table 5-1 below is a quick-reference diagnostic chart for the CPU diagnostics routine:
Table 5-1. CPU Diagnostics Quick-Reference Chart
No. of Flashes ·Problem Area
1
2
3
4
5
6
7
8
9
CPU PCB
CPS PCB, CPU PCB (PIA - 500 Hz), either inner Logic I/0 PCB
Left inner Logic I/0 PCB (inputs), input wire off inputs 1A-5A, right inner Logic I/0 (drive circuit), CPU PCB (PIA)
Right inner Logic I/0 PCB (inputs), input wire off inputs lB-SB, left inner Logic I/0 (drive circuit), CPU PCB (PIA)
Left inner Logic I/0 PCB (outputs), low CPS voltage, CPU PCB (PIA), left Surge supression PCB.
Right inner Logic I/0 PCB (outputs), low CPS voltage, CPU PCB (PIA), right Surge Supression PCB.
Left Track I/0 PCB, CPU PCB (PIA), left surge supression PCB.
Right TRack· I/0 PCB, CPU PCB (PIA), right Surge supression PCB.
.::,oo c:_,
U1 I .... . 3: ..... 0 ..., 0 0 0 0, (I)
~ fl> rr m 1-,1 ..., 0 c tT .... (I) fl> O'" 0 0 IT ..... ::,
I.Q
I START
BOARD
RESET
REPLACE CARO FILEOR
MOTHER· BOARD BAD
(PAGE ) .
(1) REPLACE SLOT C LOGIC IIO OR (21 REPLACE SLOT F LOGIC 1/0 OR (3)CHECK INPUT WIRING ANO RELAYS
OR t<t1CHECK 12V BATT.(MAX. O.SV RIPPLE)
OR tSI REPLACE CPU BO.
·use EXTENDER PCB
FUSES
EE c z 0 z I ~ ::c • en i5 z > r-
c z 0 z I ~ ::c • en a z > r-
EE
""' 0 c: C'" ..... ID OI :::r 0 0 rt' I-'· :::,
o.Q
"O
..... (') 0 :::,
RESET
RESET
RESET
SIDE A INPUTS (IA·SAI RESET
CHECK WIAING ANO• RELAYS TO
SIDE 8 INPUTS 118-581 RESET
•CHECK FOR CONTINUITY ACCORDING TO WIRING DIAGRAM.
( SYSTEM TROUBLESHOOTING, Page 2 I
REPLACE CPU RESET
REPLACE CPU RESET
REPLACE CPU RESET
REPLACE CPU RESET
Q i r-
c z 6 z I ~ :z: • en Q z > r
EB
{J) ~ (I> rt 11>. 51
8 ., 0 c: O" ..... 11) (I> ::::,- 0 0 rt
IN .... :::,
...... n 0 :::,
RESET•
RESET'
CHECK WIRING TO SIDE A XFMR · RESET
CHECK WIRING TO SIDE B XFMR • RESET
• OHL Y ONE OF THE TWO TRACI< CARDS MUST HAVE ITS JUMPER IN J1 (THE OTHER WILL HAVE ITS JUMPER IN .14)
HALF UNITS WILL HAVE ONLY ONE TRACK CARO WITH THE JUMPER IN J1.
y
c z i5 z I ~ .. (It
Cl z > r
U1
3: .... 0 l'1 0 0 0 0. II>
Cll '< Ul ('1' II> a 8 l'1 0 c: 0- i- II> Ul ::r 0 0 ('1' .... :,
'° 'ti l'1 0 0 II> 0. c: l'1 II> ...... g :, rt"
0. G
TO PAGEi
GO TO OTHER END OF TRACK CIRCUIT AND SEE IF CODE + BEING TRANS· I Y MITTED (I.E. ALLOW INPUTS TO UNIT TRANSMITTING FROM OTHER ENO,.
N
RCVR AMP i?! 350mVPP AND SIGNAL NOT
I SYSTEM TROUBLESHOOTING, Page 4 f
TROUBLE IS OUTSIDE CARD FILE. CHECK >-------------------1 CONNECTIONS TO WEIOEMULLERS, HOUSE/CASE WIRING OA WIRING TO RELAYS
DISOONNECT OUTPUT WIRES
REPLACE CARD FILE
ANDIOR SIGNAL LAMPS.
A
EXCESSIVELY DISTORTED. I y .. , SEE TYPICAL WAVEFORM. NO INTERFERENCE (I.E. 80Hz OR AFO, ETC.)
N ADJUST TO COARECT SENSITIVITY POSITION
N
CALL UNION SWITCH ANO SIGNAL FOR HELP
TRACK CIRCUIT SYNCHRONIZATION IS IMPLIED BY A CONTINUOUS FLASHING OF THE LEDS ON THE TRACK 1/0 BOARD.
EB c z 6 z I ~ :z: .. u,
i5 i ,-
c z 6 z I ;i ::c .. u, i5 z )I, ,-
EB
c: I .., °' II)
(I)
'< fl) rt' II) a 8 .., 0 c: O" .... II) fl) ::,- 0 0 rt' ..... :::,
IQ
........ g :::, rt'
CALLUS&S
RECORD TRACK VOLTAGE AT MICROCODE AND SEE IF SLAVE IS RESPONDING TO A MASTER XMIT.
y
N
IS RCVR AMPLITUDE
CHECk VOLTAGl • TRACKS WITH SIMPSON MOOEL NO SNOULO SEE FLUCTUATIOH ON UV A·C SCALE AT MICROCODE TRANSMISSION RATE.
N
CHECK CONNECTIONS TO TRANSFORMER FROM TRACK
~ y I RECORD TRACK VOLT AGE AT "Jo""----•""- CODE WITH BRUSH ......__.
350mVPP AND SIGNAL NOT EXCESSIVELY DISTORTED? SEE TYPICAL MESSAGE WAVE· FORM ON PAGES (4-8 & 4·111?
•CHECK VOLTAGE AT TRACKS WITH SIMPSON. MODEL NO. SHOULD SEE FLUCTUATION2SVON IN I AC SCALE AT MICRO· 1----4"1 CODE TRANSMISSIOH RATE.
y
CIRCUIT START
START
m c z 0 z I ~ :z: .. en a I ,-
c z 0 z I ~ .. en i5 z ),, ,-
m
m UNION SWITCH 6 SIGNAL UNION SWITCH & SIGNAL m 5.1.3 Track Voltage Readings (Brush Recorder)
US&S recommends a brush recorder or equivalent to check the track codes generated by the Microcode. use Figures 5-2 through 5-6 to calibrate the recorder.
The following tabulation is provided for interpretation of the recorder plots:
Symptom
Transmitted signal at Master is low in amplitude and/or received signal is low at Slave.
Excessive 60-cycle interference.
Problem Areas
a. Non-insulated gauge rod.
e. Train on siding or turn-out shunting track.
f. Other equipment (AFO, motion sensor etc.) with short across rails.
g. switch not bonded correctly.
Unbalanced track circuit or interference induced from external source:
a. Track leads connected to wrong side of joints.
b. Siding or turn-out missing insulated joints.
c. Bond wires missing.
e. Broken rail.
a. Track leads swapped (make certain track polarity is swapped on each alternate track circuit.
b. Rail connections not made.
c. Broken rail
6188, p. 5-7
UNION SWITCH & SIGNAL ffi
Unit needs blocking unit or blocking reactor.
Figure 5-2 shows a typical example of an unsynchronized track circuit, as plotted by the brush recorder. Amplitude is approximately 3.2 VPP, open circuit. The transmit pulses are approximately 2.0 VPP when connected to the track.
TRANSMIT TRANSMIT
Figure 5-2. Typical Waveform: unsynchronized T.c.
Figure 5-3 shows a typical signal on a synchronized track circuit. The signal consists of a group of transmit pulses, followed by a group of receive pulses, then transmit pulses etc. in a continuous, alternating pattern. The transmit pulses will be approximately 2 VPP amplitude. The ampltitude of the receive pulses is dependant on track circuit length and ballast conditions, but should be at least 350 MVPP and no larger than 2VPP.
TRANSMIT
Figure 5-3. Typical Waveform: synchronized T.c.
A waveform from a synchronized track circuit with 60 Hz interference is shown in Figure 5-4 on the following page. The 60 Hz amplitude is approximately 400 mV: the Microcode signal can withstand 2 VPP of 60Hz interference.
6188, P• 5-8
Figure 5-4. Synchronized T.C. With 60 Hz Interference.
A typical signal on an unbalanced track circuit is shown in Figure 5-5. The signal contains no recognizable code format and has the appearance of a modulated 60 Hz signal, suggesting a possible broken or open insulated joint.
Figure 5-5. Typical Waveform: Unbalanced T.c.
The top waveform in Figure 5-6 shows the effect of high frequency interference from a motion sensor on a synchronized track circuit, without blocking unit filtering. The bottom waveform shows the same signal with the blocking unit tuned to the motion sensor frequency. Some of the interference is eliminated.
RECEIVE TRANSMIT RECEIVE
6188, P• 5-9
m UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL m 5.2 SHOP MAINTENANCE
s.2.1 General
This section covers the troubleshooting of the individual Microcode printed circuit boards. The program for each board includes list and/or assembly of test equipment, set-up of the test equipment, the test procedure and close-out. These procedures should only be conducted by personnel qualified and equipped to perform electronics maintenance. In the. case of the CPU board, a knowledge of digital logic circuits is essential. Refer to Appendix A, Parts List, for the component layouts and specifications for each circuit board.
5.2.2 CPU PCB (N451204-3301}
s.2.2.1 Detailed Circuit Description (See Figure 5-7)
ICll is the board's microprocessor chip, responsible for all logical decisions and calculations. IC's 9 and 10 are the two EPROM chips which store the system software for the programmed operation of the Microcode. Each has a capacity to store 4K bytes and is linked to the microprocessor by a 12-bit address bus and an 8-bit data bus. IC's 7 and 8 are the two RAM chips which are used for temporary data storage during program operations. These RAMS provide storage space for lK byte and are linked to the microprocessor by a 10-bit address bus and an 8-bit data bus. Since the RAM's are only capable of storing 4 bits of data in each memory space, they are connected in parallel and enabled simultaneously. An 8-bit word is stored in RAM memory by storing the lower 4 bits (DO - 03) in IC8 and the upper 4 bits (04 - D7) in IC7.
IC6 is the PTM timer chip. It consists of three separate 16-bit counters, of which only two are used. Timer 3 is used to trigger the watchdog network when its counter times out to a hexidecimal zero. (The watchdog network consists of 03, 04, C16, R9, RlO and two logic inverters from IC14.) Timer 1 is used to generate a pulse on the IRQ output of IC6, which is tied to the IRQ of ICll, the microprocessor. (A pulse on this line causes the microprocessor to jump from the Executive Loop to the Interrupt Routine. When the IRQ is complete, the microprocessor automatically returns to the Executive Loop.)
IC's 1 through 5 are the five PIA's which interface all inputs and outputs to the other boards in the Microcode card file. Each PIA contains two ports, •A• and •a•. Each port consists of eight bi-directional lines for I/0 operations. Each one of the 80 total PIA lines can be independently set, under software control, as either an input or an output. The PIA's are linked to the microprocessor by an 8-bit data bus and three address lines (to each PIA) for register selection. see Table 7-1 for a complete cross-referenced listing of all PIA lines.
IC12 is a one-of-eight selector device. It has eight outputs, of which only one may be selected at a time. All outputs are normally in the •high• logic level state. The decoder has three inputs which are connected to A12-A14 (address bus) on ICll, the microprocessor. The three independent inputs are
6188, P• 5-10
ffi UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL
decoded to select one of the eight outputs (YO - Y7) and cause its output votage to go to the •1ow• logic level state. Table 5-2 below gives a summary of inputs, outputs and their functions on IC12.
Inputs
Data
outputs
H H H H H H H L
H H H H H H L H
H H H H H L H H
H H H H L H H H
H H H L H H H H
H H L H H H H H
H L H H H H H H
L H H H H H H H
Function
Selects PIA's 1 or 2 (!C's 1 or 2)
Selects PIA's 4 or 5 (!C's 4 or 5)
Selects PIA'S 3 (!C's 3)
Selects EPROM 1
Selects EPROM 2
In the above table, •ff• (high logic level) is greater than 2.4 Vdc, while •L• (low logic level) is less than 0.7 Vdc. Only one output is •1ow• under each possible combination of the three inputs. In addition, each output is •1ow• only if its respective combination of inputs exists.
IC13 is a dual, 3-input NAND gate. The two gates are used in conjunction with the microprocessor's R/W and E lines to control the direction of data from the RAM. IC14 is a hex (6) inverter chip (the output is the opposite logic level of the input).
XTAL-1 is a 4 MHz crystal oscillator which creates the time base clock for the entire CPU board. capacitors Cl and C2 smooth out the sine wave voltage (approx. 6 volts peak-to-peak across pins 38 and.39 of ICll) output of the oscillator. The microprocessor internally divides the 4 MHz down to 1 MHz. :he 1 MHz is outputted as a Oto 5 Vdc square wave on pin 34 of ICll. This ·l .·iHz square wave is used as the time base for the system. It decrements the counters in the timer chip (IC6) and also gates all of the information flow between the microprocessor and the peripheral devices.
6188. p. 5-11
ffi UNION SWITCH & SIGNAL UNION SWITCH & SIGNAL ffi When the microprocessor pre.e_ares to send data to a peripheral device, lt puts out a •1ow• level on the R/W line (pin 32). This line is connected to all of the peripheral devices and simply determines the state of the internal bi-directional buffers on their data lines. When the microprocessor prepares to receive data from a peripheral device, it puts out a •high• logic level on the R/W line. This changes the direction of the data buffers and allows data to come from a peripheral device to the microprocessor.
The R/W line is connected to the •write-enables• of the RAM's (!C's 7 and 8) through IC13. To write information into a RAM memory location, the MEMW line (connected between pin 8...2!._IC13 and pin 10 of IC's 7 and 8) must be at a •1ow• logic level. For MEMW to be at a •1ow• logic level, the R/W line must be held •1ow• and the E line (1 MHz clock Q2) must be •high•. When the •E• line is •1ow•, no data is written into any memory.
A critical operation of the CPU board circuits is the reset function. When a reset is ordered on the microprocessor (•low• logic level present on pin 37 of ICll), the microprocessor is instructed to retrieve information from memory location FFFF on EPROM 2 (the last memory location on that chip). This location contains the procedure to start the reset operation. The lines are also hard-wired to the five PIA's and the PTM. When a reset is called, all of the PIA I/0 lines are disabled and must be reinitialized, and all counters in the PTM are set to zero. The PTM outputs are also disabled. The microprocessor can be reset in two different ways, including the initial system power-up and in response to a possible system failure).
The moment +5 Vdc power is applied to the CPU board, the voltage on pin 3 of IC14 is O (corresponding to a •1ow• logic level). This level is inverted at pins 4 and 5, and then inverted again to produce the •1ow• logic level at IC14, pin 6, which performs the reset operation. The CPU remains in the reset mode until the voltage at pin 37 rises to a •high• logic level. At a specific interval after +5 Vdc is applied to the CPU board, capacitor C3 begins to charge through Rl. The length of the interval is determined by the values of Rl and C3). As C3 charges, the voltage at pin 3 of IC14 rises to a •high• logic level. This produces a •high• logic level at the RESET line and takes the microprocessor out of the reset mode, allowing program operations to begin.
If at any time during program operation PTM timer 1 decrements to zero, its output 03 will go •high•. This is called the •watchdog• output. When the watchdog goes •high•, a possible system failure has occurred. The watchdog output is connected to the anode of D3 and remains •high• until the system as a whole is reset. A •high• logic level at the anode of D3 will result in a •high• logic level also on pin 5 of IC14. It is inverted to a •1ow• logic level at the RESET line.
However, the PTM (IC6) resets faster than the microprocessor. Ordinarily, as soon as the timer resets, the watchdog output would fall •1ow• again and the RESET line would rise to a •high• logic level, failing to reset the microprocessor. A delay circuit (consisting of another inverter in IC14, R9, Cl6 and D4) is incorporated to avert this situation. As soon as the RESET line goes •1ow• (due to the watchdog), output is removed, attempting to make the RESET line go high again. However, when the ·RESET goes low, pin 8 of IC14 goes •high• and charges Cl6. This develops a •high• logic level across R9. A •1ow• level is kept on the RESET line until Cl6 is discharged enough to bring the voltage at R9 low again. R9 and Cl6 were chosen to provide a time delay of 1 millisecond, giving the microprocessor ample time to reset.
6188, P• 5-12
AO CSt CSI Al •SY
16
#.0
#.I
A4
Toso Tosi "iosf fi'So EPSi
'-""--'-IC!_,· . A 9
CA41,~42.841.842J.-.-+----~t~"-,----+----~----+-----.------<t-------.----~----.------o------.--- -'iY
,,., lj):1,., 0,1..- 0,1..- 0.1..- 0.1..- ~0.1..- 0,1.- 0.1.- 0.1..- .:_.:.1.- 0.1.-1 .c• I cs I C6 I CT I ce I cs :1 o I c11 I c1 z I c1 3 :, • 1 ca s
(A39,A40,,~J9,B40,J~_.----...._----,._---_.~---.-..-----+----....,.----.._-----<>-----+----~----+----,~
£ FOR R£f. ONLY. IC, II ICIO CIU.O fOl'I ON ASST, DWG,
Figure 5-7. CPU PCB Schemacfc- Diagram
6188, p. 5-1:3
m UNION SWITCH & SIGNAL UNION SWITCH a SIGNAL m 5.2.2.2 Test Procedure comments
The CPU board test procedure is divided into two sections. The first section covers the microprocessor chip and its immediate supporting devices such as crystal XTAL 1 and the reset circuitry. The second section covers all of the peripherals such as the RAM's and PIA's. The microprocessor must be working properly to enable the tests on the peripherals. During the microprocessor and peripherals checks, test EPROM's are used in place of the regular service EPROM's. The maintainer may swap the existing EPROM's with good spares (prior to conducting the full-scale tests) to confirm that they are not the source of the board's problem. care must be taken in obtaining spare EPROM's since software is modified according to application of the unit. Check Figure A-2 (Appendix A, Parts List) for the proper part numbers and locations of the EPROM's on the board.
5.2.2.3 Reconunended Test Equipment
DC Power Supply
7-Segment Display (Recommended model: General Instruments· MAN84GI)
card connector
Specifications
- Freq. range: de to 30 MHz - Time base: .03 microsec. to 12
sec./div. - Time base accuracy: 11 - Dual channel, alternate operation - ac or de coupling - Delayed sweep - External sweep mode - Voltage accuracy: ±. 31 - sensitivity: o.05V/div.
- Voltage range: - current range:
- 2K x 8, UV-erasable, US&S N451575-0608 and N451575-0609
Full hexidecimal
- 124, PVC
6188. p. 5-15
m UNION SWITCH a SIGNAL UNION SWITCH a SIGNAL m 5.2.2.4 Test set-Up
a. Remove PCB from card file (front panel fuse disconnected).
b. Unsolder•+• end of ju~per JPl.
c. connect test jumper between pin marked •Jumper 1• on the PCB to test point A33 on test fixture.
d. Remove the two regular service EPROM's and substitute test EPROM N451575-0608 in socket IC9 and -0609 in socket IClO. Tag the regular EPOM's prior to removal to record proper locations. Keep regular EPROM's away from ultra-violet sources.
e. set-up test equipment according to Figure 5-8 (keep power supply off).
5.2.2.5 Test Procedure
Operation
1. Connect 5 Vdc power supply.
2. connect scope GND to power supply•-• terminal, probe to the plus terminal. Then turn on supply.
3. Move scope probe to ICll, pin 39.
4. Move scope probe to ICU, pin 34.
s. Move scope probe to pin 37 on ICll.
6. Turn power supply off.
6188, p. 5-16
Possible Problem Area
4.
5.
6.
4.5 volt (p-p) sine wave with freq. of 4 MHz (period• .25 microsec.)
Scope should show 5 volt (;!:_ 0.7 volt) square wave with frequency of 1 MHZ (period• 1 MHz.)
•Low• logic level (0 volts) should be present on pin 37.
4. ICll microprocessor
ffi UNION SWITCH 6 SIGNAL UNION SWITCH It SIGNAL ffi
a 13 14
1 • A4 85 6 0 b 12 13
• • A5.B6 2 c 9368 c ,, B • • A6.B7 1 B d 10 7
• c • A A7.B8 7 A e 9 6
• R RBO • 0 A3.B4 4 I 15 ,
• BCOTO
• 0 OECOOER/ORIVER PCB • N
• E 16L 3L
8 c • T • 0 • R U+SV "l! =- MICRO-CODE • • • A,B,41,42 ,-• -• + • - ..
44e
- A,B,39,40 ,.. • .. --
CARO CONNECTION WIRING LIST
81-NC" NC"·A8 NC"·A16 823-NC" B2·A1 89-A9 816-A17 824-A24 83-A2. 810-A10 817·A18 B25-A25 84-A3 811·A11 818-A19 B26-A26 BS·A4 812·A12 819-A20 B27·A27 86-AS 813-A13 82o-A21 B28-A28 B7·A6 B14-A14 B21·A22 B29-A29 B8-A7 B15-A15 B22·A23 B3o-A30
*DENOTES NO CONNECTION IS TO BE MADE TO THAT 1/0 PIN
**HOOK JUMPER FROM PIN MARKED JUMPER 1 ON PCB TO PIN A33 ON TEST BOX TEST PURPOSES. (UNHOOK THIS JUMPER WHEN TEST IS COMPLETED.)
Figure 5-8. CPU PCB Test Set-Up
MAN 84
6188, p. 5-17
m UNION SWITCH a SIGNAL UNION SWITCH a SIGNAL m Operation Verification Possible Problem Area
7. Turn power supply back on (to verify reset ci_rcui t).
7. Pin 37 should remain at 7. O volts for about 2 seconds after power is turned on, then switch to 5 volts (•high• level).
Dl, Rl, C3 and/or IC14.
8. Turn off power supply and remove scope.
B. Peripheral Devices
8. 8.
If all CPU board peripheral devices are working properly, the 7-segment display will generate the following sequence of figures:
F - 5 - 4 - 3 - 2 - 1 - 8 - 7 - 6 - A - 9 - F (flashing)
This sequence will not repeat unless the power supply is turned off, then back on.
If anything other than the letter •p• appears at the start of the sequence, then the 7