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HiSIM: Self-Consistent Surface-Potential MOS-Model Valid Down To Sub-100nm Technologies M. Miura-Mattausch, H. Ueno, H. J. Mattausch*, S. Kumashiro**, T. Yamaguchi**, K. Yamashita**, and N. Nakayama** Graduate School of Advanced Sciences of Matter, *Research Center for Nanodevices and Systems, Hiroshima University, Higashi-Hiroshima, Japan, [email protected] **Semiconductor Technology Academic Research Center, Shin-Yokohama, Japan, [email protected] ABSTRACT Surface-potential-based MOSFET modeling is shown to be the right direction. Model parameters reflect the physical device parameters of advanced technologies di- rectly, and can therefore be even scalable with technol- ogy changes. These advantages are demonstrated with HiSIM, the first self-consistent surface-potential model for circuit simulation based on the drift-diffusion ap- proximation and charge descriptions. Keywords: MOSFET Model, Surface Potential, Charge- Based Modeling, Sub-100nm Technology 1 INTRODUCTION MOSFET technology trends are toward further down scaling of device sizes [1]. This will make many new ap- plications possible. Especially important are the com- mercial requirements of miniature and mobile equip- ment including operation at high frequencies (RF). How- ever, MOSFET modeling is facing difficulties to achieve accurate description of such scaled down devices. The reason is that many complicated new phenomena are arising, which are difficult to be described analytically. In the coming SoC era, where different technology con- cepts will be merged on a chip, not only accuracy to reproduce single-device measurements but also robust- ness of model-parameter-meanings and their values are required. MOSFET models have to be available for all arising requirements. We demonstrate here that a charge-based model with the self-consistent surface-potential description offers the basis for successfully coping with the foreseeable challenges. HiSIM (Hiroshima-university STARC IGFET Model) is the first MOSFET model de- veloped according to this concept [2]. 2 BASIC CONCEPT OF HiSIM HiSIM solves the Poisson equation and the current- density equation including both the drift and the dif- fusion contribution analytically. The fulfillment of the continuity equation is still restricted for the first re- lease HiSIM1.0 to the quasistatic approximation. HiSIM adopts two additional approximations: the charge-sheet approximation and the gradual-channel approximation. V gs f SL f S0 V fb Q S Q I Q B Q V th V fb V gs accumulation conduction non-conduction V th (a) (b) Figure 1: Schematics of calculated (a) surface poten- tials and (b) charges as a function of gate-source voltage (V gs ). 1.0 1.5 2.0 φ [V] Position [μm] V gs =1.5V V ds =1.6V φ S0 φ SL φ S0 +V ds 2D simulation channel : HiSIM Figure 2: Simulated surface-potential distribution along the channel with the 2D simulator MEDICI under the saturation condition. Calculated surface potentials by HiSIM at the source side φ S0 and at the drain side φ SL are also depicted. The φ SL position varies consistent with the operating point of the MOSFET. These approximations allow analytical formulations de- scribing device performances as functions of the surface potentials at the source side φ S0 and at the drain side φ SL . These potentials are calculated by solving the Poisson equation iteratively. It was shown that simu- lation time can, nevertheless, be reduced in comparison with a conventional model [3]. Fig. 1 shows schemat-

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  • HiSIM: Self-Consistent Surface-Potential MOS-ModelValid Down To Sub-100nm Technologies

    M. Miura-Mattausch, H. Ueno, H. J. Mattausch*, S. Kumashiro**, T. Yamaguchi**,K. Yamashita**, and N. Nakayama**

    Graduate School of Advanced Sciences of Matter, *Research Center for Nanodevices and Systems,Hiroshima University, Higashi-Hiroshima, Japan, [email protected]

    **Semiconductor Technology Academic Research Center,Shin-Yokohama, Japan, [email protected]

    ABSTRACT

    Surface-potential-based MOSFET modeling is shownto be the right direction. Model parameters reflect thephysical device parameters of advanced technologies di-rectly, and can therefore be even scalable with technol-ogy changes. These advantages are demonstrated withHiSIM, the first self-consistent surface-potential modelfor circuit simulation based on the drift-diffusion ap-proximation and charge descriptions.

    Keywords: MOSFET Model, Surface Potential, Charge-Based Modeling, Sub-100nm Technology

    1 INTRODUCTION

    MOSFET technology trends are toward further downscaling of device sizes [1]. This will make many new ap-plications possible. Especially important are the com-mercial requirements of miniature and mobile equip-ment including operation at high frequencies (RF). How-ever, MOSFET modeling is facing difficulties to achieveaccurate description of such scaled down devices. Thereason is that many complicated new phenomena arearising, which are difficult to be described analytically.In the coming SoC era, where different technology con-cepts will be merged on a chip, not only accuracy toreproduce single-device measurements but also robust-ness of model-parameter-meanings and their values arerequired. MOSFET models have to be available forall arising requirements. We demonstrate here that acharge-based model with the self-consistent surface-potentialdescription offers the basis for successfully coping withthe foreseeable challenges. HiSIM (Hiroshima-universitySTARC IGFET Model) is the first MOSFET model de-veloped according to this concept [2].

    2 BASIC CONCEPT OF HiSIM

    HiSIM solves the Poisson equation and the current-density equation including both the drift and the dif-fusion contribution analytically. The fulfillment of thecontinuity equation is still restricted for the first re-lease HiSIM1.0 to the quasistatic approximation. HiSIMadopts two additional approximations: the charge-sheetapproximation and the gradual-channel approximation.

    Vgs

    φSL

    φS0

    Vfb

    QSQI

    QB

    Q

    VthVfb Vgs

    accumulation conductionnon-conduction

    Vth

    (a)

    (b)

    Figure 1: Schematics of calculated (a) surface poten-tials and (b) charges as a function of gate-source voltage(Vgs).

    1.0 1.5 2.0

    φ [V

    ]

    Position [µm]

    Vgs=1.5VVds=1.6V

    φS0

    φSL

    φS0+Vds2D simulation

    channel

    : HiSIM

    Figure 2: Simulated surface-potential distribution alongthe channel with the 2D simulator MEDICI under thesaturation condition. Calculated surface potentials byHiSIM at the source side φS0 and at the drain side φSLare also depicted. The φSL position varies consistentwith the operating point of the MOSFET.

    These approximations allow analytical formulations de-scribing device performances as functions of the surfacepotentials at the source side φS0 and at the drain sideφSL. These potentials are calculated by solving thePoisson equation iteratively. It was shown that simu-lation time can, nevertheless, be reduced in comparisonwith a conventional model [3]. Fig. 1 shows schemat-

  • ics of the surface potentials and charges. Fig. 2 com-pares the surface potentials calculated by HiSIM withthe surface potential distribution obtained by the 2Dsimulator MEDICI [4]. φSL is the value at the end ofthe gradual-channel approximation, namely the pinch-off point. HiSIM includes a self-consistent determina-tion of the pinch-off-point position in the channel. Thisis achieved by solving the Gauss law in the pinch-off re-gion with a potential increase in this region. The poten-tial increase is dependent on the channel/drain junctioncondition, which determines the channel length modula-tion [5]. Thus HiSIM knows all potential values requiredto describe device performances. For reflecting the phys-ical device structure, it’s very important that surface po-tentials are functions of device parameters such as theoxide thickness and the substrate impurity concentra-tion. Advanced MOSFET technologies undertake veryelaborate channel engineering to extend the end of scal-ing down [6]. A main effort in the HiSIM development isgiven on direct reflection of the physical device parame-ters of such advanced technologies in the HiSIM modelparameters.

    In spite of the scaling down, long-channel transistorstill reveals important technology features. Fig. 3 showsa HiSIM result for a 10nm MOSFET with an advancedpocket-implant technology. Without any smoothing pa-rameters the correct result is easily obtained. This isexactly an essential advantage of the surface-potential-based modeling allowing to reproduce the complete channel-length (Lgate) dependence with the same parameter set.

    3 MODEL DESCRIPTIONS

    Table 1 summarizes the dependencies and effects in-cluded in HiSIM1.0. Here we shortly describe the out-lines of some of the included features. Results are shownfor n-MOSFETs. All together 71 model parameters areintroduced to describe DC and AC MOSFET character-istics for any gate length (Lgate) and width (Wgate).

    Table 1: Dependencies and effects implemented inHiSIM1.0.

    Vth (L, W)Gate-Poly DepletionQuantum Mechanical EffectChannel-Length ModulationTemperature DependencesIdsIbsIgateIGIDL1/f NoiseCapacitances

    DiodeSource/Drain Symmetry

    0

    10

    20

    30

    40

    10-10

    10-9

    10-8

    10-7

    10-6

    10-5

    Vbs= 0Vbs=-0.5V

    g m /

    I ds

    Ids [V]10

    -4

    measurementHiSIM

    10-15

    10-13

    10-11

    10-9

    10-7

    10-5

    -0.5 0 0.5 1 1.5

    I ds [

    A]

    Vgs [V]

    HiSIMHiSIM

    = 0.0 → −1.5V

    Vds = 1V

    Vbs

    Vbs=-1.0V

    Vds = 1V

    measurement

    Figure 3: Calculated results by HiSIM in comparisonto measurements for a n-MOSFET with the gate length(Lgate) of 10µm.

    3.1 Pocket Implantation

    Advanced MOSFET technologies suffer from strongshort-channel effects. The pocket implantation technol-ogy has been developed to suppress these effects [6]. Astrong dopant inhomogeneity along the channel is theorigin of the suppression. HiSIM simplifies the impu-rity profile as shown in Fig. 4a [7]. With reduced Lgatethe two pocket regions approach and overlap each othercausing a strong increase of the threshold voltage (Vth)as a function of Lgate as shown in Fig. 4b. Furtherreduction of Lgate then causes dominant short-channeleffects, which are described by taking into account thegradient of lateral electric field [3].

    3.2 Mobility Universality

    Fig. 5 shows extracted the low field mobility as in-cluded in HiSIM [8]. It is seen that the universalityis preserved for any Lgate even though advanced MOS-FET technologies induce unnegligible quantum effectsand poly-depletion effects. The mobility universality isan important feature of HiSIM simplifying the parame-ter extraction and securing the reliability of model pa-rameter values.

  • 4

    5

    6

    7

    8

    0.2 0.4 0.6 0.8

    depth=30nm 60nm

    Nsu

    b [x1

    017 c

    m-3

    ]

    Position in the channel [µm]

    Nsubp

    Leff

    Nsubc Lp

    0.15

    0.20

    0.25

    0.30

    0.35

    0.40

    0.45

    0.1 1 10

    HiSIMmeasurement

    Lgate [µm]

    V th [

    V]

    (b)

    Vbs = 0.0 → −1.5V

    (a)

    Figure 4: (a) 2D-pocket profile obtained by the 2D-process simulator TSUPREM to reproduce measuredVth-Lgate characteristics. The solid line is the simpli-fied profile used by HiSIM. Nsubp, Nsubc, and Lp aremodel parameters. (b) Comparison of measured Vthwith HiSIM results.

    100

    200

    300

    Eeff [V/cm]

    Mob

    ility

    [cm

    2 /V

    s]

    1x106 2x1063x105 5x105

    Lgate=1.5µm

    Lgate=0.12µm(Nsub=1.08E18cm−3)

    (Nsub=5.6E17cm−3)

    PH CB SR (∝−2) (∝−0.3)

    Figure 5: Extracted low field mobility by HiSIM as afunction of effective electric field (Eeff).

    3.3 Narrow Channel Effect

    The necessity of small size devices, including thechannel width, is increasing. In this case additional leak-age currents caused by the shallow-trench isolation areno longer negligible. With the surface-potential-basedmodeling this can be included simply without singulari-ties and with small additional calculation cost as demon-strated in Fig. 6. The number of model parameters in-troduced is only three.

    Lgate = 0.14µmWgate= 0.98µm

    I ds

    Vgs

    [A]

    [V]

    10 -3

    10 -5

    10 -7

    10-1110 -9

    10-13

    -0.5 0.5 1.0 1.50 2.010-15

    Vds = 1.5V Vbs = 0.0 → −1.5V

    measurementmeasurementmeasurementHiSIM

    Figure 6: Comparison of calculated and measured draincurrent (Ids) as a function of Vgs and Vbs for a narrowwidth device.

    3.4 Scalability

    Fig. 7 compares measured transconductances and chan-nel conductances with calculated results by HiSIM. Modelparameters are fitted only to measured I-V characteris-tics with Lgate of 10µm to 0.11µm. Good reproducibil-ity is observed for any Lgate. The scalability of HiSIMto shorter Lgate is tested with Lgate = 80nm. The re-sult is quite satisfactory. This is especially importantfor the SoC era, in which the technology optimizationfor each application is unavoidable. A prediction of theinfluence of an optimization step on the circuit is thusdesired prior to fabrication.

    00.20.40.60.81.0

    00.51.01.52.02.53.0

    g m[x

    10-3

    S]

    g m[x

    10-2

    S]Lgate = 10µm

    Vds = 1.0V

    Lgate = 80nm1.2

    Vbs = 0.0 → −1.5V-0.5 0 0.5 1 1.5 2

    Vgs[V]-0.5 0 0.5 1 1.5 2

    Vgs[V]

    10-7

    10-6

    10-5

    10-4

    10-4

    10-3

    10-2

    g ds[S

    ]

    g ds[S

    ]

    0 0.4 0.8 1.2 1.6 0 0.4 0.8 1.2 1.6Vds[V] Vds[V]

    1.0V 1.5V

    Vgs = 0.5V

    Vbs = 0.0, -1.0V

    Figure 7: Comparison of calculated transconductance(gm) and channel conductance (gds) by HiSIM with mea-surements for Lgate = 10µm. gm and gds were not usedfor the parameter extraction. The same comparison isdone for Lgate = 80nm, which is outside the Lgate range(10µm – 0.11µm) used for parameter extraction.

  • 4 RF-APPLICATIONS ANDSIMULATION TIMES

    Fig. 8 shows simulation results of Y -parameters to-gether with measurements [9]. If all capacitances andconductances are accurately simulated, as it is the casefor HiSIM, the quasi-static approximation is not severeeven up to cut-off frequency. The key for achieving thisencouraging result with HiSIM is the charge-based mod-eling including a dynamic charge partitioning.

    Another important issue for application is the simu-lation time. Fig. 9 demonstrates that the iteration stepscan be reduced drastically by deriving good initial val-ues.

    -1

    0

    1

    2

    3

    4

    5

    Y 11x

    10-2

    :HiSIM-QS:HiSIM-NQS

    Vg=gmmaxVd=1.2V

    Y 12x

    10-3

    -6-5-4-3-2-101

    fT=13.91GHz

    -6-4-202468

    0 5 10 15 20f [GHz]

    Y 21x

    10-2

    0

    0.5

    1.0

    1.5

    2.0

    0 5 10 15 20f [GHz]

    Y 22x

    10-2

    Measurement:real:imaginary

    Figure 8: Comparison of calculated n-MOSFET Y -parameters with measurements for Lgate = 0.5µm. Dot-ted lines are HiSIM results with the quasistatic approx-imation. Solid lines are also HiSIM results but with asimple inclusion of the non-quasistatic contribution.

    Vgs [V]

    1

    2

    3

    4

    5

    6

    0.0 1.0 2.0 3.0 4.0

    HiSIManalytical

    Itera

    tion

    Step

    s, φ S

    0

    Figure 9: Number of iteration steps for solving the Pois-son equation. “analytical” means to use an analyticalsolutions as initial values. HiSIM uses improved initialvalues to reduce iteration steps. Vds is fixed 0.1V.

    5 CONCLUSION

    The MOSFET-modeling approach of HiSIM, basedon a self-consistent surface potential and the drift-dif-fusion approximation, has been shown to be the rightdirection for future MOSFET models for circuit simu-lation. In particular, model parameters directly reflectthe physical parameters of advance technologies, allow-ing a prediction of the results of technology changes.The biggest advantage of HiSIM is that the underlyingmodel concept is very simple and physically consistent.Therefore, an expansion to more sophisticated futuredevice generations will be easy.

    REFERENCES

    [1] R. Chau, J. Kavalieros, B. Roberds, R. Schenker,D. Lionberger, D. Barlage, B. Doyle, R. Arghavani,A. Murthy, and G. Dewey, “30nm physical gatelength CMOS transistors with 1.0ps n-MOS and1.7ps p-MOS gate delays,” IEDM Tech. Digest, pp.45–48, 2000.

    [2] http://home.hiroshima-u.ac.jp/usdl/HiSIM.html[3] M. Miura-Mattausch, U. Feldmann, A. Rahm, M.

    Bollu, and D. Savignac, “Unified complete MOS-FET model for analysis of digital and analog cir-cuits,” IEEE Trans. CAD/ICAS, vol. 15, pp. 1–7,1996.

    [4] MEDICI User’s Manual, Avant! Co.[5] D. S. Navarro et al., “Correlation between channel

    conductance and overlap capacitance and its mod-eling,” submitted for publication.

    [6] Y. Taur and E. J. Nowak, “CMOS devices below0.1µm: How high will performance go?”, IEDMTech. Digest, pp. 215–218, 1997.

    [7] D. Kitamaru, H. Ueno, K. Morikawa, M. Tanaka,M. Miura-Mattausch, H. J. Mattausch, S. Ku-mashiro, T. Yamaguchi, K. Yamashita, and N.Nakayama, “Vth model of pocket-implanted MOS-FETs for circuit simulation,” Proc. SISPAD, pp.392–395, 2001.

    [8] M. Suetake, K. Suematsu, H. Nagakura, M. Miura-Mattausch, H. J. Mattausch, S. Kumashiro, T. Ya-maguchi, S. Odanaka, and N. Nakayama, “HiSIM:A drift-diffusion-based advanced MOSFET modelfor circuit simulation with easy parameter extrac-tion,” Proc. SISPAD, pp. 261–264, 2000.

    [9] H. Kawano, M. Nishizawa, S. Matsumoto, S. Mi-tani, M. Tanaka, N. Nakayama, H. Ueno, M.Miura-Mattausch, and H. J. Mattausch, “A prac-tical small-signal equivalent circuit model for RF-MOSFETs valid up to the cut-off frequency,” sub-mitted for publication.