Fabrication of interdigitatedmicro-supercapacitors for portable

electronic devices

DTU-NTU Innovation Workshop 2013

Søren Elmin Diederichsen, DTUChua Yen Hao, NTU

Supervisors:Chen Xiaodong, Tim Booth & Kristian Mølhave

Nanyang Technical UniversityJune 27, 2013

1 ABSTRACT

1 Abstract

In the application of portable electronics, the current trend is to downsize electron-ics components for greater portability. High performance interdigitated planar micro-supercapacitors could be fabricated with current micro-fabrication technology and is com-patible with the fabrication of integrated circuit (IC). The applications of such devicewill be useful for electronics component that requires high burst of energy in a shorttime and response to high frequency. Basing on the state-of-the-art interdigitated micro-supercapacitors, a proposal to downscale the device was brought up for the purpose ofachieving higher performance in the device. Several fabrication methods were discussed.Also, key performance parameters of the device were mentioned and corresponding char-acterization methods were suggested.

i

Contents

1 Abstract i

2 Motivation 1

3 Theoretical Background 23.1 Conventional Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23.2 Supercapacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

4 State-of-the-art 44.1 Electrode Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

4.1.1 Electrolytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44.1.2 Fabrication of interdigitated micro-supercapacitor . . . . . . . . . . 4

4.2 Graphene electrodes: Conventional stacked geometry versus in-plane devicegeometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

5 Proposal to down-scale current micro-supercapacitor interdigitated de-sign 85.1 Electrode separation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95.2 Methods for down-scaling device dimensions . . . . . . . . . . . . . . . . . . 10

6 Performance characterization 126.1 Infuence of the active material and thickness of the electrode . . . . . . . . 126.2 Frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126.3 Energy density, Power density and rate capability . . . . . . . . . . . . . . . 12

7 Conclusion and Outlook 14

2 MOTIVATION

Figure 1: Illustration of an interdigitated micro-supercapacitor. A potential difference is achieved byapplying an external voltage to two electrodes patches (marked with a plus and minus sign, respectively). Inbetween the electrodes is a solid-state electrolyte, effectively removing the need for a separator. Illustrationfrom [2]

2 Motivation

In the application for portable electronics, the current trend is gearing towards the con-tinuous downsizing of existing components for greater portability. In the meantime, en-hancement of the functionality and reliability of the component is also crucial, such thatthe miniaturization will not compromise the functionality of the component. Progress inmicro-fabrication technology has enabled the fabrication of micro-supercapacitor in an in-terdigitated planar form. For the discussion in our report we define a micro-supercapacitoras being a planar supercapacitor having electodes of micrometer-scale in at least one di-mension, as schematically illustrated in Figure 1.

In contrast to a conventional sandwich structured supercapacitor, this interdigitatedplanar structure will allow the micro-supercapacitor to be more compatible together withthe fabrication of integrated circuits (IC) that can be integrated with MEMS or CMOSin a single chip [1]. Other than better integration with ICs, micro-supercapacitor wasexperimentally found to yield higher power density as compared to the conventional su-percapacitor.

Micro-supercapacitors have great potential to complement batteries for portable elec-tronic. Some of the desired properties of micro-supercapacitors would be high powerdensity, high frequency response and rate capability. These properties are particularlyuseful if the micro-supercapacitors were to be coupled with micro-batteries, micro-fuelcells, and energy harvesters to provide peak power [3]. The device can also be use topower radio frequency identification (RFID) tags and with further optimization of elec-trode compositions and structural design of the micro-supercapacitors, the device can beuse for ac-line-filtering applications in portable electronics[4].

Thus, the motivation for the studies presented in this report is to investigate key as-pects related to the fabrication and final performance of a micro-supercapacitor based onan interdigitated electrode design. Furthermore, methods for achieving new devices inmicro- and nano-scale regimes will be proposed, including discussions on how to performmeasurements that hopefully could reveal some characteristics related to supercapacitorsthat have not yet been fully understood, including in-planar diffusion versus normal dif-fusion of electrolyte ions into the bulk few-layer graphene electrodes.

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3 THEORETICAL BACKGROUND

(a) (b)

Figure 2: Drawings of: (a) A conventional capacitor [6]. d indicates the separation distance betweenthe to conductive electrodes. (b) Electrical double-layer supercapacitor[7]. An electrical double-layer iscreated due to electrostatic forces making it possible to store electrical energy when an external voltageis applied. Again, d denotes the distance between the conductive electrodes. A zoom-in on the porouselectrode material reveals charge build-up. Yet another zoom-in reveals the charge separation distancebetween the electrolytic ions and the electrode, indicated by δ.

3 Theoretical Background

This section will provide a brief description and comparison of the conventional capacitor,the electrolytic capacitor and the supercapacitor, including important schematics (whichwill be referred to in other sections of the report).

3.1 Conventional Capacitors

A conventional capacitor is a component that can store and release electrical energy.A typical conventional capacitor consists of two conductive electrodes separated by adielectric. This structure is also known as a parallel plate capacitor and a principle sketchcan be seen in Figure 2a. In the presence of an applied external potential between thepositive and the negative electrode, electrical charges are electrostatically stored. On theother hand, when a load is connected to the two electrodes, the capacitor delivers anelectric current, thus the capacitor is discharged. For a parallel plate capacitor the totalcapacitance, C, is given as[5]:

C =εA

d(1)

where ε is the dielectric constant, A is the total area of the two electrodes, and d is thedistance between the two electrodes. The latter parameter and its influence of superca-pacitor performance will be discussed in another section of this report, namely in Section5.1.The maximum energy that can be stored in such a set-up, can be expressed as[5]:

E =1

2CV 2 (2)

in which V is an applied potential.The max power released, P, when discharging the capacitor is given as[5]:

P =V 2

4R(3)

2

3.2 Supercapacitors 3 THEORETICAL BACKGROUND

where R is the resistance of the capacitor. In this equation a maximum external powerfrom is assumed that the resistance of the load is equal to that of the internal resistanceof the capacitor, according to the maximum power transfer theorem[8]. However, thiscondition will not result in maximum efficiency.This way of storing energy can be used for numerous applications, e.g. as a buffer powersupply when a battery is being charged, or to applications where a high voltage needsto be maintained. Also, changes in the distance between the electrodes will result in achange in the capacitance (according to Eq. 1), which therefore makes it possible to usein several sensor applications, e.g. the capacitive micromachined ultrasonic transducer[9].

3.2 Supercapacitors

The term supercapacitor, or ultracapacitor, is used to designate capacitors that rely onelectrochemical mechanisms. Supercapacitors have, in general, an almost identical cellconstruction as conventional capacitors, as illustrated in Figure 2b. However, the maindifference is that the metal electrodes in supercapacitors are generally constituted byhighly porous electrodes [10] and the fact that an electrolyte is used instead of a dielectric(which, then, might require the insertion of a separator). Also, supercapacitors havesmaller separation distance than compared to the ordinary electrolytic capacitor (whichhas been around for more than a hundred years), since the latter is relies on an oxide layerseparation between the electrode and the electrolyte[11].In fact, supercapacitors can be classified according to the energy storage mechanisms in-volved; one being electrical double-layer capacitors (EDLC), and the other being pseudo-capacitors [10]. In an EDLC the energy is stored by the adsorption of both anions andcations, resulting in a electrical double-layer at the boundary between an electrolyte anda high-surface-area electrode [10]. For this capacitor class, porous carbon materials areused as electrode material for electrostatical storage of charge, including but not limitedto; Activated carbon, carbon nanotubes and graphene[5]. On the other hand, pseudoca-pacitors rely on a Faradic process in which reversible redox reactions take place betweenthe electrolyte and the electroactive material on an electrode surface. For a pseudocapac-itor mainly three electroactive materials have been investigated; Transition metal oxides,conducting polymers and materials containing oxygen- and nitrogen surface functionalgroups[10]. In addition, a combination of the aforementioned two supercapacitor classes iscalled a hybrid capacitor and exhibits both outstanding double-layer capacitance as wellas pseudocapacitance [12, 13].

Energy storage in a supercapacitor results in a higher energy density than the conven-tional dielectric capacitors [14]. Furthermore, supercapacitors have a higher capacitanceper unit volume and a larger energy density compared to traditional solid dielectric ca-pacitors. On the downside, the energy density is lower than that of modern conventionalbatteries, say lithium-ion batteries [12]. Therefore, one of the key figures of merit is thepower density, which is significantly higher than that of conventional batteries, i.e. energycan be transferred to the load at a higher rate. As a result, supercapacitors have muchfaster charging and discharging cycles [15].

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4 STATE-OF-THE-ART

4 State-of-the-art

4.1 Electrode Materials

From a material’s point of view, carbon is one of the most abundant materials on Earthand it is the most important element for all living organism on Earth. When two ormore carbon atoms are brought together, they can assume a variety of forms, which isunique and fascinating. Hence, many nanostructured carbon-based materials have beenused in the making of electric double-layer micro-supercapacitors [1]. These materialsinclude activated carbon (AC), onion-like carbon (OLC), carbon nanotubes (CNT), andgraphene. In order to achieve EDLCs with high performance, several factors of the carbon-based materials are crucial: specific surface area (SSA), electrical conductivity, and poresize and distribution [10]. In most cases, although porous materials can obtain high SSA,the low conductivity of the porous materials restricts its application in high power densitysupercapacitors [16]. Therefore, it is necessary to optimize these factors to achieve desireproperties of the carbon-based electrodes for high performance EDLCs. The performancedefined in this report is based on the measurement of the device power density, frequencyresponse and rate capability.

The unique properties of graphene give graphene an advantage over other carbon-basedmaterials especially in the making of high performance in-plane micro-supercapacitors.Graphene is a material with one-atom-thick 2D single layer of sp2-bonded carbon. Theunique structural property of graphene allows the material to possess the physical prop-erties of strong mechanical strength, extraordinary high electrical conductivity and largesurface area as compare to traditional porous carbon materials [10].

4.1.1 Electrolytes

Another important component in a supercapacitor is the electrolyte. In general, there arethree types of electrolytes: aqueous electrolytes, organic electrolytes, and ionic liquids[5].Each type electrolyte has its own advantages and disadvantages, which will not be dis-cussed in this report. Liquid based electrolytes are commonly used in the fabricationof conventional supercapacitors. In the fabrication process, the substrates are often im-mersed directly into the liquid electrolyte or the liquid electrolyte will be drop onto thesubstrate. It will be difficult for the electronic chip to contain liquid electrolyte andalso to shelter other electronic components from the impact of the liquid electrolyte [17].Therefore, micro-supercapcitor with liquid electrolytes posts a challenge in the making ofon-chip micro-supercapacitor and is definitely not a feasible option to adopt liquid-baseelectrolytes. A gel-like electrolyte is a good alternative of conventional liquid electrolytesfor the purpose of on-chip micro-supercapacitors. El-Kady and Kaner reported an all-solid-state flexible interdigitated micro-supercapacitors using Ionogels, which is a hybridiza-tion of ionic liquids (1-butyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide) witha solid component (fumed silica nanopowder) to form gel-like eletrolytes [1]. Similarly,Niu et al. reported an all-solid-state flexible ultrathin interdigitated micro-supercapacitorusing phosphoric acid/polyvinyl alcohol (H3PO4/PVA) gel electrolyte[17].

4.1.2 Fabrication of interdigitated micro-supercapacitor

Currently, few researches had been done on micro-supercapacitors with interdigitated elec-trode design. Pech et al. [2] reported the fabrication of the micro-supercapacitor that wasbased on onion-like carbon (OLCs). The interdigitated electrode patterns were deposited

4

4.2 Graphene electrodes: Conventional stacked geometry versus in-plane devicegeometry 4 STATE-OF-THE-ART

Figure 3: Schematic drawing of indigitated micro-supercapacitors fabrication procedures[3].

by electrophoretic deposition technique (EPD) onto interdigitated gold current collec-tor patterned on silicon wafer. The gold current collector was deposited by evaporationand conventional photolithography/etching processes were used to form the interdigitatedpatterns. At the scan rate of 1 V/s, the energy density of 1.63 mWh/cm3 and powerdensity of 36 W/cm3 was achieved. With a time constant of only 26 ms, the OLC basedmicro supercapacitors are capable of handling ultra-high power, due to the coupling ofmicrometer-sized interdigital electrode deign with a binder free deposition technique andthe non-porous morphology of OLC materials.

Beidaghi and Wang [3] reported the fabrication of interdigitated micro-supercapacitor.The binder-free interdigitated electrodes were formed with the combination of electrostaticspray deposition (ESD) and photolithography lift-off methods, see Figure 3. The electrodematerial used was a composite of reduced graphene oxide (rGO) with CNT and the elec-trolyte used is aqueous KCl. At the scan rate 1 V/s, the energy density obtained was 1.63mWh/cm3 and the power density of 17 W/cm3. The time constant obtained at 4.8 msdemonstrates the superior frequency response of the micro-supercapacitors fabricated.

Recently, El-Kady and Kaner reported a scalable method to fabricate graphene basedinterdigitated micro-supercapacitors, see Figure 4. A standard Lightscribe DVD burnerwas used to form interdigitated electrodes by laser direct writing on graphene oxide (GO)films. The insulating GO films were converted into highly conducting computer-designedpatterned laser-scribed graphene (LSG). With the over coating of Ionogel, an energy den-sity of 1.37 mWh/cm3 and power density of 34 W/cm3 at 1 V/s scan rate. It was reportedthat the micro-supercapacitors fabricated could perform up to a scan rate of 10 V/s. Thetime constant obtained of 19 ms was achieved.

Table 7 summarized the data obtained from different researches. The figures obtainedfor volumetric capacitance, energy density and power density are obtained at the scan rateof 1V/s. The figures for power densities tabulated in the table were extrapolated from theRagone plot provided in each literature, based on the energy densities reported.

4.2 Graphene electrodes: Conventional stacked geometry versus in-plane device geometry

Recent work [17, 1] suggest that micro-patterned electrodes constituted by reduced grapheneoxide allow for improved electrolytic ion diffusion in the direction parallel to the electrodes.At this point, however, this is only empirically deduced and further investigations need to

5

4.2 Graphene electrodes: Conventional stacked geometry versus in-plane devicegeometry 4 STATE-OF-THE-ART

Figure 4: Photograph of laser-scribed micro-supercapacitors with 4, 8 and 6 interdigitated electrodes [1]

Table 1: Table summarizing performance obtained by state-of-the-art fabrication methods.

Electrode Electrolyte Operating Volumetric Energy Power Time Refmaterial voltage capacitance density density constant

[V] [ Fcm3 ] [mWh

cm3 ] [ Wcm3 ] [ms]

AC 1M TEABF4 3 9 11.25 26 700 [2]in PC

OLC 1M TEABF4 3 1.3 1.63 36 26 [2]in PC

rGO/CNT 3M KCl 1 5.0 0.69 17 4.8 [3]

LSG PVA/H2SO4 1 1.8 0.25 14 19 [1]

LSG Iongel 2.5 1.57 1.37 34 19 [1]

6

4.2 Graphene electrodes: Conventional stacked geometry versus in-plane devicegeometry 4 STATE-OF-THE-ART

(a)(b)

Figure 5: Schematics of: (a) A stacked graphene supercapacitor. The figure illustrates that the elec-trolytic ions will not completely utilize the electrochemical graphene surface area. In contrast, (b) shows thegeometry of an in-plane graphene supercapacitor, allowing better utilization and better charge/dischargerates. Illustrations from [18]

be performed.It has been demonstrated that the use of graphene in an in-plane device geometry

instead of a more conventional stacked geometry will result in better utilization of theelectrochemical surface area of graphene layers, and thus improving the extent of the elec-trical double-layer formed at the interface[1, 17, 18]. Figure 5 shows simplified illustrationsof the in-plane and the stacked supercapacitor design, respectively. In the conventionalstacked design, graphitic carbon-based materials are randomly oriented with respect tothe current collectors[18]. In Figure 5a the most unfavourable situation is shown, in whereall graphene layers are lying parallel to the current collectors. Having both electrodesin the same plane makes it suitable for on-chip integration. As a result the electrolyticions will not completely utilize the electrochemical surface area[17]. With an in-planearchitecture, as depicted in Figure 5b, the electrolytic ions will be able to diffuse in adirection parallel to the graphene sheets allowing full utilization of the electrochemicalsurface area. Notice, however, that the illustration in Figure 5b is greatly idealized, anda real device using would have much more concatenated graphene sheets. Nonetheless,graphene stacked in an in-plane design has shown to have higher specific capacitance asfunction of scan rate[17]. This makes the graphene interdigitated in-plane stacked designmore suitable for applications demanding high charge/discharge rates[1].

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5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITORINTERDIGITATED DESIGN

(a) (b)

Figure 6: (a) Plot of specific capacitance as function of scan rate. Device 1 (blue) is a conventionalsupercapacitor, having a design as depicted in Figure 5a. Device 5 and 6 are rGO electrode structureswith 300 µm and 100 µm spacing, respectively[17]. (b) Stack capacitance of different supercapacitors asfunction of scan rate. The performance of a conventional sandwich supercapacitor (as illustrated in Figure5a is represented by the black curve. The other curves represent laser scribed rGO in an interdigitatedelectrode pattern having 4, 8 and 16 electrodes respectively, as depicted in Figure 4 [1].

5 Proposal to down-scale current micro-supercapacitor in-terdigitated design

Looking at recent results for the performance of interdigitated micro-supercapacitors itappears that design parameters such as the width of the electrodes as well as the inter-space distance between the electrodes certainly have influence on device performance. Inparticular, it has been suggested [1, 17] that down-scaling the interdigitated electrode de-sign will result in better ion diffusion and thus better device performance. In particular,the separation distance between interdigitated graphene electrodes (as depicted in Figure5) will result in a shorter diffusion pathway of the electrolytic ions in directions parallel tothe plane of the device. Figure 6a shows the specific capacitance as function of scan rateobtained by Niu et el.[17]. The plot qualitatively shows that the specific capacitance withsmaller electrode distance, d, dropped less abruptly with increasing scan rate[17]. This isbelieved to be due to the shorter pathway ions need to travel. As a result, higher rate ca-pability is obtained for smaller electrode separation distances. This observation is furthersubstantiated by El-Kady et al. In a somewhat similar design using laserscribed interdig-itated supercacitors with reduced graphene-oxide as electrode material, they obtained aplot of the stack capacitance as function of scan rate, as shown in Figure 6b. The sametendency is again seen with respect to device performance enhancement for smaller devicedimensions. Devices with 4, 8 and 16 electrodes were made (see Figure 4, and Figure6b surely indicates that the more electrodes per area, the higher a specific capacitance isobtained. Furthermore, a less abrupt fall is again obtained. It has been suggested[1] thataverage migration distance is proportional to the width of the micro-electrodes and simi-larly with the space between them, and is thus decreasing from 16 to 4 electrodes. Havingmore electrodes in the same area will therefore reduce the mean ionic diffusion path willeffectively result in lowering of the electrolyte resistance between the micro-electrodes. Inessence; The more electrodes per unit area, the more power can be achieved.

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5.1 Electrode separation5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR

INTERDIGITATED DESIGN

Therefore, in this work we propose to make smaller structures by suggesting possiblefabrication methods as well as what the key parameters are and how to find them usingcharacterization methods and calculations. Furthermore we will provide an overview ofpossible ways of making supercapacitors with interdigitated structure on a micron- andeven sub-micron-scale.Now a brief discussion of the influence of electrode distance follows.

5.1 Electrode separation

For the interdigitated micro-supercapacitor the specific capacitance will be mainly dueto ion-interactions at each electrode/electrolyte interface. As explained in Section 3, thiscontribution exits because of electrostatic as well as chemical interaction between theelectrode and the electrolyte. Then, looking at the EDLC, a Helmholtz layer is createdbetween the electrode and the electrolyte, resulting in a separation distance between thecharged ion and the oppositely charged electrode. This distance, δ (see Figure 2b), isindeed the key to the high capacitance obtained by supercapacitors, since charge layerseparation is on the order of a few angstroms. That is to say, the contribution due to theseparation between the positive and negative electrodes will not contribute mentionableto the specific capacitance.

However, changing the distance between the electrodes, d (see Figure 2b), will alterthe pathway of the ions in the electrolyte. In terms of internal resistance, the shorter thedistance an ion needs to diffuse will result in a smaller resistance. Since the resistivityof electrolyte will be determined by the electrolyte solution/composition in use, it can behard to give any quantitative predicts about the resistance as the separation distance, d, isdecreased. However, as it is our intention to suggest a supercapacitor design for portableon-chip devices, we assume the use of an all-solid-state electrolyte. Furthermore, in thiscase it is definitely expected that a smaller distance between the electrodes will result inlowering of the resistance R, as expressed by:

R = ρL

A(4)

where ρ is the resistivity of the electrolyte, L is the length an ion travels and A is thecross-sectional area seen by an ion in the electrolyte.This decrease in resistance with decreasing separation distance will, then, result in a lowercharacteristic time constant τ = RC (the time it takes for the system to charge/discharge),i.e. have the advantage of better charge/discharge performance. Furthermore, loweringthe resistance will increase the resulting power density, according to Equation 3. Also,when looking at the sheet resistance of the total device, it is expected that minimizing alldimensions with the same factor will not alter the sheet resistance.

The downscaling of micro-supercapacitors also plays an important role in the improve-ment of frequency response of the device. In theory, the electrolytes in a supercapacitorcan be deemed as a dielectric material in a conventional capacitor. In the presence ofelectric field, E, the electrolyte molecules will be re-oriented, inducing an electric dipolemoment. Polarization, P, is the total electric dipole moment per unit volume and is de-pendent on the electric field applied to it. There are three possible types of contributions(mechanisms) to the polarization in the electrolytes: electronic polarization (αe), dipolarpolarization (αd) and space charge polarization (αs). αe is due to the separation of pos-itive and negative charge center in atoms, αd is due to the reorientation of the existingdipoles and αs is due to the diffusive separation of ions in the electrolyte medium. Thetotal polarization is the summation of these contributions.

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5.2 Methods for down-scaling device dimensions5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR

INTERDIGITATED DESIGN

The polarization contributed by space charge is the greatest, follow dipolar, and elec-tronic is the least. These contributions have different response speed, which is charac-terized by response time, τ . The response is the fastest for αe and the slowest for αs.under the perturbation of an AC electric field, polarization contributed from a particu-lar mechanism occurs instantaneously when the response time of the mechanism is muchfaster than the frequency of the applied electric field. However, when the response timeis much slower than the frequency, no polarization from the particular mechanism occurs.Therefore, if we were to increase the frequency of the AC electric field, fewer mechanismswill contribute to the total polarizability, giving rise to lower P, and thus lower D. Thefrequency response will be the extent to which the electrolyte can maintain its polarizationin an increasing AC electric field frequency.

In summary, down-scaling will have the advantage of higher charge/discharge rateand frequency response due to a smaller internal resistance. Also, the a lower resistancewill result in higher power densities. Furthermore, downscaling of the device dimensionsmakes it possible to fit more on-chip devices in an integrated circuit design. That is,it would allow the interconnection of several supermicrocapacitors in parallel or seriesin order to improve output current and/or potential[17]. It is indeed these intriguingproperties that has lead to our proposal of down-scaling the dimensions of the currentmicro-supercapacitor interdigitated design.

5.2 Methods for down-scaling device dimensions

Several well-known fabrication methods exit that will make small dimensions achievable -even on a few-nanometer scale. However, some of these methods cannot be used for large-scale production but will be most interesting for research purposes, e.g. for studying theion diffusion when when the electrode separation is comparable to the charge-layer distanceof the Helmholtz layer. The technique used for micro-patterning of the electrode materialto form an interdigitated pattern will of course depend on the choice of material, whichwill, as suggested in Section 4, alter the device performance properties. Therefore, findingsuitable methods for micro- or nano-patterning of different electrodes is very essential. Inthe following, four fabrication techniques together with are discussed. These are e-beamlithography, nanoimprint lithography, pyrolysis processing and LIGA, respectively.

E-beam lithography[19]: is the process of making a pattern in a thin film by exposingthe thin film, referred to as the resist layer, to a beam of accelerated electrons. Theresulting structures achievable with this technique can have very high resolution dueto the short wavelength of high-energy electrons. In this way it would be possible toobtain very narrow gaps between the electrodes in the interdigitated supercapacitor,and would therefore be interesting in the study of ion diffusion and contributionsto the specific capacitance of the device. The downside of this method is that isdefinitely not usable for large-scale manufacturing due to long exposure time for alarge area of small structures. Another possible use of e-beam lithography is to makea patterned stamp, and then use the stamp to form a pattern in a polymer. Thiswill be elaborated in the following.

Nanoimprint lithography[20]: is the process of transferring a pattern from a stampinto a polymer mask. Nanoimprint lithography comes in many different variants, butdescribing these is beyond the scope of this report. However, using this techniquewill be a discipline in where viscous sqeeze flow of the polymer and mechanicaldeformation of the stamp will be important aspects to consider. In particular, this

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5.2 Methods for down-scaling device dimensions5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR

INTERDIGITATED DESIGN

method has its limitations exactly due to these aspects, resulting in limited use forlarge structures with varying pattern densities. It is therefore hard to tell, beforefurther investigations have been performed, whether or not this method will beparticularly suitable for making sub-micron interdigitated supercapacitors. However,high throughput nanoimprinting has been well-demonstrated[21] in a large-area roll-to-roll and roll-to-plate set-up. We therefore firmly believe that it would in fact bepossible to make large-scale production using this method, thus making it interestingwith respect to the fabrication of micro-supercapacitors for on-chip applications.

Pyrolysis processing[22]: uses SU-8 photoresist as starting material. This technique re-lies on the irreversible change of chemical composition and physical phase, by meansof high temperature exposure. Patterns of carboneous material can in this way bemade with very high aspect-ratios. Also, it has been shown that these photore-sist derived structures can be charged and discharged, thus making this techniquean interesting alternative to current fabrication methods for interdigitated micro-supercapacitors, by means of adding a 3rd dimension. Using this method will thusallow a low-cost, well-controlled way of defining high-aspect ratio electrodes. In ad-dition, the resist surface can easily be functionalized. The resolution of the definedelectrode patterns using this technique is limited by the use of UV lithography, i.e.diffraction limited.

LIGA[23]: is short for ’LItographie, Galvanoformung, Abformung’. As the name of thistechnique indicates, it relies on three main process steps (in English:) ’Lithogra-phy, Electroplating and Molding’). In particular, using X-ray LIGA as a fabricationmethod it is possible to achieve very high aspect ratio microstructures (on the orderof 100:1). A thin X-ray sensitive polymer resist, such as PMMA, is bonded ontoan electrically conductive substrate and exposed to highly collimated high-energysynchronton radiated X-rays through a mask that is partly covered with X-ray ab-sorbing material. Removing the exposed or unexposed photoresist chemically willresult in very high aspect-ratio 3D structures. Filling these trenches with metalby electrodeposition is then possible. Finally the remaining resist is stripped andhigh-aspect ratio structures are left (this is, then, often used for replication throughinjection molding). We therefore suggest that this method can be used to obtain3D structured interdigitated microsupercapacitors by electropheretic deposition ofcarbon-based electrodes, e.g. using small sheets of reduced graphene-oxide.

Of the above mentioned methods, the pyrolysis and the LIGA processes offer the possi-bility to make high-aspect ratio 3D structures. Now, adding more electrode material bymaking higher structures will make it possible to store even more charge on the sameplanar area, making the maximum stored energy per area appreciably higher. This wouldthen be interesting in the application for interdigitated supercapacitors with sub-micronelectrode separation distance. The main advantage of the pyrolysis being low-cost wayof mass-producing micro-supercapacitors. Due to the nature of collimated X-rays, theLIGA process will probably result in the finest structures of the methods in questions.Nanoimprinting will have the advantages of low-cost high-throughput devices. However,imprinting in a polymer on a nanometer-scale might result in uniformity in the structure,thus making this method more suitable for micro-sized dimensions.

In summary, our proposal is to achieve higher power density by down-scaling theinterdigitated planar dimensions and higher effective energy density per area by creatinghigh-aspect ratio 3D electrodes. Figure 7 shows the prospects of our proposal, using anexisting Ragone plot as reference[1].

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6 PERFORMANCE CHARACTERIZATION

Figure 7: Ragone plot showing the energy and power densities of laser-scribed micro-supercapacitors(LSG-MSC) with different electrolytes, traditional sandwich structure, commercially available activatedcarbon supercapacitors (AC-SC), an electrolytic capacitor and a lithium-ion thin-film battery. The bluearrows are our suggestion to improving the energy and power densities, respectively[1]. The red arrow,then, is the overall intended outcome.

6 Performance characterization

6.1 Infuence of the active material and thickness of the electrode

According to Stoller and Ruoff [24], the mass of the active material and thickness of theelectrodes have influence on the characterization of the device performance. The electrodesshould be of comparable thickness with commercial cell electrode thickness range of 10µm to several hundreds µm. Electrodes with minute amounts of active material will leadto an overstatement of the active material performance.

In our proposal, the electrode thickness would be much smaller compared to theelectrode thickness suggested by the best practice method. Therefore, the performanceachieved through our proposal may not be comparable with the best practice method.

Nevertheless, in our proposal, we are more concern about the performance we canachieve in down-scaling micor-supercapacitors, while the suggestion provided by the bestpractice method are more for the purpose to assess the electrode’s performance. Therefore,it will not be of our interest to comply with the best practice method.

6.2 Frequency response

The frequency response of the micro-supercapacitors can be studied by electrochemicalimpedance spectroscopy (EIS). The dependence of phase angle with frequency of the micro-supercapacitors can be plotted to study its frequency response. A graph of phase angleversus frequency is shown in the figure 8. From the plot, a characteristic frequency (f0)at a phase angle of 45o can be extrapolated and its corresponding time constant canbe calculated (τ0 = 1/f0). The capacitive behavior dominates at frequencies lower thanf0 are equal and a more resistive behavior dominates at frequencies higher than f0[25].Therefore, by comparing f0, the frequency response of different micro-supercapacitors canbe compared. The one with higher f0 will be the one with better frequency response.

6.3 Energy density, Power density and rate capability

According to the best practice methods recommended by Stoller and Ruoff [24] for deter-mining performance of ultracapacitors, the device capacitance (Cdev) is best determined

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6.3 Energy density, Power density and rate capability6 PERFORMANCE CHARACTERIZATION

Figure 8: Phase angle versus frequency graph for different micro-supercapacitors[3].

from galvanostatic discharge curves using the formula

Cdev =i

dV/dt(5)

where i is the discharge current and dV/dt is the slope of the discharge curve. Thevolumetric capacitance is to be calculated based on the volume of the device, includingthe active area, the current collector and the electrolyte.

The discharged energy and power of the device is to be calculated according to theequations below[1]:

E = Cdev(∆E)2

2 (6)

P = (∆E)2

4RESR(7)

where ∆E is the operating voltage and RESR is the internal resistance of the device. Thepower and energy densities are then obtained based on the volume of the device.

The rate capability of the device is determined by the extent, in which the device canperform effectively as a capacitor in an increasing charge/discharge rate. The higher thecharge/discharge rate the device can sustain its function as a capacitor, the better therate capability of the device.

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7 CONCLUSION AND OUTLOOK

7 Conclusion and Outlook

In conclusion, state-of-the-art of interdigitated planar micro-supercapacitors were reviewed.It was found that carbon-based electrode materials with solid-state gel-like electrolytes aresuitable for the fabrication of high performance micro-supercapacitors. Several current fab-rication methods were presented and the performance outcome was summarized in a table.In particular, the effects of interdigitated device geometry for graphene-based electrodeswere discussed in comparison to conventional stacked device geometry. In the purpose toimprove the device performance for portable electronics applications, the down-scale ofcurrent interdigitated micro-supercapacitors was proposed based on existing literatures.By down-scaling of the current design, our target is to improve the frequency response,rate capability and power density of the device. Furthermore, better portability and com-patibility for on-chip intergration can also be achieved.

Some possible fabrication methods for downscaling were discussed and the LIGA pro-cess was found to be the most feasible method for down-scaling and yet obtaining highaspect ratio of electrodes. The additional improvement in energy density of the device canbe attained by creating a 3D electrode, on top of the improvement in power density bydown-scaling. Therefore, miniaturized interdigitated micro-supercapacitor fabricated byLIGA process is particularly interesting for research purposes and possible commercializa-tion.

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