expectations for optical network from the viewpoint of system software research

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;OTREI A.ANO ASIONAL NRSISTSE OF ,DUANCED NDTRS4IAL CIENCE AND ECHNOLOG; , IcXV?T fXff?ba ba V[TXaZXf TaW bccbegha?g?Xf bY ?agXZeTgXW c[bgba?Vf ?a YhgheX WTgTVXagXef 79I? *()6JfhAhUT */ @Ta *() 0WPECSASIONR FO4 OPSICAL NESVO4. F4OM SHE UIEVPOINS OF R;RSEM ROFSVA4E 4EREA4CH

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Page 1: Expectations for optical network from the viewpoint of system software research

OTREI A ANOASIONAL NRSISTSE OF ,DUANCED NDTRS IAL CIENCE AND ECHNOLOG

,

IcXV T_̲ fXff ba ba V[T_̲_̲XaZXf TaW bccbegha g Xf bY agXZeTgXWc[bgba Vf a YhgheX WTgTVXagXef

79I? *()-‐‑‒6Jfh hUT */ @Ta *()-‐‑‒

0WPECSASIONR FO OPSICAL NESVOF OM SHE UIEVPOINS OF R RSEM

ROFSVA E EREA CH

Page 2: Expectations for optical network from the viewpoint of system software research

TSLINEs  JeXaWf a WTgTVXagXe eXfXTeV[ TaWWXiX_̲bc Xag

s  7?IJ ?CFKBI Feb]XVgs Mbe _̲bTW TaT_̲lf fs  FebcbfXW TeV[ gXVgheX2:TgTqbj VXage V Vb chg aZ

*

Page 3: Expectations for optical network from the viewpoint of system software research

NS ODTCSIONs  8 Z:TgT f T _̲_̲Xe Tcc a WTgTVXagXef geXdh eXf T V_̲XTa f_̲TgX TeV[ gXVgheX _̲ XDIRAGG EGASION DASACENSE IN A BOW

s  PSICAL NESVO IR E gb T aZ g[Xs  Ecg VT_̲ cTg[ aXgjbe  T_̲_̲ bcg VT_̲ cTg[UXgjXXa XaW gb XaW a T WTgTVXagXer Febf2 [hZX UTaWj Wg[ XaXeZl XvV XaVlr 9baf2 cTg[ fj gV[ aZ _̲TgXaVl hg _̲ mTg ba

s  Jb gT X TWiTagTZX bY bcg VT_̲ cTg[ aXgjbeT aXj WTgTVXagXe EI f XffXag T_̲r AXl WXT2 Vbageb_̲ WTgT c_̲TaX fXcTeTg ba

+

Page 4: Expectations for optical network from the viewpoint of system software research

PSICAL ESVO IN / Rs  I _̲Te VbaVXcg  ����������� ���be ��� ��� ���������� ceb]XVgf TeX _̲ThaV[XW eXVXag_̲lr  EcXa 9b chgX Feb]XVg  <TVXUbbr  HTV IVT_̲X 9b chg aZ  ?agX_̲r  kgeX X_̲l I[e a aZ 9b chg aZ  ?8Cr  J[X CTV[ aX   Fr  < eX8bk  K98r  9JH 9bafbeg h  C?J

s  Ecg VT_̲ aXgjbe aV_̲hW aZ c[bgba V X_̲XVgeba VVbaiXeZXaVX TaW f[beg  3) eXTV[ agXeVbaaXVg ba f Xl gb We iX aabiTg ba a YhgheXWTgTVXagXef

,

Page 5: Expectations for optical network from the viewpoint of system software research

-‐‑‒

Architecture

Service Cluster Back-End Cluster

Front-End Cluster

Web250 racks

Ads 30 racks

Cache (~144TB)

Search Photos Msg Others UDB ADS-DB Tao Leader

Multifeed 9 racks

Other small services

o<_̲Tf[ Tg <TVXUbb t<_̲Tf[ Ih g *()+

Standard Systems

IWeb

IIIDatabase

IVHadoop

VPhotos

VIFeed

CPUHigh

2&x&E5*2670

High

2&x&E5*2660

High

2&x&E5*2660Low

High

2&x&E5*2660

Memory LowHigh

144GB

Medium

64GBLow

High

144GB

Disk LowHigh&IOPS

3.2&TB&Flash

High

15&x&4TB&SATA

High

15&x&4TB&SATAMedium

Services Web,&Chat DatabaseHadoop

(big&data)Photos,&Video

MulPfeed,

Search,&Ads

Five Standard Servers

Page 6: Expectations for optical network from the viewpoint of system software research

PEN OMPTSE : OJECS

.

s  E9F jTf YbhaWXW gb bcXa_̲l f[TeX WXf Zaf bYWTgTVXagXe cebWhVgf Ul <TVXUbb a 7ce _̲ *())

s  I[ Yg Yeb Vb bW gl cebWhVgf gb TRE D IUENDERIGN gb cebiX g[X XaXeZl XvV XaVl bY _̲TeZXfVT_̲X WTgTVXagXefr  ?aWhfgel IgTaWTeW2 ) 1 FKr  EcXa 9b chgX Feb]XVg2 ) (/ FK

s  IcXV pVTg baf2 fXeiXe fgbeTZXeTV aXgjbe fj gV[ XgV

s  FebWhVgf2 GhTagT HTV Zb N=?=78OJ :TgT9XagXe Ib_̲hg ba

EcXa 9b chgX HTV i*

Page 7: Expectations for optical network from the viewpoint of system software research

/

Page 8: Expectations for optical network from the viewpoint of system software research

3: HE ACHINE

0

The$Machine$could$be$six$%mes$more$powerful$than$an$equivalent$conven2onal$design,$while$using$just$1.25$percent$of$the$energy$and$being$around$1/100$the$size.

h:p://www.hpl.hp.com/research/systems@research/themachine/

Page 9: Expectations for optical network from the viewpoint of system software research

/ASACENSE IN A -‐‑‒OWs  J[X TV[ aX f f k g Xf YTfgXe j g[ ) *-‐‑‒ cXeVXagbY g[X XaXeZl Vb cTe aZ j g[ A

1F9 9[T_̲_̲XaZXnf HTaWb 7VVXff UXaV[ Te

Page 10: Expectations for optical network from the viewpoint of system software research

HE ACHINE , CHISECST E

)(

Photonic Interconnect

Compute Elements

Memory Elements

NV Memory Elements

Storage Elements

Architecture evolution/revolution“Computing Ensemble”: bigger than a

server, smaller than a datacenter, built-in system software

– Disaggregated pools of uncommitted compute, memory, and storage elements

– Optical interconnects enable dynamic, on-demand composition

– Ensemble OS software using virtualization for composition and management

– Management and programmingvirtual appliances add value for IT and application developers

On-demand composition

Ensemble OS Management

Ensemble Programming

Page 11: Expectations for optical network from the viewpoint of system software research

ACHINEs  B ahk 2 B ahk UTfXW EI Ybe J[X CTV[ aX

r 7 aXj VbaVXcg bY X bel TaTZX Xagr 7a X h_̲Tgbe gb T X T VbaiXag baT_̲ Vb chgXeUX[TiX _̲ X J[X CTV[ aX

r 7 WXiX_̲bcXenf ceXi Xj eX_̲XTfXW a @haX *()-‐‑‒5s  9TeUba

r  F j _̲_̲ eXc_̲TVX B ahk j g[ 9TeUba

))

Page 12: Expectations for optical network from the viewpoint of system software research

UC Berkeley

1 Terabit/sec optical fibers FireBox Overview!

High Radix Switches

SoC

SoC

SoC

SoC

SoC

SoC

SoC SoC SoC

SoC

SoC

SoC

SoC

SoC

SoC

SoC

Up to 1000 SoCs + High-BW Mem

(100,000 core total)

NVM

NVM

NVM

NVM

NVM

NVM

NVM

NVM NVM NVM

NVM

NVM

NVM

NVM

NVM

NVM

Up to 1000 NonVolatile Memory Modules (100PB total)

InterXBox&Network&

Many&Short&Paths&Thru&HighXRadix&Switches&

1I E-‐‑‒OW UE UIEV

)*

7 f _̲Te VbaVXcg bYJ[X CTV[ aX

Page 13: Expectations for optical network from the viewpoint of system software research

UC Berkeley Photonic-Switches-

!  Monolithically&integrated&silicon&photonics&with&WaveXDivision&MulCplexing&(WDM)&-  A&fiber&carries&32&wavelengths,&each&32Gb/s,&in&each&direcCon&-  OffXchip&laser&opCcal&supply,&onXchip&modulators&and&detectors&

!  MulCple&radixX1000&photonic&switch&chips&arranged&as&middle&stage&of&Clos&network&(first&and&last&Clos&stage&inside&sockets)&

!  2K&endpoints&can&be&configured&as&either&SoC&or&NVM&modules&!  In&Box,&all&paths&are&two&fiber&hops:&

-  ElectricalXphotonic&at&socket&-  One&fiber&hop&socketXtoXswitch&-  PhotonicXelectrical&at&switch&-  Electrical&packet&rouCng&in&switch&-  ElectricalXphotonic&at&socket&-  One&fiber&hop&switchXtoXsocket&-  PhotonicXelectrical&at&socket&

30

SoC&

Switch& Switch&

SoC& NVM&

)+

_̲XVge VT_̲ cTV Xg fj gV[ aZ

Page 14: Expectations for optical network from the viewpoint of system software research

IMPULSE: Initiative for Most Power-efficient Ultra-Large-Scale data Exploration�

2014� 2020� 2030�

����

����

Op2cal$Network�

3D stacked package�2.5D stacked package�Separated packages�

Future data center�

Logic� I/O�

NVRAM�

Logic�

NVRAM�

I/O�I/O�

Logic�

NVRAM�

High-Performance Logic Architecture

Non-Volatile Memory Optical Network - Voltage-controlled, magnetic RAM mainly for cache and work memories�

- 3D build-up integration of the front-end circuits including high-mobility Ge-on-insulator FinFETs. / AIST-original TCAD �

-  Silicon photonics cluster SW -  Optical interconnect technologies�

-  Future data center architecture design / Dataflow-centric warehouse-scale computing�

Page 15: Expectations for optical network from the viewpoint of system software research

15

HPC�-‐‑‒IG DASA

, CHISECST E FO CONCENS ASED DASA P OCERRING+: afgT_̲_̲Tg ba

Dba ib_̲Tg _̲XX bel

aXeZlfTi aZ_̲bZ V

Ecg VT_̲ cTg[UXgjXXa V[ cf

Dba ib_̲Tg _̲XX bel aXeZl

fTi aZ_̲bZ V

SO AGE CLARR MEMO NON UOLASILE MEMO a

3// RSO AGE

3IGH PE FO MANCERE UE MODTLE

0NE G RAUINGHIGH RPEED NESVO

0NE G RAUINGLA GE CAPACIS

RSO AGE

EASING A ICH ANDECO F IENDL ROCIES

?a g Tg iX Ybe Cbfg FbjXe XvV Xag K_̲geT BTeZX IVT_̲X WTgT kc_̲beTg ba

IMPULSE ASEGIC , INSEG ASED !/ , P OG AMbIJ7H cebZeT f 7?IJ eXfXTeV[ g[Tg j _̲_̲ cebWhVX T _̲TeZX bhgVb X a g[X YhgheX

AIST’s IMPULSE Program�

Page 16: Expectations for optical network from the viewpoint of system software research

Voltage-controlled Nonvolatile Magnetic RAM�

Nonvolatile CPU

Nonvolatile Cash

Nonvolatile Display�

Power saved storage

NAND Flash

Voltage Controlled Spin RAM�

•  kebiX^\=`d[jZ\[<cX^d\i`Z<Xd`heigefn<Z_Xd^\�

•  M\hh<i_Xd<A?A@@<g\lg`i`d^<fel\g�

•  R\h`hiXdZ\<Z_Xd^\<Yn<i_\<K\<[`hfbXZ\c\di�

•  Mehh<Yn<\digefnF<G<A?A@@�

Voltage Controlled Topological RAM�

Memory keeping w/o power

Insulation Layer�

Thin film

Ferro-magnetics

Page 17: Expectations for optical network from the viewpoint of system software research

Low Power High-performance Logic�

W`g`d^�bXn\g�

Jgedi=\d[�

Front-end 3D integration�

��� ��� ��� ���

nMOS pMOS

��

Ge �� Ge

Ge Fin CMOS Tech.�

•  Mel=fel\g?_`^_=hf\\[<Yn<K\�•  TelXg[<@>DV<=<K\<J`d<HNPS�

S � D � S � D � Insulation layer�

● Dense integration w/o miniaturization�● Reduction of the wiring length for power saving ● Introduction of Ge and III-V channels by simple stacking process ● Innovative circuit by using Z direction�

Page 18: Expectations for optical network from the viewpoint of system software research

Simulations�

Anisotropic magnetic material�

First-principle sim.�TCAD�- Large-scale simulation for 3D structure, novel devices, and latest material �

Simulation for temperature distribution�

-  Clarification for voltage-control

-  Parameter setting to the TCAD

Phase-change�

Page 19: Expectations for optical network from the viewpoint of system software research

DEMUX

Wavelength/bank(Optical/comb) �

��

MOD. MUX

Fiber

Silicon/Photonics/Integration

Datacenter$server$racks� Silicon photonics cluster switches�DWDM, multi-level

modulation optical interconnects�

DSP

Tx RxCombsource

Memory cube

CPU/GPU

2.5D-CPU Card�No of λs� Order of mod.� Bit rate�

1� 1� 20 Gbps�

4� 8� 640 Gbps�

32� 8� 5.12 Tbps�

●Large-scale silicon photonics based cluster switches�●DWDM, multi-level modulation, highly integrated “elastic” optical interconnects ●Ultra-low energy consumption network by making use of optical switches�

!  Ultra-compact switches based on silicon photonics

!  3D integration by amorphous silicon

!  A new server architecture

Hjgg\di<hiXi\=e]=i_\=Xgi<Tm�A@@KYfh<p<�<E>ABTYfh�

Hjgg\di<\b\Zig`ZXb<hl`iZ_\h���AC@TYfh<p<�E@@QYfh�

Optical Network Technology for Future Datacenters�

Page 20: Expectations for optical network from the viewpoint of system software research

Architecture for Big Data and Extreme-scale Computing�

Real-time Big data�

Optimal arrangement of the data flow� Resource management / Monitoring�

Storage�

Server Module�

IXiX<Z\di\g<PS�

Input� Output�Conv.� Ana.�Data flow�

Data$flow$centric$warehouse$scale$compu%ng�

1 - Single OS controls entire data center�

2 - Split a data center OS into the data plane and the control plane to guarantee real-time data processing

Connect to universal processor / hardware and storage by using optical network

Page 21: Expectations for optical network from the viewpoint of system software research

:E FO MANCE 0RSIMASIONs  fg TgX g[X cXeYbe TaVX bY glc VT_̲ Ubg[ F9 TaW8 Z:TgT jbe _̲bTWf ba T YhgheX WTgTVXagXe flfgX

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*)

http://simgrid.gforge.inria.fr

SimGrid Overview

MSG

Simple application-

level simulator

SimDag

Framework for

DAGs of parallel tasksapplications on top of

a virtual environment

Library to run MPISMPI

virtual platform simulator

SURF

Contrib

Grounding features (logging, etc.), data structures (lists, etc.) and portability

XBT

TRACE

Tracing

simulation

User Code

SimGrid user APIsI If your application is a DAG of (parallel) tasks ; use SimDag

I To study an existing MPI code ; use SMPI

I In any other cases ; use MSG(easily study concurrent processes and prototype distributed applications)

Da SimGrid Team SimGrid User 101 Introduction Installing MSG Java lua Ruby Trace Config xbt Performance CC 8/28

SimGrid is not a Simulator

logs

stats

visu

Availibility

Changes

Platform

Topology

Application

Deployment

Simulation Kernel

Application

Simulator

OutcomesScenario

ApplicativeWorkload

Parameters

Input

That’s a Generic Simulation Framework

Da SimGrid Team SimGrid User 101 Introduction Installing MSG Java lua Ruby Trace Config xbt Performance CC 23/28

Page 22: Expectations for optical network from the viewpoint of system software research

O LOAD ( IMPLE ERRAGE :ARRINGs  ?gXeTg ba bY aX Z[Ube Vb ha VTg ba  Ubggb _̲XYgs  8 Z cTVg bY aVeXTf aZ _̲ a UTaWj Wg[ Y TaTcc_̲ VTg ba f aXgjbe agXaf iX

**

Compute power (FLO)�

Relative execution time�

Data size (byte)�

#node: 10000 Link bandwidth: 0.1, 1, 10Tbps Link latency 100ns CPU power: 10TFLOPS Data size�1012�1024B�

…�

…�

1/100�

Page 23: Expectations for optical network from the viewpoint of system software research

O LOAD ) 3: ,PPLICASIONs  D7I FTeT_̲_̲X_̲ 8XaV[ Te  *-‐‑‒. cebVf V_̲Tff 9

r  Bbj _̲TgXaVl f beX cbegTag g[Ta [hZX UTaWj Wg[r  J[X cebU_̲X f mX f gbb f T_̲_̲ gb hg _̲ mX [hZX UTaWj Wg[

*+

CPU power�1TFLOPS Link bandwidth�1Tbps

CPU power�1TFLOPS Link latency�0.1us

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HX_̲TgiXXkXVhgba

gX

HX_̲TgiXXkXVhgba

gX

Page 24: Expectations for optical network from the viewpoint of system software research

O LOAD AP EDTCE

*,

s  A:: 9hc *()* JeTV *2 ceXW Vg g[X V_̲ V g[ebhZ[eTgX bY TWf  hf aZ TWbbc TaW iX T_̲_̲s  CTV[ aX _̲XTea aZ f 9FK agXaf iXs  J[X XuXVg bY [hZX UTaWj Wg[ f _̲ gXW UXVThfX

r  J[X VbaVheeXaVl bY g[X hfXW bWX_̲ f abg XabhZ[r  TWbbc f bcg mXW gb T X ]bUf eha YTfgXe ba g[XVheeXag ? E WXi VXf

: f ? E UTaWj Wg[  CUcf

kXVhgbag

X  fXVbaW

kXVhgbag

X  fXVbaW

HX_̲Tg iX 9FK cbjXe  UTfX )/*=<BEFI

CPU power: 17.2TFLOPS

Disk bandwidth: 200Mbps Network bandwidth: 10Gbps

Page 25: Expectations for optical network from the viewpoint of system software research

Memory�

Optical I/O�

Logic�

Board�Chassis�����

10TB�

1TB/s�

100GB/s�

1TB/s�

100 TFLOPS�

����

Data�

/ASA OUEMENS : OBLEMR

*-‐‑‒

Memory�

Electrical I/O�

Logic�

Board�Chassis�

����

9heeXag <hgheX

128GB�

14.9GB/s (DDR3)�

7GB/s (IB FDR)�

224*2 GFLOPS�

1TB/s�

����

8GB/s (PCIe G3)�

* AIST Super Green Cloud (ASGC)�

Data�Bottleneck

Bottleneck

Page 26: Expectations for optical network from the viewpoint of system software research

:A ALLELI ASION INRIDE :AC AGEMemory� Logic�

10TB�

1TB/s�

100 TFLOPS�•  DXXW XvV XagcTeT_̲_̲X_̲ mXWfgehVgheX

•  Ea V[ caXgjbe

•  ?agXeVbaaXVg ba

Page 27: Expectations for optical network from the viewpoint of system software research

-‐‑‒OSSLENEC R IN AP EDTCE

*/

Map� Map� Map� Map�

Reduce� Reduce� Reduce� Reduce�

1. Disk Throughput �

2. Network Congestion �

3. Serialized Reduce �

Shuffle�

Page 28: Expectations for optical network from the viewpoint of system software research

N RSO AGE NESVO P OCERRING

*0

Mappers�

Shuffle and Reduce�

XeTeV[ VT_̲ TaW cTeg T_̲eXWhVX cebVXff aZ aXTV[ aXgjbe abWX gbTib W aXgjbeVbaZXfg ba TaWfXe T_̲ mXW eXWhVX

9b chgX bWh_̲Xf TeXTggTV[XW a fgbeTZX gbTk mX g[X eXTW

g[ebhZ[chg YebfgbeTZX

Page 29: Expectations for optical network from the viewpoint of system software research

N RSO AGE NESVO P OCERRING

*1

Mappers�

Shuffle and Reduce�

FebVXff aZ9b cbaXag

Ecg VT_̲?agXeVbaaXVg

DLH7C

Page 30: Expectations for optical network from the viewpoint of system software research

+(

PU� MEM� PU� MEM�

PU� MEM� PU� MEM�

PU� MEM� PU� MEM�

PU� MEM� PU� MEM�

: eXVg bcg VT_̲ ? E VbaaXVg bagb aba ib_̲Tg _̲X X belbWh_̲Xf W fge UhgXW ba T V[ c

9b ha VTg babiXe :M:C

N RSO AGE NESVO P OCERRINGHA DVA E DERIGN

Page 31: Expectations for optical network from the viewpoint of system software research

/I ECS EMO OP OUE / /s  7ffh X cebVXffbe

X bel X UXWWXWcTV TZX j g[ M:CagXeVbaaXVg

s  Jb Yh_̲_̲l hg _̲ mX g[X [hZX? E UTaWj Wg[ eXT_̲ mXWUl :M:C

s  Ch_̲g c_̲X X bel U_̲bV fVTa UX fXag eXVX iXWf h_̲gTaXbhf_̲l hf aZh_̲g c_̲X jTiX_̲XaZg[f

s  CX bel VXage V aXgjbef T f _̲Te WXT QF79J)+R

+)

Processor�

Memory block�

Processor cores� Memory Bank� WDM

Interconnect�

Memory block�

Single package compute node �

Cache/

MMU�

From Wavelength bank�

Page 32: Expectations for optical network from the viewpoint of system software research

+*

2014 2020 2030

���

���

Optical(Network

3D stacked package2.5D stacked packageSeparated packages

Future data center

Logic I/O

NVRAM

Logic

NVRAM

I/OI/O

Logic

NVRAM

2OAL ( W ENE G E CIENC OF DASAP OCERRING

T IRION OF 1TST E /ASACENSE

Page 33: Expectations for optical network from the viewpoint of system software research

:F<

:F<

:F<

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:TgT <_̲bj7cc_̲ VTg ba

:TgTVXagXe EI

���������� ������

I_̲ VX

:F9f

/ASA OV : OCERRING RSEM

++

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Ecg VT_̲ DXgjbe

IgbeTZX

IXeiXe bWh_̲Xf

9b T_̲_̲bVTgX :F9fTaW aXgjbe cTg[UXgjXXa g[X

������������������

Page 34: Expectations for optical network from the viewpoint of system software research

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•  IXcTeTg ba bY WTgT c_̲TaX TaW Vbageb_̲ c_̲TaX2-  :TgT c_̲TaX f Ta Tcc_̲ VTg ba fcXV pV _̲ UeTel EI-  9bageb_̲ c_̲TaX TaTZXf eXfbheVXf  fXeiXe aXgjbe XgV

:TgTVXagXe EI

7cc

:TgTc_̲TaX

7cc

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7cc

:TgTc_̲TaX ʼ’

�� ��� ����������������������

9bageb_̲ c_̲TaX 9bageb_̲ c_̲TaX

+,

Page 35: Expectations for optical network from the viewpoint of system software research

: 0 /ASACENSE/ASA PLANE•  7cc_̲ VTg ba fcXV pV _̲ UeTel EI

-  Z TV[ aX _̲XTea aZ WTgT fgbeX XgV•  C g ZTgX g[X EI biXe[XTW gb Yh_̲_̲l

hg _̲ mX [ Z[ cXeYbe TaVX WXi VXf

7cc

:TgTc_̲TaX

7cc

:TgTc_̲TaX

7cc

:TgTc_̲TaX

9bageb_̲c_̲TaX

9FK 9FK =FK

CX ? E CX ? E CX ? E

ONS OL PLANE•  HXfbheVX TaTZX Xag•  BbZ VT_̲ TaW fXVheX eXfbheVX

cTeg g ba aZ Ybe WTgT c_̲TaXf•  Hhaa aZ ba g[X pe jTeX

+-‐‑‒

Page 36: Expectations for optical network from the viewpoint of system software research

ELASED Os  :TgTVXagXe j WX eXfbheVX TaTZX Xag

r EcXaIgTV 7cTV[X 9_̲bhWIgTV AhUXeaXgXfr  TWbbc O7HD 7cTV[X CXfbf

s  :TgTqbj cebVXff aZ XaZ aXr =bbZ_̲X 9_̲bhW :TgTqbjr  BT UWT TeV[ gXVgheX

s  9bageb_̲ TaW WTgT c_̲TaXf fXcTeTgXW WXf Za aEIr 7eeT f  K MTf[ aZgbar  ?N  IgTaYbeW

+.

Page 37: Expectations for optical network from the viewpoint of system software research

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© Copyright 2013 ISSCC—Do Not Reproduce Without Permission - 107 -

Optical Interconnect: As the bandwidth demand for traditionally electrical wireline interconnects has accelerated, optics has become an increasingly attractive alternative for interconnects within computing systems. Optical communication offers clear benefits for high-speed and long-distance interconnects. Relative to electrical interconnects, optics provides lower channel loss. Circuit design and packaging techniques that have traditionally been used for electrical wireline are being adapted to enable integrated optical with extremely low power. This trend has resulted in rapid progress in optical ICs for Ethernet, backplane and chip-to-chip optical communication. ISSCC 2014 includes a 2-dimensional (12×5) optical array achieving an aggregate data-rate of 600Gb/s [8.2]. Pre-emphasis using group-delay filtering extends the useful date rate of a 25Gb/s VCSEL to 40Gb/s [8.9]. Additional examples of low-power-linear and non-linear equalizers tackle electronic dispersion compensation in multi-mode and long-haul cables [8.1, 8.3]. Concluding Remarks: Continuing to aggressively scale I/O bandwidth is both essential for the industry and extremely challenging. Innovations that provide higher performance and lower power will continue to be made in order to sustain this trend. Advances in circuit architecture, interconnect topologies, and transistor scaling are together changing how I/O will be done over the next decade. The most exciting and most promising of these emerging technologies for wireline I/O will be highlighted at ISSCC 2014.

Per-pin data-rate vs. year for a variety of common I/O standards.

2000 2002 2004 2006 2008 2010 2012 2014 20161

10

50

Year

Data Rate [Gbp

s]

HyperTranportQPIPCIeS‐ATASASOIF/CEIPONFibre ChannelDDRGDDR

© Copyright 2013 ISSCC—Do Not Reproduce Without Permission - 119 -

DRAM Data bandwidth trends.

Non-Volatile Memories (NVMs): In the past decade, significant investment has been put into emerging memories to find an alternative to floating-gate based non-volatile memory. The emerging NVMs, such as phase-change memory (PRAM), ferroelectric RAM (FeRAM), magnetic spin-torque-transfer (STT-MRAM), and Resistive memory (ReRAM), are showing potential to achieve high cycling capability and lower power per bit in read/write operations. Some commercial applications, such as cellular phones, have recently started to use PRAM, demonstrating that reliability and cost competitiveness in emerging memories is becoming a reality. Fast write speed and low read-access time are the potential benefits of these emerging memories. At ISSCC 2014, a high-density ReRAM with a buried WL access device is introduced to improve the write performance and area. The next Figure highlights how MLC NAND Flash write throughput continues to improve. However, while the Figure following shows no increase in NAND Flash density over the past year, recent devices are built with finer dimensions or more sophisticated 3-dimensional vertical bit cells.

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