eecs 312 discussion - ziyang.eecs.umich.eduziyang.eecs.umich.edu/eecs312/lectures/dic-d3.pdfeecs 312...
TRANSCRIPT
Overview
• Reminder
– HW 1: Due Sep 24
• Diode
• Transistors
Diode
G
S D
Diode
Diode
Built-in Potential Depletion Region Width
Diode Current
Diffusion capacitance
NMOS
G
S D
Threshold Voltage
• 0 < VGS < VT
– Repel mobile holes and accumulation of electron beneath the gate oxide
• VGS > VT
– Surface is as strongly n-type as the substrate is p-type
VGS VT
Ron
S D
Operation Regions – Linear (lab 2)
1. VGS > VT
2. VGS – VT > VDS
3. Linear contribution of VGT to ID
4.
In case of a P-type MOSFET, the inequalities used above should be directed opposite
Operation Regions – Saturation (lab 2)
1. VGS > VT
2. VGS – VT ≤ VDS
3. Quadratic contribution of VGTto ID
4. channel-length modulation parameter
In case of a P-type MOSFET, the inequalities used above should be directed opposite
Operation Regions – Velocity Saturated
Linear Dependence
-4
V DS (V) 0 0.5 1 1.5 2 2.5
0
0.5
1
1.5
2
2.5 x 10
I D (A
)
VGS= 2.5 V
VGS= 2.0 V
VGS= 1.5 V
VGS= 1.0 V
Early Saturation
Strong electric field causes carrier mobility degradation : Compared to feature scaling, voltage scaling is lagging behind
Short Channel Effects
A unified model
1. If VDS is minimum: Linear region
2. If VGT is minimum: Saturation Region 3. If VDSAT is minimum : Velocity saturated region