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DESIGNING & IMPLEMENTATION OF DIGITAL FILTER FOR REMOVAL OF POWER SUPPLY NOISE Naivedya Mishra(2011H140034H) Peeyush Pashine(2011H140033H) Pravesh Tamrakar(2011H140036H) M Ashwin(2011H140038H)

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Page 1: Dsp Presentation

DESIGNING & IMPLEMENTATION OF DIGITAL FILTER FOR REMOVAL

OF POWER SUPPLY NOISE

Naivedya Mishra(2011H140034H)Peeyush Pashine(2011H140033H)

Pravesh Tamrakar(2011H140036H) M Ashwin(2011H140038H)

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BACKGROUND

Use of ECG Records the rhythm and electrical activity of patient

Types of Noise

Power Line Noise Baseband Vendor Noise Muscular Noise

INTRODUCTION

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Power Line Noise (50 Hz)

How to get a pure ECG signal

Determine set of filter coefficient to meet a design Specification

Tools used MATLAB,VERILOG…

Introduction(contd.)

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Power Frequency Deviation Transition from 50 Hz…

Filter Specifications

Filter Design

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Appropriate Filter IIR vs FIR Chebyshev Over Other Filters Chebyshev1 Over Chebyshev2

Filter Design(cont..)

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MATLAB Simulations

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Ideal ECG Signal

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Ideal ECG Signal Filtering

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MIT-BIH ECG Signal

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Filtering of Signal from MIT-BIH

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FFT of Filtered Signal..

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..FFT of Filtered Signal..

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..Comparison of FFTs

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4th order BS - more accurately as compared to other filters

2nd order BS filter & 2nd order Notch filter - similar coefficients and characteristics

Differentiated by computational methods

Inferences from this Section

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VERILOG SIMULATION

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Process Generation of Verilog code and

corresponding Testbench for filter

Simulation of testbench using Xilinx 13.1

Coded for Spartan 3E(standard).

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MAC UNIT

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Concept MAC: a <- a+ (b*c)

Coefficients fed from LUT’s

Multiplication in form of recursive addition

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Simulation

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THANK YOU