design and analysis of charge pump for pll at 90nm cmos technology
TRANSCRIPT
DESIGN AND ANALYSIS OF CHARGE PUMP FOR PLL AT 90nm TECHNOLOGY
DESIGN AND ANALYSIS OF CHARGE PUMP FOR PLL AT 90nm CMOS TECHNOLOGY PRESENTED BY : RAVI CHANDRA CDAC MOHALI
OUTLINEIntroductionLiterature SurveyNeed And Significance Of Charge PumpObjectivesDesign and analysis of Charge Pump Results and DiscussionsConclusion And Future ScopeReferences
Introduction of Charge pumpCharge pumpis a kind ofDC to DC converter and high efficiency device.CP usually operate at a high- frequency CP use some form of switching device(s) to control the connection of voltages to the capacitor
Charge pump is used in PLL to translate error UP and DOWN signal into equal sourcing and sinking current
advantages.pptx
Non-ideality in PLL due to Charge Pump bring some challenging problem to the efficient design and implementation
Due to unequal sourcing and sinking currents in charge pump , results in a static phase error in PLL
With reduced power supplies and feature sizes, circuits built in nano-meter scale technologies suffer from an increased susceptibility to performance degradation with process, voltage, and temperature variability.
Objectives Design a modified and optimized charge pump at 90nm technology. Reduce charge sharing in charge pump and their injection in different transistors Use Monte Carlo simulation to analyse the reduction in mismatching behaviour of charge pump. Analyse the variation of current mismatching and output voltage of charge pump on PVT variation.
Methodology of charge pump design and analysisStudy of the basic concept of charge pump and their designing topology
Designing of conventional charge pump
Designing of proposed charge pump.
Analyses of charge pump current matching-mismatching and charging-discharging waveform
Effect of PVT variation on charge pump output voltage
Design and Analysis of Charge pump
Conventional charge pump
The conventional CP has 4 PMOS and 4 NMOS transistor Two MOS transistor work as switching device as ON-OFF others two equalize the charging and discharging current
Schematic design of Conventional charge pump with capacitive load
MOS transistor PM5 and NM5 is remain always in ON state.Transistor PM1 and NM4 ON-OFF according to apply UP and DOWN signal respectively. When switch PM1 is in ON state, charging of load capacitor takes place and NM5 is in ON state, discharging of load capacitor occurs. When both the switch is in OFF state the output hold the pervious value.
Designed Charge Pump
The designed CP consists of current mirror circuit and two low power high gain operational amplifiers.Complementary connection of two operational amplifiers are used to equalize the charging and discharging current of CP to reduce mismatching.current mirror circuit to provide wide output voltage ranges and feedback mechanism which help to equalize charging and discharging current of CP.
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Designed Charge Pump continue
Difference in charge transfer in CP during charging and discharging has an effect on transient response and their proportional effect on current mismatching. Presence of long channel MOS transistors has a large input capacitance in CP caused decrease in speed of switching and their operation while presence of two complementary high gain & low power amplifier keep the charging and discharging current equal.
Result and DiscussionAll the resultant waveforms and histogram diagrams of the schematic of the CP have been obtained using cadence virtuoso ADE and ADE XL tools. The designed schematics are conventional CP, reference CP and proposed design of CP. All schematics of different CPs have been designed using 90nm CMOS process technology and power supply applied for schematic is in range of 1.0V to 1.2V. The current mismatching through Monte Carlo simulation and output voltage range variation by PVT variation method is analysed and discussed.
Conventional charge pump output voltage
Proposed charge pump output voltage
Conventional charge pump charging
Conventional charge pump discharging
Proposed charge pump charging
Proposed charge pump discharging
Conventional charge pump current matching
Proposed charge pump current matching
Power dissipation conventional charge pump
Power dissipation of proposed charge pump
Comparison between conventional and proposed charge pumpResult & SpecificationConventional CPProposed CPCMOS Technology90nm90nmOperating voltage1V 1V Output swing voltage0.3V- 0.9V0.5V 1VNMOS W/L ratio120/90120/90PMOS W/L ratio340/90340/90Stop time300n second300n secondCurrent matching range0.3V 1.2V0.4 1.35 VCurrent gain KCP0.11A/rad.7.96A/rad.Power Dissipation30W320W
Monte Carlo simulationTo know the behaviour of circuit which is combination of different deviceIts result is used to analyse the tolerance in the circuit due to mismatch errorHere observe the mismatching between device to deviceHere we mainly focus on random variation that is difference between two identical designed closely ideal device.new waveform\montecarlo.png
Conventional charge pump
In Conventional charge pump, Monte Carlo simulation consider PM6 and NM2 transistor .This histogram presented current mismatching at random1 and random14 of cadence virtuoso ADE XL tool. The percentage current mismatching of random1 is better than random14.
new waveform\conventinalmonte1.jpg
Proposed charge pump
In Proposed CP, Monte Carlo simulation consider PM8 and NM9 transistor.This histogram presented current mismatching at random1 and random14 of cadence virtuoso tool. The percentage current mismatching of random1 is better than random14.
new waveform\monte carloa1.jpg
PVT variation PVT variation measures the changes in output with respect of different process corners like tt, ff, ss, fs, sf, different range of voltages (0V, 0.5V, 0.75V, 1V, 1.25V, 1.5V and 1.8V) and temperatures (-40,-20, 0, 20, 40, 60, 80) in oC of CP. It help to find the limitation of circuit at different supply, temperature and corner.new waveform\pvt process.pngnew waveform\convpvt.png
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PVT Variation on conventional charge pump output voltage
PVT Variation on proposed charge pump output voltage
Example of PVT variation in proposed charge pump
new waveform\PVT
Comparison of different charge pump design with proposed designReferencesTechnologyOutput voltage swingOperating voltageCurrent mismatching percentageDynamic glitchesMaximum power dissipation[3]130nm0.2~11.2V