data sheet for 8254 programmable interval timer · data sheet for 8254 programmable interval timer...

Data Sheet for 8254 Programmable Interval Timer

REL 1.0

iWave Systems Technologies Pvt. Ltd. of 16 (Confidential)

Data Sheet For 8254 Programmable Interval Timer


REL 1.0


DOCUMENT REVISION HISTORY

Revision Date Change Description Author

1.0 24th Dec ‘11 Initial Version KA REL 1.0 16th Aug ‘12 Removed implementation results VC PROPRIETARY NOTICE: This document contains proprietary material for the sole use of the intended recipient(s). Do not read this document further if you are not the intended recipient. Any review, use, distribution or disclosure by others is strictly prohibited. If you are not the intended recipient (or authorized to receive for the recipient), you are hereby notified that any disclosure, copy or distribution or use of any of the information contained within this document is STRICTLY PROHIBITED. Thank you. “iWave Systems Tech. Pvt. Ltd.”


REL 1.0


Table of Contents 1 INTRODUCTION________________________________________________________ 6

1.1 PURPOSE ____________________________________________________________ 6 1.2 FEATURES ___________________________________________________________ 6 1.3 ACRONYMS AND ABBREVIATIONS _________________________________________ 6

2 PROGRAMMABLE INTERVAL TIMER ___________________________________ 7

2.1 BLOCK DIAGRAM ______________________________________________________ 7 2.2 DESCRIPTION _________________________________________________________ 7 2.3 SIGNAL DESCRIPTION __________________________________________________ 9

3 TIMING WAVEFORMS _________________________________________________ 10

3.1 COUNT WRITE OPERATION (EX. MODE 0) __________________________________ 10 3.2 MODE 0 OPERATION __________________________________________________ 11 3.3 MODE 1 OPERATION __________________________________________________ 12 3.4 MODE 2 OPERATION __________________________________________________ 13 3.5 MODE 3 OPERATION __________________________________________________ 14 3.6 MODE 4 OPERATION __________________________________________________ 15 3.7 MODE 5 OPERATION __________________________________________________ 16


REL 1.0


List Of Figures Figure 1: Programmable Interval Timer Block Diagram ..............................................................7 Figure 2: Mode 0 Operation ...................................................................................................... 10 Figure 3:Mode 0 Operation ....................................................................................................... 11 Figure 4: Mode 1 Operation ...................................................................................................... 12 Figure 5: Mode 2 Operation ...................................................................................................... 13 Figure 6: Mode 3 Operation ...................................................................................................... 14 Figure 7: Mode 4 Operation ...................................................................................................... 15 Figure 8: Mode 5 Operation ...................................................................................................... 16


REL 1.0


List Of Tables Table 1: Acronyms & Abbreviations ...........................................................................................6 Table 2: Programmable Timer IO Signal description ..................................................................9


REL 1.0


1 Introduction 1.1 Purpose This document describes the Technical Specification 8254 programmable interval timer. It includes the overall features, detailed description, I/O specifications and resource utilization summary for the 8254 programmable interval timer.

1.2 Features Following are the 8254 Programmable interval timer features

Three independently operated 16-bit counters

Binary/BCD count operation

Multiple Latch command for easy monitoring

Counter Latch command

Six count modes available for each counter o Interrupt at the End of Count o GATE Re-triggerable One-Shot o Rate Generator o Square Wave Generator o Software-Triggered Strobe o Re-triggerable Hardware-Triggered Strobe

Functionally based on 8254

1.3 Acronyms and Abbreviations Table 1: Acronyms & Abbreviations

Term Meaning BCD Binary Coded Decimal


REL 1.0


2 Programmable Interval Timer 2.1 Block Diagram

Data Bus Buffer

Read/Write Control

ControlWord

Register

Counter-0

Counter-1

Counter-2

D_I[7:0]

IORD_N

IOWR_N

A[1:0]

CS_N

CLK0

OUT0

GATE0

CLK1

OUT1

GATE1

CLK2

OUT2

GATE2

control_word[7:0]

data_out[7:0]

read/write enable

data_in[7:0]

System InterfaceSystem Interface Counter InterfaceCounter Interface

D_O[7:0]

D_VAL_O

Figure 1: Programmable Interval Timer Block Diagram

2.2 Description The design implements 8254 Programmable Interval Timer/Counter used for timing control applications in microcomputer systems. Design is capable of generating accurate time delays under software control. Three independent 16-bit counters are supported which can be configured to operate in one of the six operating modes supported.


REL 1.0


Data Bus Buffer: This is a 8-bit, three-state buffer that interfaces the system bus to the remaining blocks of the design.

Read/Write Control: This block decodes the control and address inputs from the processor and generates control signals to the remaining blocks of the design.

Control Word Register: This is a 8-bit register into which the control words are written to determine the operation mode of the counter.

Counter #n (n=0, 1, 2): Three independent counters capable of binary or BCD operation are supported. Each counter supports six different modes configurable through software and can each be set to different operating modes.


REL 1.0


2.3 Signal Description Table 2: Programmable Timer IO Signal description

SIGNAL NAME I/O WIDTH DESCRIPTION

RESET I 1 Input reset signal D_I [7:0] I 8 8-bit input data bus D_O [7 :0] O 8 8 bit output data bus

D_VAL_O O 1 Output data valid signal A [1 :0] I 2 16-bit bidirectional data lines

CS_N I 1 Active low Chip select input IOWR_N I 1 Active low Write enable input

IORD_N I 1 Active low Read enable input CLK0 I 1 Determines the count rate for Counter-0

GATE0 I 1 This signal controls the operation of Counter-0 depending on the mode of operation

OUT0 O 1 Counter-0 output, operation depends on the count mode. Can be used as an interrupt source for the processor.

CLK1 I 1 Determines the count rate for Counter-1



CLK2 I 1 Determines the count rate for Counter-2




REL 1.0


3 Timing Waveforms 3.1 Count Write Operation (Ex. Mode 0)

CLK

IOWR_N LB =4H

?

GATE

OUTCount Value ? ? 0004H 0003H 0002H 0001H 0000H FFFFH FFFEH FFFDH

IOWR_N CW =B0H

GATE

OUTCount Value 002FH 002EH 002EH 002EH 731CH

HB =73H

(Transfer)

(Transfer)

CLK

IOWR_N HB =44H

?

GATE

OUTCount Value ? ? 4400H 43FFH

(Transfer)

43FEH 43FDH 43FCH 43FBH 43FAH 43F9H 43F8H

CLK

0030H0031H0032H

LB =1CH

731BH 731AH 0001H 0000H

Figure 2: Mode 0 Operation


REL 1.0


3.2 Mode 0 Operation

CLK

IOWR_N LB =4

?

GATE


IOWR_N LB =4

?

GATE

OUTCount Value ? ? 0004H 0003H 0002H 0001H 0003H 0002H

LB =3

0001H 0000H

IOWR_N LB =4

?

GATE

OUTCount Value ? ? 0004H 0003H 0002H 0001H 0000H FFFFH0003H 0003H

(Transfer)

(Transfer) (Transfer)

(Transfer)

Figure 3:Mode 0 Operation


REL 1.0



CLK

IOWR_N LB =2

?

GATE

OUTCount Value ? ? ? 0002H 0001H 0000H FFFFH

IOWR_N LB =4

?

GATE


LB =3

0001H 0000H

0002H 0001H 0000H FFFFH(Transfer) (Transfer)




REL 1.0



CLK

IOWR_N LB =3

?

GATE

OUTCount Value ? ? 0003H 0002H 0001H

IOWR_N LB =4

?

GATE


LB =3

0001H 0003H

0003H 0002H 0001H 0003H 0002H 0001H

0002H

(Transfer) (Transfer) (Transfer)




REL 1.0



CLK

IOWR_N LB =4

?

GATE

OUTCount Value ? ? 0004H 0002H 0004H 0002H

IOWR_N LB =5

?

GATE

OUTCount Value ? ? 0004H 0002H 0000H 0004H 0002H 0004H 0002H 0000H

0004H 0002H 0004H 0004H 0004H

(Transfer) (Transfer) (Transfer) (Transfer) (Transfer)

(Transfer) (Transfer) (Transfer) (Transfer)



REL 1.0



CLK

IOWR_N LB = 4

?

GATE


IOWR_N LB = 4

?

GATE


IOWR_N LB = 5

?

GATE

OUTCount Value ? ? 0005H 0004H 0003H 0002H 0000H FFFFH0003H 0002H

FFFFH FFFEH

(Transfer)

(Transfer)

(Transfer)

LB = 3

0001H

(Transfer)



REL 1.0



CLK

IOWR_N LB =2

?

GATE

OUTCount Value ? ? ? 0002H 0001H 0000H FFFFH

IOWR_N LB =4

?

GATE

OUTCount Value ? ? 0004H 0003H 0002H 0001H 0000H FFFFH

LB =3

FFFEH 0003H

0002H 0001H 0002H 0001H

0002H




data sheet for 8254 programmable interval timer · data sheet for 8254 programmable interval timer...

Documents