Programmable Interval Timer 8254

Features• Three Independent 16-Bit Counters,• Clock input upto 10 MHz,• Status Read-Back Command,• Six Programmable Counter Modes,• Binary or BCD Counting,• Single +5V Supply,• Superset of PIT-8253.

• 8253- 2.6Mhz Max frequency• 8254-10Mhx Max frequency

PinDescriptions

PinDescriptionsCont..

DATA BUS BUFFER:• This 3-state, bi-directional, 8-bit buffer is used to interface the 8254

to the system bus.

• The Read/Write Logic accepts inputs from the system bus and generates control signals for the other functional blocks of the 8254.

• A1 and A 0 select one of the three counters or the Control Word Register to be read from/written into.

• A “low” on the RD input tells the 8254 that the CPU is reading one of the counters.

A “low” on the WR input tells the 8254 that the CPU is writing either a Control Word or an initial count.

• Both RD and WR are qualified by CS; RD and WR are ignored unless the 8254 has been selected by holding CS low.

READ/WRITE LOGIC :

CONTROL WORD REGISTER :• It is selected by the Read/Write Logic when A1,A0 = 11.

If the CPU then does a write operation to the 8254, the data is stored in the Control Word Register

• The Control Word Register can only be written to; status information is available with the Read-Back Command.

• COUNTER 0, COUNTER 1, COUNTER 2 :These three functional blocks are identical in operation.

• The Counters are fully independent. Each Counter may operate in a different Mode.

• The Control Word Register is not part of the Counter itself, but its contents determine how the Counter operates.

Modes of 8254Six Different Modes

• Mode 0: Interrupt On Terminal Count

• Mode 1: Hardware Retriggerable One-shot

• Mode 2: Rate Generator

• Mode 3: Square Wave Mode

• Mode 4: Software Triggered Strobe

• Mode 5: Hardware Triggered Strobe (Retriggerable)

• Out is low after mode is set.• Output remains low even after the count value is loaded in the counter.• The counter starts decrementing after count is loaded.• Counter decrements at each falling edge of clock.• When terminal count zero is reached output goes high.• Gate latches the terminal count with low signal.• New count at anytime will suspend the current count and initiate the new count.

MODE 0 – Interrupt on Terminal Count

• Used as a monostable mutivibrator.• Quasistable state is decided by count loaded in the register.• Gate input is used as trigger to start the count.• Output goes to low when trigger is applied and again becomes

high at terminal count.

MODE 1: Hardware Retriggerable One Shot

• When gate goes high after count is loaded, counter start to decrement.

• At terminal count output goes low for 1 clock pulse duration.• The count is again loaded and a low at the output at terminal count

continues in the same manner.• If gate goes high again the count starts from initial count.

MODE 2: Rate Generator

• When count is loaded then for half the count output is high and for the other the output is low

• For ODD Count – (N+1)/2 - High (N-1)/2 – Low• For Even Count N/2 - Out High & Low

MODE 3: Square Wave Mode

• After mode is set output goes high.• When count is loaded , counting down starts.• On terminal count output becomes low for 1 clock cycle then it

again becomes high.• Count is latched when gate signal goes low.

MODE 4: Software Triggered Strobe

• Generates a strobe at rising edge of strigger.• When count is loaded output goes high.• Counter starts counting at rising edge of trigger (GATE).• Output goes low for one clock period when terminal count

is reached.

MODE 5 : Hardware Triggered Strobe (Retriggerable)