8254 programmable interval timer - stay hungry … · · 2012-10-042012-10-04 · 8254...

8254 PROGRAMMABLE INTERVAL TIMER

29


30

Consists of three independent 16-bit programmable counters(timers).

Each counter is capable of counting in binary or binary-codeddecimal (BCD).

o maximum allowable input frequency to any counter is 10 MHz

Useful where the microprocessor must control real-time events.

o Usage includes real-time clocks, event counters, and motorspeed/direction control.


31

Timer appears in the PC decoded atports 40H–43H to do the following:

o Generate a basic timer interrupt thatoccurs at approximately 18.2 Hz

o Cause the DRAM memory system tobe refreshed

o Provide a timing source to theinternal speaker and other devices.

Timer in the PC is an 8253 instead of8254. The 8254, a higher-speed versionof the 8253


32

Pin Definitions for 8254

o A0, A1: The address inputs select one offour internal registers within the 8254.

o CLK: The clock input is the timing source for each of theinternal counters. This input is often connected to the PCLKsignal from the microprocessor system bus controller.

o CS: Chip select enables 8254 for programming and reading orwriting a counter.

o G: The gate input controls the operation of the counter in somemodes of operation


33

Pin Definitions for 8254

o OUT: A counter output is where the waveform generated bythe timer is available.

o RD: Read causes data to be read from the 8254 and oftenconnects to the IORC signal.

o VCC: Power connects to the +5.0 V power supply.

o GND: Ground connects to the system ground bus.

o WR: Write causes data to be written to the 8254 and oftenconnects to write strobe IOWC.


34

Each timer contains:

o a CLK input whichprovides the basicoperating frequency tothe timer

o a gate input pin whichcontrols the timer insome modes

o an output (OUT)connection to obtain theoutput of the timer


35

The signals that connect to theprocessor are

o the data bus pins (D7–D0),

o RD, WR, CS, and

o address inputs A1 and A0.

Address inputs are present toselect any of the four internalregisters.

o used for programming,reading, or writing to acounter


36

Timer zero generates an 18.2 Hz signal that interrupts themicroprocessor at interrupt vector 8 for a clock tick.

o often used to time programs and events in DOS

Timer 1 is programmed for 15 µs, used on the PC to request aDMA action used to refresh the dynamic RAM.

Timer 2 is programmed to generate a tone on the PC speaker.


37

Programming the 8254

o Each counter is programmed by writing a control word,followed by the initial count.

o The control word allows the programmer to select thecounter, mode of operation, and type of operation(read/write).

o also selects either a binary or BCD count


38



39


o Each counter may be programmed with a count of 1 to FFFFH;A count of 0 is equal to FFFFH+1 (65,536) or 10,000 in BCD.

o Timer 0 is used in the PC with a divide-by count of 64K(FFFFH) to generate the 18.2 Hz (18.196 Hz) interrupt clocktick.

o timer 0 has a clock input frequency of 4.77 MHz + 4 or1.1925 MHz

o The order of programming is important for each counter, butprogramming of different counters may be interleaved forbetter control.


40



41



42

Programming the 8254:Modes of Operation

o six modes (0–5) ofavailable to each ofthe 8254 counters

o each mode functionswith the CLK input,the gate (G) controlsignal, and OUT signal


43

Programming the 8254: Modes of Operation, MODE 0

o Allows 8254 to be used as an events counter.

o Output becomes logic 0 when the control word is written andremains until N plus the number of programmed counts.

o Note that gate (G) input must be logic 1 to allow the counterto count.

o If G becomes logic 0 in the middle of the count, the counterwill stop until G again becomes logic 1.


44


o Causes function as a retriggerable, monostable multivibrator(one-shot).

o G input triggers the counter so it develops a pulse at the OUTconnection that becomes logic 0 for the duration of the count.

o if the count is 10, the OUT connection goes low for 10clocking periods when triggered

o If G input occurs within the output pulse, the counter isreloaded and the OUT connection continues for the totallength of the count.


45


o Allows the counter to generate a series of continuous pulsesone clock pulse wide.

o pulse separation is determined by the count

o For a count of 10, output is logic 1 for nine clock periods andlow for one clock period.

o The cycle is repeated until the counter is programmed with anew count or until the G pin is placed at logic 0.

o G input must be logic 1 for this mode to generate acontinuous series of pulses


46


o Generates a continuous square wave at the OUT connection,provided the G pin is logic 1.

o If the count is even, output is high for one half of the countand low for one half of the count.

o If the count is odd, output is high for one clocking periodlonger than it is low.

o if the counter is programmed for a count of 5, the outputis high for three clocks and low for two clocks


47


o Allows a single pulse at the output.

o If count is programmed as 10, output is high for 10 clockingperiods and low for one period.

o the cycle does not begin until the counter is loaded withits complete count

o Operates as a software triggered one-shot.

o As with modes 2 and 3, this mode also uses the G input toenable the counter.

o G input must be logic 1 for the counter to operate forthese three modes


48


o A hardware triggered one-shot that functions as mode 4.

o except it is started by a trigger pulse on the G pin instead ofby software

o This mode is also similar to mode 1 because it is retriggerable.


49



50

Example


51

Example


52


o An 8254 connected to I/O ports 0700H, 0702H, 0704H, and0706H.

Address decoding


53


o To program 100Khz Square wave in out 0 and 200Khzcontinuous pulse in out 1

o Input clock is 8 Mhz;

o G input is pulled up

o 700H, 702H, 704H and 706H are the four registers forcontrol

o Find out the counter values for loading

o 8Mhz/ 100Khz= 80 decimal for counter 0

o 8Mhz/ 200Khz= 40 decimal for counter 1

o Find the control words for counters

o 00110110 for counter 0

o 0111 0100 for counter 1


54



55

Programming the 8254: Reading a Counter

o Each counter has an internal latch read with the read counterport operation.

o the latches will normally follow the count

o If counter contents are needed, the latch can remember thecount by programming the counter latch control word.

o counter contents are held in a latch until read


56



57



58


o When a read from the latch or counter is programmed, thelatch tracks the contents.

o When necessary for contents of more than one counter to beread at the same time, the read-back control word is used


59


o With the read-back control word, the CNT bit is logic 0 tocause the counters selected by CNT0, CNT1, and CNT2 to belatched.

o If the status register is to be latched, then the ST bit is placedat logic 0.

o the status register, which shows:

8254 programmable interval timer - stay hungry … · · 2012-10-042012-10-04 · 8254...

Documents