critical design review (cdr) requirements: prepare your cdr presentation in powerpoint form and...

Critical Design Review (CDR)

•Requirements: • Prepare your CDR presentation in PowerPoint form and provide a

copy of the presentation and any supporting data/information on a Readable only CD (CD-R). This should be provided to the instructor at the time of your presentation. Should you not have access to CD-Rs or facilities, please see the course instructor.

• Bring hard copies of the Presentation to the meeting. Make copies for the instructor, as well as both TA's.

• All members of the team are expected to take an active role in the presentation.

• The presentation should not take more than 30 minutes and is expected to be professional, and rehearsed.

•CDR presentation: • The main objective of the CDR is to present the complete design of

the system and to describe how the system is going to be implemented. Therefore, the CDR Presentation will include: • A system block diagram with a functional description of parts

and interfaces• Complete specifications and detailed design of each

subassembly, including circuit and logic diagrams, labeled parts, interfaces and pinouts, timing diagrams and waveforms

• Description of software processes with their inputs and outputs• Test results and demo of completed parts of the system (if any)• Parts list• Updated detailed schedule with planned deliverables for

Milestone 1, Milestone 2, and the final Open-Lab Expo.• Updated division of labor and responsibilities: who is going to do

what?04/21/23 1

ContentsContents1. Project Description/Overview2. System Block Diagram3. Power Calculations4. Functionality5. System Calculations6. Individual Components7. Programing Flowchart and Data8. Parts List9. Risk Matrix10. Updated Schedule11. Work Breakdown12. Division of Labor13. Project Status14. Questions? Thanks

04/21/23 2

Project IceSAR Project IceSAR

CDR PresentationFebruary 25th, 2010

Andrew BrownfieldCameron Chapman

Nicholas MansJon Wehling

Professor Albin Gasiewski

Project Project Description/OverviewDescription/OverviewStudy Synthetic Aperture Radar

(SAR)Create a forward looking SARCreate a 3D image of the terrain

in front of the antennae array

04/21/23 Cameron 4

System System Block Block DiagramDiagram

04/21/23 Cameron 5

Power CalculationsPower CalculationsPulse generator power output 10dBmPulse generator power output 0.01WTx PIN Diode insertion loss -1.1dBTx Pin Diode isolation -70dBTransmitter amplifier dB 31.5dBCirculator insertion loss -0.4dBCirculator isolation -20dBRx PIN Diode insertion loss -1.1dBRx Pin Diode isolation -70dBDigital attenuator insertion loss -1dBLow Noise Amp dB (2) 40dBBPF Passband 50MHzMixer conversion loss -8dBLPF Resistor 50ohmsLPF Capacitor 6.00E+02pFLPF time constant 3.00E+01nsecPower transmitted 40dBm

10W

Constant Variable Result

04/21/23 Cameron 6

FunctionalityFunctionality Transmitter

◦ 30 dB amplification – High signal to noise ratio of received signal significant to see objects.

◦ 580 MHz – close to ice’s transparent frequency (500MHz)

◦ 20 dB isolation to receiver from transmitter via circulator

◦ Wave generation -> windowed -> amplifier -> circulator

Antenna

◦ Antenna must transmit the transmission and receive the returns from objects

◦ >30 Watts out of Antenna

◦ Resonant to chosen transmission frequency

Receiver

◦ Receiver must intercept signals returning from objects and move it to the analog processing

◦ Signal to noise ratio > 1.5 or 2 for longest range gate

◦ Due to wave propagation, SNR for close objects ~60dB minimum 3dB

Mixing

◦ Return signals will be mixed with a quadrature hybrid split to create useful signals for phase and magnitude information

◦ Quadrature Hybrid -> Mixers -> integrator -> video amplifier

A/D

◦ I and Q integrations must then be acquired for SAR algorithms to be run

Program Routine

◦ Get the data off the DAQ

◦ Once data is obtained, run SAR algorithm

04/21/23 Cameron 7

System CalculationsSystem CalculationsSpeed of Light (c) 3.00E+08m/sBoltzmann's constant (k) 1.38E-23J/KMax Range 1000mMin Range 10mCenter Frequency 580MHzWavelength 0.517mGain 6dBPulse length 30nsecMax Return Time (s) 6.67E-06sMin Return Time (s) 6.67E-08scT/2 4.50E+00Max # of Range Gates 2.22E+02#Min # of Windows 2.22E+00#Effective Power at Transmitter 10WNoise at the receiver 2.11E-12WPulse width 3.00E+01nsRF bandwidth 3.33E+01MHzAntenna Temperature 2.90E+02KReceiver noise figure 2.00E+00dBReceiver noise temperature 1.70E+02KSystem noise temperature 4.60E+02KInput noise power (kTB) 2.11E-13W

04/21/23 Cameron 8

Signal GeneratorSignal GeneratorHP 8648B Synthesized Generator

◦9kHz- 2GHz◦~21dBm Max◦$3,500

04/21/23 Nicholas 9

PIN Diode Switches (2)PIN Diode Switches (2)Narda SS213DHS

◦15ns Switching time◦1.1dB insertion loss◦70dB Isolation◦Minimize pulse width to 30ns◦$1,200 each

04/21/23 Nicholas 10

Power amplifierPower amplifierMini-Circuits LZY-2+

◦500-1000 MHz◦32W◦47dB ◦$2200


CirculatorCirculator00550CAS SMA Coaxial Circulator

◦0.4 dB Insertion loss dB◦20dB Isolation◦$250


Micro-strip Patch AntennaMicro-strip Patch AntennaTransmits at 500MHz

◦Width: 23.7cm ◦Length: 20.15cm◦Dielectric: 2.2◦Substrate Height:

0.1588cmBuilt in house(ITLL)

using RT/Duriod (Rogers)


Digital AttenuatorDigital Attenuator

Mini-Circuits ZX76-31R5-PN+◦31.5dB attenuation with 0.5dB

steps 6bit◦Need large dB range to deal

with the 60dB range from the first and last range gates

◦Cost $105


Low noise amplifiers (2)Low noise amplifiers (2)Mini-Circuits ZFL-1000LN+

◦0.1-1000MHz◦20dBGain◦$90 each


Band Pass Filters (2)Band Pass Filters (2)K and L Filters

◦30-50 MHz bandwidth◦~$500 each


Quadrature HybridQuadrature HybridMini-Circuits ZX10Q-2-7

◦425 – 675MHz◦2 way 90 degree◦$25


Mixers (2)Mixers (2)Mini-Circuits ZX05-10L+

◦10-1000MHz◦$40 each


Low-Pass FilterLow-Pass FilterNo part thus farRequired Specs

◦Resistor: 50 Ohms◦Capacitor: 600 pF◦Time Constant: 30ns

Can make if we can’t buy


Video AmplifiersVideo AmplifiersTBDDepends on:

◦Output Voltage ◦A/D Input Signal◦Frequency


A/D requirementsA/D requirementsFront End

◦A/D resolution < 306 nanowatts/bit

◦Sampling rate > 60MHz

Back End◦Driving – Power, FPGA

control signals ◦Data delivery – data into

an FPGA buffer

04/21/23 Jon 21

A/D choice and backupsA/D choice and backups

Pros◦Within sample and resolution specs◦Can sample free

Pros◦ Very fast◦ Large signal

resolution◦ Already have

Solution 1 – Virtex chip

Solution 2 – TI ADS62P44Cons◦Need to acquire◦Resolution may cut close for far range gates

Cons◦ Xilinx

programming environment

◦ Overpowered

04/21/23 Jon 22

Program FlowchartProgram Flowchart

04/21/23 Jon 23

Data CollectionData CollectionCode Structure – 3 modules

◦Data In - maintains input data from DAQ

◦Packaging – interprets and formats data

◦Data Out – print to m-fileInputs – 14 bitsOutputs – m-file (arrays of

magnitude and phase data points)

04/21/23 Jon 24

Data ProcessingData ProcessingCode Structure

◦Choice – SAR or End-fire SAR

◦Algorithm module◦Image Output

Inputs – Matlab m-file (arrays of magnitude and phase data)

Outputs – Matlab image

04/21/23 Jon 25

Control SignalsControl SignalsPIN diode

◦2 FPGA controlled D/A’s for

digital attenuator ◦control by computer

FPGA timing resolution ◦20 ns

Driving circuits ◦voltage corrections

04/21/23 Jon 26

Parts ListParts ListPart

Qty.

Price Total Company/Model

HP 8648B Synthesized Generator3,25

0 CF 550-650

PIN Switches 21200

2,400 Narda SS212DHS

Power amplifier2,20

0 Mini-Circuits (LZY-2+)

Circulator 250Nova Microwave (0055CAS SMA connector)

3-dB Quadrature Hybrid 1 25 25 Mini-Circuits (ZX10Q-2-7)3-dB splitter 2 60 120 Mini Circuits (ZFSC-2-2-S+)Mixers 2 40 80 Mini-Circuits (ZX05-10L+)PCBs 2 100 200 Advanced CircuitsA/Ds (Maxim MAX 19588ETN+D), Op amps, electronics 2 100 150Amplifiers 2 90 180 Mini-Circuits (ZFL-1000LN+)

Band pass filter 2 5001,00

0 K&L Filter

Digital attenuators 3 105 315Mini-Circuits (ZX76-31R5-PN+ , ZX76-CP+)

Materials (cables, enclosures, hardware) 150

FPGA DAQ card 12000 2000Custom Virtex Board04/21/23 Andrew 27

Risk MatrixRisk Matrix

04/21/23 Andrew 28

Updated ScheduleUpdated Schedule

04/21/23 Andrew 29

Work BreakdownWork Breakdown

04/21/23 Andrew 30

Updated Division of LaborUpdated Division of Labor

Tasks Matlab Image Algorithm

Theory

Data Acquisition

Hardware Design

Hardware Build

Test

Andrew X X X X X

Nick X X X X X

Cameron

X X X

Jon X X X

04/21/23 Andrew 31

Project StatusProject StatusPerformance spreadsheetMicrostrip patch antenna

spreadsheetAmplifier and PIN switches

selected and purchasedReceiver design nearing

completion

04/21/23 Andrew 32

Questions?Questions?Special thanks to:Prof Albin GasiewskiStone AerospaceNASAUROPNorthrop Grumman

04/21/23 Andrew 33

Presenter Order1.Cameron2.Nick3.Jon4.Andrew

critical design review (cdr) requirements: prepare your cdr presentation in powerpoint form and...

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