class notes 4

Slides by Prof. Rodwell, Prof. WeiEE 449/549

BJTs, BiCMOS, Resistors and Capacitors

• NPN BJT• Standard Bipolar process• Available devices in Bipolar• Analog BiCMOS process• Passives

Reading assignment

• Representative process: Standard Bipolar (3.1), Analog BiCMOS (3.3)


3.1 Standard Bipolar

• still used in off the shelf products such as uA741 and 555 timer• historically important • but the process is consistent with BiCMOS • new designs are all sent to BiCMOS, not standard bipolar.

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741 opamp555 Timer

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• 10 PNPs• 10 NPNs• 11 Rs

• 11 PNPs• 12 NPNs• 2 Ds• 16 Rs


NPN BJT


PNP BJT


BJT IV

Early voltage


BJT IV

1. Essential Features

• Optimized for NPN, at the expense of PNP• But, PNP’s built from existing steps – does the job,

even though relatively poor performance.• NPN

– JI: Junction isolation – isolate current flow between this and other devices – P+ isolation

– JI-P+ touches underlying substrate – also defines N Tank– JI: P side is lower potential than N side (reverse bias)

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NPN BJT Cross-section


Junction Isolation (standard bipolar)

Parasitic PMOS(standard bipolar)

(S) (D)

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2. Fab Sequence – NPN

i. Starting Material• Lightly doped (111) Si P-type• Off-cut a few degrees to minimize NBL shadow

distortion• (111) suppresses parasitic PMOS (N-epi is the Backgate

of this PMOS, metal-1 over the FOX is Gate, P-base is the Source, and P+ Iso is the Drain. Vt = thick field threshold)

• (111) has high Thick-Field Threshold due to positive and large Qit, at Oxide-Si interface.

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Appendix.B --- Miller Indices of a Cubic Crystal

Unit cell Crystal

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Appendix.B --- Miller Indices of a Cubic Crystal

Two Example crystal planes:

(311) (233)

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2. Fab Sequence, cont’dii. N-Buried Layer• NBL mask on oxide• NBL implant (As or Sb)• NBL drive (anneal & thin oxide on top – later cause NBL shadow

iii. Epi Growth• N-type epi, 10-25 um thick• NBL shadow propagates at 45 degree angle (makes lateral shift = epi thickness)

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2. Fab Sequence, cont’div. Isolation Diffusion• Mask aligned at offset from NBL shadow• Heavy B deposition• High Temp drive (also causes oxidation), which stops

before Iso junction touches substrate

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2. Fab Sequence, cont’dv. Deep N+ sinker• Deep-N+ mask• Heavy Phosphorus deposition• High Temp drive, causes deep N+ to meet NBL (+25% overdrive),

forms thick F.Oxide

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2. Fab Sequence, cont’dvi. Base Implant• Base mask & light Boron implant forms p-type Base• Implant = precise doping level = minimizes process derived Beta (b)

variation !• Base drive: anneal & decides junction depth (CBJ)• Base implant covers Isolation regions too (BOI – base-over-isolation) ==>

increases Thick field Vt

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2. Fab Sequence, cont’d

viii. Contact• Contact mask & oxide removal

(contact OR)

ix. Metallization• Evaporate or sputter Al-Cu-Si alloy over entire wafer, at least 1um thick.• 2% Si suppress the Emitter punchthrough• 0.5% Cu improves Electromigration resistance• metal mask interconnection wires

vii. Emitter Diffusion• Emitter mask & concentrated

P source (POCl3) & brief drive

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2. Fab Sequence, cont’dx. Protective Overcoat (PO)• Compressed Nitride or phophosilicate-doped glass (PSG)

PO over entire wafer• PO mask to open bonding areas

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3. Available Devicesi. NPN 1) C=N-epi tank; B=Pbase, counter doping;

E=N+ diffusion2) Base width – set by diffusion depths of Pbase

(< min. feature size)3) NBL and deep-N+: low Collector resistance

(minimum NPN <100W, power NPN < 1W)4) Distance from bottom of Base to top of NBL sets max.op.voltage (50-80V typical). Epi thickness sets Vceo = 10V to 100+V

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NN P

3. Available Devices, cont’d

i. NPN , cont’d– Typical Parameter values of minimum-emitter NPN

• Drawn emitter area 100 mm2

• Peak Beta 150• VA, Early volt. 120V• Collector resistance (sat) 100W• IC range for max. Beta 5mA – 2 mA• Vebo (EBJ breakdown, C=open) 7 V• Vcbo (CBJ breakdown, E=open) 60V• Vceo (C-E breakdown, B=open) 45V

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i. NPN , cont’d– NPN as Diode

• CB-shorted Diode or diode-connected transistor• Breakdown voltage = Vebo = 7V• Fast switching speed• Can be used as Zener Diode also (allow +- .3V Vz

tolerance)

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3. Available Devices, cont’dii. PNP(1) Substrate PNPi) Non-isolated vertical PNPii) Vc = Vsubstrate = usually negative supply railiii) Base = N-tank; Emitter = Pbase diffusioniv) Ic exits from Substrate => substrate debiasing !v) Base width = Epi thickness – Emitter (Pbase) diffusion vi) Do not use NBL

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Layout names for NPNused to make PNP

CPNP terminals

PN

P

3. Available Devices, cont’d• Lateral PNP

• Better isolation, worse performance than Substrate PNP• B=N-tank• E, C = Pbase diffusion into N-tank = single mask• Base width = separation of E & C (Pbase) diffusions• Effective Base width << drawn width due to outdiffusion• Narrow-base lateral PNP = low VA and low punchthrough V.• Parasitic substrate_PNP• Much current near surface – where large Recomb. Centers reside• Very slow due to large parasitic junction cap at B terminal• PNP = supporting role in analog IC’s

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– Typical parameters in 40V Stand.Bipolar• Device: Lat_PNP Sub_PNP• Drawn emitter area 100mm2 100mm2

• Drawn base width 10mm N/A• Peak Beta 50 100• VA 100V 120V• IC for max. Beta 5-100mA 5-200mA• Vebo 60V 60V• Vcbo 60V 60V• Vceo 45V 45V

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3. Available Devices, cont’diii. Resistors (several types)

– Ohms per square, Sheet resistance. Typical values = 5 to 5000 W/sq.

– Base resistor: Pbase diff isolated by N-tank, typical 150-250 W/□.

– Emitter resistor: in Emitter diffusion, isolated by Pbase diffusion. Typical < 10 W/□. differential voltage < 6V due to breakdown danger.

– Pinched Base resistor: R body in Pbase, but under the Emitter diffusion. Can exceed 5000W/□ (notoriously variable). Severe voltage modulation. Differential voltage < 7V.

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BASE Resistor

EMITTER Resistor28


– Resistor Parameters• Type: EmitterBase Pinch• Rs (Sheet R) 5 W/sq. 150W/sq. 3kW/s• Min.dr.Width 8mm 8mm 8mm• Vbr 7V 50V 7V• Variability(15mm wide) 20% 20% 50+

%

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Base Pinch Resistor

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Junction Capacitor


iv. Capacitors (one type)– Base-Emitter Junction Capacitance, 0.8 fF/mm2

– Base diff. overlap Emitter diffusion, both in common tank

– Vbr = 7V– Depends on bias, varies ±50% or more– Used in compensating feedback loops where

high Cap is needed.

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4. Process Extension

• Up-Down Isolation

• Double-level Metal• Schottky Diode: Al (anode) on n-Tank• High Sheet Resistors: 1-3kW/□ by light p-type

doping.

Up-Down Iso

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Schottky Diode

High-Sheet Resistor34


High-Sheet Resistor

class notes 4

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