Computer Arithmetic

Computer ArithmeticHamcher Chapter 6

qn1-mn1-n-bitMultiplicand M(a) Register configurationControlsequencerMultiplier Q0CShift rightRegister A (initially 0)adderAdd/Noaddcontrolan1-a0q0m00MUX1 1 1 11 0 1 11 1 1 11 1 1 01 1 1 01 1 0 11 1 0 1Initial configurationAddM1 1 0 1(b) Multiplication exampleFigure 6.7. Sequential circuit binary multiplier.CFirst cycleSecond cycleThird cycleFourth cycleNo addShiftShiftAddShiftShiftAdd1 1 1 10001000100 0 0 00 1 1 01 1 0 10 0 1 11 0 0 10 1 0 00 0 0 11 0 0 01 0 0 11 0 1 1QAProductFigure 6.9. Normal and Booth multiplication schemes.01000101101000000010011010101101010110101011010000000000000001100010101001011100000000000000000000011111110100100000010110100000000011000100100012's complement ofthe multiplicand00001+1-1+1+1+1+000000000000000000000000000Figure 6.10. Booth recoding of a multiplier.001101011100110100000000001+1-1-1+1-1+1-1+1-1+Figure 6.11. Booth multiplication with a negative multiplier.01011110110000000000001100000110110011100000001000111111101101110106-()13+()78-()+11-1-MultiplierBitiBiti1-Version of multiplicandselected by biti010001110M1+M1M0MFigure 6.12. Booth multiplier recoding table.Figure 6.13. Booth recoded multipliers.1011100001111100000011110110100011010101010101010000000000000000000001-1-1-1-1-1-1-1-1-1-1-1-1-1-1+1+1+1+1+1+1+1+1+1+1+1+1+Worst-casemultiplierOrdinarymultiplierGoodmultiplieri1+i11+1(a) Example of bit-pair recoding derived from Booth recoding(b) Table of multiplicand selection decisionsFigure 6.14 Multiplier bit-pair recoding.selected at positioniMultiplicandMultiplier bit-pairi00111010111100011001001Multiplier bit on the right0000011010Implied 0 to right of LSB10Sign extension1210M1+M1M1+M0M1M2M2+M1-000011111000001111111000000000000111111011010101001111111110011000000111011001001001010000100110001001101111-6-()13+()1+78-()1-2-Figure 6.15. Multiplication requiring only n/2 summands.DIVISIONFigure 6.20. Longhand division examples.11011131426212741000100101010111011111011011000013

1101

qn1-mn1--bitDivisor MControlsequencerDividend QShift leftadderan1-a0q0m0an0Add/SubtractQuotientsettingn1+Figure 6.21. Circuit arrangement for binary division.A10111Figure 6.22. A restoring-division example.1111101111000100000000000001000001011111010001SubtractShiftRestore100001000011InitiallySubtractShift10111100001100000000SubtractShiftRestore10111010001000011QuotientRemainderShift1011110000SubtractSecond cycleFirst cycleThird cycleFourth cycle00000010110000111000011111Restoreq0Setq0Setq0Setq0SetFigure 6.23. A nonrestoring-division example.1AddQuotientRemainder000010010111111111100011000011111Shift0001100001111Add000110000100011101ShiftSubtractInitially000001000111000001110000011000ShiftAdd0010000111101ShiftSubtract000110000Restore remainderFourth cycleThird cycleSecond cycleFirst cycleq0Setq0Setq0Setq0Set NTK 20093. Arithmetic for ComputerIntroductionUnsigned NumbersSigned NumberAddition and SubtractionMultiplicationDivisionFloating Point NTK 20093.5. Multiplication3.5.1. Multiplication of unsigned numbers3.5.2. Multiplication of signed numbers

NTK 20093.5.1. Multiplication of unsigned numbersMultiplication of two n-bit unsigned numbers, the product is one 2n-bit unsigned number. 1000 Multiplicand (+8) x 1001Multiplier (+9) 1000 0000 000010001001000Product (+72)

NTK 2009Multiplication implementation - 1st versionMultiplicand, ALU, product are 64 bitMultiplier is 32 bit

NTK 2009Multiplication algorithm

NTK 2009Multiplication implementation 2nd versionMultiplicand, ALU, multiplier are 32 bitProduct is 64 bit

NTK 20093.5.2. Multiplication of signed numbersUse unsigned multiplication:Convert multiplicand & multiplier to positive numbersMultiply using unsigned multiplication algorithmChange the sign of product:If the signs of multiplicand and multiplier are the same, the product is the result of step 2.If the signs disagree, the product is twos complement of the result of step 2.

MultiplicationComplexWork out partial product for each digitTake care with place value (column)Add partial products

23Multiplication Example (unsigned) (long hand) 1011 Multiplicand (11 dec) x 1101 Multiplier (13 dec) 1011 Partial products 00000 Note: if multiplier bit is 1 copy 101100 multiplicand (place value) 1011000 otherwise zero 10001111 Product (143 dec) Note: need double length result24Flowchart for Unsigned Binary Multiplication

25Execution of Example

26Multiplying Negative NumbersThis does not work!Solution 1Convert to positive if requiredMultiply as aboveIf signs were different, negate answerSolution 2Booths algorithm

27Booths Algorithm

28Example of Booths Algorithm3*7First setup the columns and initial values.

This case 3 is in Q and M is 7. But could put 7 in Q and M as 3

29Example of Booths AlgorithmFirst cycle: Now look at Q0 and Q-1

With a 10, we Sub (A=A-M), then shift (always to the right)

Second cycle: looking at Q0 and Q-1With a 11, we only shift.

30

Example of Booths Algorithm2nd cycle Result

Third cycle, Q0 and Q-1 have 01So we will Add (A=A+M), then shift

31

3nd cycle Result

4th cycle, Q0 and Q-1 have 00So we only shift

Example of Booths Algorithm324nd cycle Result

5th cycle, Q0 and Q-1 have 00So we only shift

Example of Booths Algorithm33Example of Booths Algorithm

5th cycle ResultSince we are working in 5 bits, we only repeat 5 times34Example of Booths Algorithm

Result is A and Q so 0000010101 which is 21.Note: The sign bit is the last bit in A.35DivisionMore complex than multiplicationNegative numbers are really bad!Based on long division36001111Division of Unsigned Binary Integers10110000110110010011101100111010111011100QuotientDividendRemainderPartialRemaindersDivisor37Flowchart for Unsigned Binary Division

38