ca 1 introduction

8/8/2019 CA 1 Introduction

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BKTP.HCM

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COMPUTER ARCHITECTURE

CS2010Faculty of Computer Science and Engineering

Department of Computer Engineering

Dinh Duc Anh Vuhttp://www.cse.hcmut.edu.vn/~anhvu
http://www.cse.hcmut.edu.vn/~anhvuhttp://www.cse.hcmut.edu.vn/~anhvu


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2Computer Architecture Chapter 1 2010, Dr. Dinh Duc Anh Vu

Chapter 1

Computer Abstraction andTechnologyAdapted from Computer Organization and Design , 4 th Edition , Patterson & Hennessy, 2008


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Kilobyte 210 or 1,024 bytes

Megabyte 220 or 1,048,576 bytes sometimes rounded to 10 6 or 1,000,000 bytes

Gigabyte 230 or 1,073,741,824 bytes sometimes rounded to 10 9 or 1,000,000,000 bytes

Terabyte 240 or 1,099,511,627,776 bytes sometimes rounded to 10 12 or 1,000,000,000,000 bytes

Petabyte 250 or 1024 terabytes sometimes rounded to 10 15 or 1,000,000,000,000,000

bytes

Exabyte 260

or 1024 petabytes Sometimes rounded to 10 18 or 1,000,000,000,000,000,000bytes

Review: Some Basic Definitions


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Definition of a Computer

A computer is a data processing machinewhich is operated automatically under thecontrol of a list of instructions (called aprogram) stored in its main memory.

CentralProcessing Unit

(CPU)

MainMemory

Control

Data Transfer

Computer


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Computer System

A computer system consists of a computerand its peripherals.

Computer peripherals include input devices,output devices, and secondary memories.

Outputdevices

Inputdevices Computer

Secondarymemory

Computer System


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Classes of Computers Desktop computers

Designed to deliver good performance to a single user at low cost usually executing 3rd party

software, usually incorporating a graphics display, a keyboard, and a mouse General purpose, variety of software Subject to cost/performance tradeoff

Servers Used to run larger programs for multiple, simultaneous users typically accessed only via a

network and that places a greater emphasis on dependability and (often) security Network based High capacity, performance, reliability Range from small servers to building sized

Supercomputers A high performance, high cost class of servers with hundreds to thousands of processors,

terabytes of memory and petabytes of storage that are used for high-end scientific andengineering applications

Embedded computers (processors) A computer inside another device used for running one predetermined application Hidden as components of systems Stringent power/performance/cost constraints


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Growth in Cell Phone Sales (Embedded)

0

200

400

600

800

1000

1200

I n M i l l i o n s

Cell Phones PCs TVs

embedded growth >> desktop growth

Where else are embedded processors found?


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Embedded Computers in Your Car


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Embedded Computers in Your Car

Embedded Systems


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Embedded Processor Characteristics

The largest class of computers spanning thewidest range of applications and performance

Often have minimum performance

requirements. Example? Often have stringent limitations on cost.Example?

Often have stringent limitations on powerconsumption. Example?

Often have low tolerance for failure. Example?

d


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The Computer Revolution

Progress in computer technology Underpinned by Moores Law

Makes novel applications feasible Computers in automobiles

Cell phones Human genome project World Wide Web

Search Engines Computers are pervasive

d


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When was the first transistor invented?

The Evolution of Computer Hardware

The 1st transistor (Bell Labs, 1947)

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The Evolution of Computer Hardware

When was the first IC (integrated circuit) invented?

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The Underlying TechnologiesYear Technology Relative Perform/Unit Cost

1951 Vacuum Tube 11965 Transistor 35

1975 Integrated Circuit (IC) 900

1995 Very Large Scale IC (VLSI) 2,400,000

2005 Submicron VLSI 6,200,000,000

What if technology in the transportationindustry advanced at the same rate?

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Courtesy, Intel

Dual Core Itaniumwith 1.7B transistors

feature size&die size

Moores Law In 1965, Intels Gordon Moore

predicted that the number oftransistors that can be integratedon single chip would doubleabout every two years

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PowerPC 750 Introduced in 1999 3.65M transistors 366 MHz clock rate 40 mm 2 die size

250nm (0.25micron)technology

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Four out-of-

order cores onone chip 1.9 GHz clock

rate 65nm

technology Three levels of

caches (L1,L2, L3) on chip

IntegratedNorthbridge

AMDs Barcelona Multicore Chip

h t t p : /

/ w w w

. t e c

h w a r e

l a b s . c

o m

/ r e v i e w s

/ p r o c e s s o r s

/ b a r c e

l o n a

/

H T P H Y

, l i n k 2

H T P H Y

, l i n k 3

2MBSharedL3Cache

128-bit FPULoad/ Store

L1 DataCache

ExecutionFetch/ Decode/ Branch

Northbridge

HT PHY, link 4 Slow IO Fuses

512kBL2CacheL2

CtlL1 InstrCache D

DRPHY

Core 4 Core 3

Core 2

HT PHY, link 1 Slow IO Fuses

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Technology Scaling Road Map (ITRS)

Fun facts about 45nm transistors 30 million can fit on the head of a pin You could fit more than 2,000 across the width of

a human hair

If car prices had fallen at the same rate as theprice of a single transistor has since 1968, a newcar today would cost about 1 cent

Year 2004 2006 2008 2010 2012

Feature size (nm) 90 65 45 32 22

Intg. Capacity (BT) 2 4 6 16 32

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64

256

1,000

4,000

16,000

64,000

256,000

1,000,000

4,000,000

16,000,000

64,000,000

10

100

1,000

10,000

100,000

1,000,000

10,000,000

100,000,000

1980 1983 1986 1989 1992 1995 1998 2001 2004 2007 2010

Year

K b i t c a p a c

i t y / c

h i p

1.6-2.4 m

1.0-1.2 m

0.7-0.8 m0.5-0.6 m

0.35-0.4 m

0.18-0.25 m

0.13 m0.1 m

0.07 m

human memory human DNA

encyclopedia 2 hrs CD audio 30 sec HDTV

book

page

4X growth every 3 years!

Evolution in DRAM Chip Capacity

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Growth in Processor Performance

dce But What Happened to Clock Rates


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But What Happened to Clock Ratesand Why?

0

20

40

60

80

100

120

P o w e r

( W a t t s

)

Clock rates hit a

power wall

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h d


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A Sea Change is at Hand The power challenge has forced a change in the design of

microprocessors Since 2002 the rate of improvement in the response time of

programs on desktop computers has slowed from a factor of 1.5per year to less than a factor of 1.2 per year

As of 2006 all desktop and server companies are shippingmicroprocessors with multiple processors cores per

chip

Plan of record is to double the number of cores per chip pergeneration (about every two years)

Product AMDBarcelona

Intel Nehalem IBM Power 6 Sun Niagara2

Cores per chip 4 4 2 8

Clock rate 2.5 GHz ~2.5 GHz? 4.7 GHz 1.4 GHz

Power 120 W ~100 W? ~100 W? 94 W

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h l O l k


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Technology OutlookHigh VolumeManufacturing 2004 2006 2008 2010 2012 2014 2016 2018

Technology Node(nm) 90 65 45 32 22 16 11 8

Integration Capacity(BT) 2 4 8 16 32 64 128 256

Delay = CV/I scaling 0.7 ~0.7 >0.7 Delay scaling will slow down

Energy/Logic Opscaling >0.35 >0.5 >0.5 Energy scaling will slow down

Bulk Planar CMOS High Probability Low ProbabilityAlternate, 3G etc Low Probability High ProbabilityVariability Medium High Very HighILD (K) ~3


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Impacts of Advancing Technology Processor

logic capacity: increases about 30% per year performance: 2x every 1.5 to 2 years

Memory DRAM capacity: 4x every 3 years , about 60% per year speed: 1.5x every 10 years cost per bit: decreases about 25% per year

Disk capacity: increases about 60% per year speed: cost per bit:

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U d h C


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Under the Covers Five classic components of a computer input,

output, memory, datapath, and control Same components for all kinds of computer

Desktop, server, embedded Input/output includes

User-interface devices Display, keyboard, mouse

Storage devices Cache (SRAM), main memory (DRAM), hard disk, CD/DVD,

flash Network adapters For communicating with other computers

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C t f C t


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Components of a Computer Our primary focus:

the processor(datapath andcontrol) Implemented using

millions of transistors Impossible to

understand bylooking at eachtransistor

We need abstraction!

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C t A hit t


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Computer Architecture Computer architecture refers to those attributes of a

computer system visible to programmers, or thoseattributes that have a direct impact on the logicalexecution of programs.

I/O Devices ALU

MemorySystem

Registers

RegistersRegisters

InstructionSet

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T i l A hit t Att ib t


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Typical Architecture Attributes The instruction set (instruction types and operations)

With associated argument fields, assembly syntax, and machineencoding.

Basic data representation methods Types and sizes of operands

I/O mechanisms The basic units in the CPU Functions of the major components Instruction execution

Control flow instructions Memory organization (memory addressing techniques)

A set of addressing modes (ways to name locations)

The ways in which the basic components are interconnected Often an I/O interface (usually memory-mapped)

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Man Definitions for CA


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Many Definitions for CA The science and art of selecting and

interconnecting hardware components tocreate computers that meet functional,performance and cost goals.

The theory behind the design of a computer. The conceptual design and fundamental

operational structure of a computer system. The arrangement of computer components

and their relationships.

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Computer Organization


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Computer Organization Computer organization refers to the operational units and

their interconnections that realize the architecturalspecifications (i.e. how features are implemented) Control signals, interfaces between the computer and peripherals,

memory technology

I/O Devices ALU

MemorySystem

Hidden Reg.

Hidden Reg.Hidden Reg.

Micro-programcontroller

Registers

RegistersRegisters

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Architecture vs Organization (1)


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Architecture vs. Organization (1)

Ex. Multiplication function: Architectural issue: having a multiply instruction or

not. Organization issue: a special multiply unit or

repeated use of the add unit to performmultiplication.

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Architecture vs. Organization (2) Many computer manufacturers offer a family of

computer models, all with the same architecture butwith differences in organisation All Intel x86 family share the same basic architecture The IBM System/370 family share the same basic

architecture

This gives Different models in the family have different price and

performance

Organization changing with changing technology Code compatibility At least backwards

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Architecture vs. Organization (3)

In microcomputer, the relationship betweenarchitecture and organization is very close Changes in technology not only influence

organization but also result in the introduction ofmore powerful and more complex architectures

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Structure & Function


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Structure & Function Recognize the hierarchical nature of most complex

systems Hierarchical system is a set of interrelated subsystems,each of the latter, in turn, hierarchical in structure until wereach some lowest level of elementary subsystem

Structure is the way in which components relate toeach other

Function is the operation of individual componentsas part of the structure

In terms of description, there are 2 choices Bottom-up Top-down

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Functional View


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Functional View

All computer functions are: Data processing Data storage Data movement

Control

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Operations (a)


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Operations (a)

Data movement

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Operations (b)


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Operations (b)

Storage

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Operations (c)


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Processing from/to storage

Operations (c)

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Operations (d)


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Processing from storage to I/O

Operations (d)

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Structure Top Level


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SystemsInterconnection

CentralProcessing

UnitComputer

MainMemory

InputOutput

Peripherals

Communication

lines

Computer

Structure Top Level

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Structure The CPU


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Internal CPUInterconnection

RegistersArithmetic

andLogic Unit

ControlUnit

Computer

CPU

I/O

Memory

SystemBus

CPU

Structure The CPU

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Structure The Control Unit


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Control Unit

Registers andDecoders

SequencingLogic

ControlMemory

CPU

ControlUnit

ALU

Registers

InternalBus

Control Unit

Structure The Control Unit

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Understanding Performance


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Understanding Performance Algorithm

Determines number of operations executed Programming language, compiler, architecture

Determine number of machine instructions executed peroperation

Processor and memory system Determine how fast instructions are executed

I/O system (including OS) Determines how fast I/O operations are executed

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Why Learn This Stuff?


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y You want to call yourself a computer scientist/engineer

You want to build HW/SW people use (so you need todeliver performance at low cost) You need to make a purchasing decision or offer expert

advice

Both hardware and software affect performance The algorithm determines number of source-level statements The language/compiler/architecture determine the number of

machine-level instructions (Chapter 2 and 3)

The processor/memory determine how fast machine-levelinstructions are executed

(Chapter 5, 6, and 7)

2010dce Below the Program


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Systems software

Applications software

Hardware

g

Application software Written in high-level language

System software Operating system supervising program that interfaces the usersprogram with the hardware (e.g., Linux, MacOS, Windows)

Handles basic input and output operations Allocates storage and memory Provides for protected sharing among multiple applications

Compiler translate programs written in a high-level language (e.g., C,Java) into instructions that the hardware can execute

Hardware Processor, memory, I/O controllers

2010dce Below the Program ( Cont )


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High-level language program (in C)swap (int v[], int k)(int temp;

temp = v[k];v[k] = v[k+1];v[k+1] = temp;

)

Assembly language program (for MIPS)swap: sll $2, $5, 2add $2, $4, $2

lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31

Machine (object, binary) code (for MIPS)000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000. . .

C compiler

Assembler

one-to-many

one-to-one

g ( )

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Advantages of Higher-Level Languages ?


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Higher-level languages

As a result, very little programming is done today at theassembler level

2010dce Below the Program ( Cont )


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High-level language program (in C)swap (int v[], int k)(int temp;

temp = v[k];v[k] = v[k+1];v[k+1] = temp;)

Assembly language program (for MIPS)swap: sll $2, $5, 2

add $2, $4, $2lw $15, 0($2)

lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)jr $31

Machine (object, binary) code (for MIPS)000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000100011 00010 10000 0000000000000100101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100000000 11111 00000 0000000000001000

C compiler

Assembler

g ( )

2010dce Input Device Inputs Object Code


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p p j000000 00000 00101 0001000010000000

000000 00100 00010 0001000000100000

100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

Processor

Control

Datapath

Memory Devices

Input

Output

Network

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Processor

Control

Datapath

Memory Devices

Input

Output

Network

j y

000000 00000 00101 0001000010000000

000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

2010dce Processor Fetches an Instruction


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Processor fetches an instruction from memory

Processor

Control

Datapath

Memory Devices

Input

Output

Network000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

2010dce Control Decodes the Instruction


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Control decodes the instruction to determine whatto execute

Processor

Control

Datapath

Memory Devices

Input

Output

Network000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

000000 00100 00010 0001000000100000

2010dce Datapath Executes the Instruction


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Datapath executes the instruction as directed bycontrol

Processor

Control

Datapath

Memory Devices

Input

Output

Network000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

000000 00100 00010 0001000000100000

contents Reg #4 ADD contents Reg #2

results put in Reg #2

2010dce What Happens Next?


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Processor

Control

Datapath

Memory Devices

Input

Output

Network000000 00000 00101 0001000010000000000000 00100 00010 0001000000100000100011 00010 01111 0000000000000000

100011 00010 10000 0000000000000100

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

2010dce Processor Organization


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Control needs to have circuitry to

Datapath needs to have circuitry to

What location does it load from and store to?

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At program completion the data to be outputresides in memory

Processor

Control

Datapath

Memory Devices

Input

Output

Network

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

2010dce Output Device Outputs Data


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Processor

Control

Datapath

Memory Devices

Input

Output

Network

101011 00010 10000 0000000000000000

101011 00010 01111 0000000000000100

000000 11111 00000 0000000000001000

2010dce Abstractions


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Abstraction helps us deal with complexity

Hide lower-level detail Instruction set architecture (ISA)

The hardware/software interface

Application binary interface (ABI) The ISA plus system software interface

Implementation The details underlying and interface

2010dce The Instruction Set Architecture (ISA)


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instruction set architecture

software

hardware

The interface description separating thesoftware and hardware

2010dce Instruction Set Architecture (ISA)


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ISA, or simply architecture the abstract interfacebetween the hardware and the lowest level softwarethat encompasses all the information necessary towrite a machine language program, includinginstructions, registers, memory access, I/O, Enables implementations of varying cost and performance

to run identical software

The combination of the basic instruction set (the ISA)and the operating system interface is called theapplication binary interface (ABI) ABI The user portion of the instruction set plus the

operating system interfaces used by applicationprogrammers. Defines a standard for binary portabilityacross computers.

2010dce ISA Type Sales


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0

200

400

600

800

1000

1200

1400

1998 1999 2000 2001 2002

Other

SPARC

Hitachi SH

PowerPC

Motorola 68K

MIPS

IA-32

ARM

M i l l i o n s o

f P r o c e s s o r

2010dce How Do the Pieces Fit Together?


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Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation

I/O systemProcessor

Compiler

Operating

System

Applications

Digital DesignCircuit Design

Instruction SetArchitecture

Firmware

Memorysystem

Datapath & Control

network

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