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http://csetube.co.nr/ Lecture plan Code & name of subject: 141403 – computer organization and architecture Unit no: 2 BASIC PROCESSING UNIT Control Unit has two major functions: – To control the sequencing of information-processing tasks performed by machine – Guiding and supervising each unit to make sure that each unit carries out every operation assigned at the proper time • Control of a computer can be distributed or centralized – Early computers used distributed control and a lot of redundant hardware http://csetube.co.nr/

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

BASIC PROCESSING UNITControl Unit has two major functions:

– To control the sequencing of information-processing tasksperformed by machine– Guiding and supervising each unit to make sure that eachunit carries out every operation assigned at the proper time

• Control of a computer can be distributed or centralized– Early computers used distributed control and a lot ofredundant hardware

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

PROCESSING UNIT FEATURES

Execution of a Complete Instruction

o Add (R3), R1 /* R1 [R1] + [[R3]]

o Adds the contents of a memory location pointed to by R3 toregister R1.

o Sequence of control steps:

1. PCout, MARin, Read, Select4, Add, Zin2. Zout, PCin, Yin, WMFC3. MDRout, IRin4. R3out, MARin, Read5. R1out, Yin, WMFC6. MDRout, SelectY, Add, Zin

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

7. Zout, R1in, End

Multiple bus architecture

Single-bus structure: Control sequences are long as only one data itemcan be transferred over the bus in a clock cycle.

Figure on next slide shows a three-bus structure. All registers are combined into a single block called register file with

three ports: 2 outputs allowing 2 registers to be accessedsimultaneously and have their contents put on buses A and B, and 1

input allowing data on bus C to be loaded into a third register.

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Buses A and B are used to transfer source operands to the A and Binputs of ALU, and result transferred to destination over bus C.

For the ALU, R=A (or R=B) means that its A (or B) input ispassed unmodified to bus C.

Add R4, R5, R6 /* R6 [R4] + [R5]o Adds the contents of R4 and R5 to R6.

Sequence of control steps:o PCout, R=B, MARin, Read, IncPCo WMFCo MDRoutB, R=B, IRino R4outA, R5outB, SelectA, Add, R6in, End

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Hardwired control

The control logic is implemented with gates, F/Fs, decoders, andother digital circuitsTo execute instructions, a computer's processor must generate the

control signals used to perform the processor's actions in the propersequence. This sequence of actions can either be executed by anotherprocessor's software or in hardware.Hardware signals are generated either by hardwired control, in

which the instruction bits directly generate the signals

hardwired control usually was implemented using discretecomponents, flip-chips, or even rotating discs or drums. This can begenerally done by two methods.

The classical method of sequential circuit design. It attempts tominimize theamount of hardwire, in particular, by using only log2pflip flops to realize a p state circuit.

An approach that uses one flip flop per state. While expensive interms of flip flops, this method simplifies controller unit design anddebuggi

• Combinational logic— Determine outputs at each state.— Determine next state.

• Storage elements— Maintain state representation

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Hardwired Implementation

• The Cycles (Fetch, Indirect, Execute, Interrupt) areconstructed as a State Machine

• The Individual instruction executions can be constructedas State Machines

State Machine

CombinationalLogic Circuit

StorageElements

Inputs Outputs

Clock

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

— Common sections can be shared. There is a lot ofsimilarity

• One ALU is implemented. All instructions share it

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Microprogrammed control

A control unit whose binary control variables are stored in memory(control memory).The Control Memory contains sequences of microinstructions that provide

the control signals to execute instruction cycles, e.g. Fetch, Indirect,Execute, and Interrupt

Microinstruction : Control Word in Control MemoryThe microinstruction specifies one or more microoperations

MicroprogramA sequence of microinstruction

» Dynamic microprogramming : Control Memory =RAM

n RAM can be used for writing (to change awritable control memory)

n Microprogram is loaded initially from anauxiliary memory such as a magnetic disk

» Static microprogramming : Control Memory =ROM

n Control words in ROM are made permanentduring the hardware production.

Microprogrammed control Organization :1) Control Memory

» A memory is part of a control unit : MicroprogramComputer Memory (employs a microprogrammedcontrol unit)

--Main Memory : for storing user program(Machine instruction/data)--Control Memory : for storing microprogram(Microinstruction)

2) Control Address Register» Specify the address of the microinstruction

3) Sequencer (= Next Address Generator)» Determine the address sequence that is read from

control memory

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

» Next address of the next microinstruction can bespecified several way depending on the sequencerinput : 4) Control Data Register (= PipelineRegister )

» Hold the microinstruction read from controlmemory

» Allows the execution of the microoperationsspecified by the control word simultaneously withthe generation of the next microinstruction

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Microprogrammed control

--Typical Microinstruction Formats

--Micro-instruction Types

Each micro-instruction specifies single (or few) micro-operations tobe performed

(vertical micro-programming) Each micro-instruction specifies many different micro-operations to

be performed in parallel(horizontal micro-programming)

Vertical Micro-programming

Width is narrow n control signals encoded into log2 n bits Limited ability to express parallelism Considerable encoding of control information requires external

memory word decoder to identify the exact control line beingmanipulated

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Horizontal Micro-programming

Wide memory word High degree of parallel operations possible Little encoding of control information

Micro-instruction Address

Function Codes

JumpCondition

Internal CPU Control Signals Micro-instruction Address

Jump ConditionSystem BusControl Signals

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

Nanoprogramming– Use a 2-level control storage organization– Top level is a vertical format memory» Output of the top level memory drives the address register of the bottom(nano-level) memory– Nanomemory uses the horizontal format» Produces the actual control signal outputs– The advantage to this approach is significant saving in control memorysize (bits)– Disadvantage is more complexity and slower operation (doing 2 memory

accesses fro each microinstruction)

Example: Supppose that a system is being designed with 200 controlpoints and 2048 microinstructions– Assume that only 256 different combinations of control points are everused– A single-level control memory would require 2048x200=409,600 storagebitsA nano programmed system would use

» Microstore of size 2048x8=16k» Nanostore of size 256x200=51200» Total size = 67,584 storage bitsNano programming has been used in many CISC microprocessors

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2

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Lecture planCode & name of subject: 141403 – computer organization and architectureUnit no: 2Nano programmed machine

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