standard buses. buses 2/47 system buses communication buses

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  • Standard buses

  • Buses */47System buses Communication buses

  • Buses */47

  • System buses - MUBUS */47

  • System buses - MUBUS */47

  • System buses - MULTIBUS */47

  • System buses - MULTIBUS */47

  • System buses - MULTIBUS II */47MULTIBUS II (Intel)for any microprocessor, also for multiprocessors systems,transfer speed up to 40MB/s

    MULITIBUS II - standard of the whole multiprocessors system: architecture, buses, electrical, mechanicalStandard defines 5 buses: multichannel DMA bus; iSBX - Intel IO expansion bus; iLBX - Intel local bus extension; iSSB - Intel serial system bus; iPSB - Intel parallel system bus.

  • System buses - MULTIBUS II */47iPSBconsists of 5 sub-buses:data & address bus: multiplexed AD0..AD31 & PAR0..PAR3 (parity bit for each 8 ADx lines);arbitrage bus: BREQ i 6 lines ARBx for priority level;system control bus: lines SC0..SC9, which means depends on bus cycle;error line bus: BUSRER - parity error on ADx or SCx bus, TIMEOUT - transfer time limit exhausted;general control bus: RST, RSTNC, DCLOW, PROT, BCLK, CCLK, LACHn

  • System buses - MULTIBUS II */47iPSB bus protocol consists of 3 cycles:arbitrage cycle = arbitrage phase + switching bus to selected processor phase;transfer cycle = request phase (address & order transmitting) + answer phase (data & strobes)error message cycle = message phase + return phase

  • System buses - VME */47VME bus (Versa Module Eurocard - Mostek, Motorola, Signetics)

    1981 - ver. A: union of two standards VERSAbus & Eurocard1982 - ver. B1985 - ver. C: by IEC i IEEE commissionsnow ver. D: extension for 64-bit processors

    VME modular systems dominate on industrial and military applications market.

    Features: asynchronous, 32 data lines (ver. C), 64 (ver. D); 32 address lines (ver. C), 64 (ver. D); non-multiplexed (ver. A-C), multiplexed (ver. D); 7 interrupt levels; possible multiprocessor applications; wide offer of VME cases and modules, from many manufacturers;

  • System buses - VME */47Features cont.:

    2 types of modules: master - transfer initiator & slave - subordinate; many masters can be connected to one bus - their bus access requests are handled by priority arbiter included in bus controller, placed in most-left socket of the system case; bus controller contains following blocks:

  • System buses - VME */47Features c.d.

    max. transfer speed 40MB/s; max. bus length 50cm; number of sockets 2 .. 21; bus signals are divided into 4 sub-busses:data transfer bus (data, address and handshake);arbitrage bus (used by masters and interrupt service modules for accessing to data transfer bus);priority interrupt bus (7 interrupt request lines, interrupt acknowledge, interrupt chain system lines);additional lines bus (system reset, clocks, supply +5V, +12V, -12V, etc.); two connectors J1 i J2 (optional), each 32x3 pins, J2 contains: 8 most sensing address bits, 16 most sensing data bits, additional supply lines, 64 user-defined lines; VME modules are height of 3U with only J1 connector or 6U with both J1 & J2;

  • System buses - VME */47Example of VME CPU module:

  • System buses - VME */47Example of VME I/O or memory module:

  • System buses - PC */47PC standard busesISA - Industry Standard ArchitectureEISA - Extended Industry Standard ArchitectureMCA - Micro Channel ArchitectureVLB - VESA Local Bus (Video Electronic Standards Association)PCI - Peripheral Component Interconnect



    386 386 386 386

    486 486 486 486 486

    P5 P5 P5

    P6 (Pro)


    20Mb/s 33Mb/s 12,5Mb/s 132/264Mb/s 120Mb/s

  • System buses - MCA i VLB */47MCA- invited by IBM for PS/2; 32 data lines & 32 address lines; for multitasking O.S. & 386/486 processors; up to 16 microprocessors placed on extension cards; 32-bit DMA channels; expanded configuration memory; extension cards have identifiers;cards configured only by software; software switching on/off ; max. transfer speed 20MB/s.VLB - 32-bit local bus designed for disk & video controllers; based on 386/486 local bus; VLB socket placed behind standard ISA socket; max. transfer rate 120MB/s.

  • System buses - ISA */47ISAtransfer speed up to 10MB/s

  • System buses - EISA */47EISA (Extended Industry Standard Architecture)EISA differs from ISA: 32 data &32 address lines; new 90 signals; full application of 32-bit processors; electrical and mechanical ISA compatibility; for multiprocessor systems with priority accessing to common resources, additional processors - on extension cards; extended DMA: blocks up to 4GB (ISA up to 64/128kB);7 channels 8/16/32-bits wide (with automatic width selection);rotated instead fixed device assignment system;





  • System buses - EISA */47EISA differs from ISA, cont.: level active interrupt, instead slope like in ISA - more jamproof; 4kB configuration memory (for main-board and extension cards); extension cards configured only by software; extended bus controller; transfer speed up to 33MB/s.Applications:industrial computers;

  • System buses - PCI */47PCIInvited by Intel as processor independent, 32-bit local bus. Allows building very big systems: up to 256 PCI buses in one system; up to 32 devices per one bus; up to 8 functions per one device.Standard PC main board have 1 PCI bus servicing up to 10 devices.Clocking frequency: 33MHz (66MHz) transfer speed 132MB/s (264MB/s). 64-bit extension has doubled transfer speed.

  • System buses - PCI */47Typical PCI bus structure in PC:

  • System buses - PCI */47PCI configuration memoryEach device has 256B configuration memory, containing: 64B standard header: manufacturer and device identifiers, version of device, command register, status register, device class, minimal transfer time, etc. 192B device-specific bytes.

    Bus and device configuration - automatic/software

  • System buses - PCI */47There are 2 types of PCI devices:initiators (I), which can control the bus;slaves (S), only answer to transfer requests.Transfer can be conducted between: I I else I S.

  • System buses - PCI */47PCI interruptsThere are 4 interrupt channels, shared by many devices. PCI bus arbiter contains programmable interrupt router (PIR), which matches PCI interrupts to standard PC-AT interrupt controllers.

  • System buses AGP */47AGP (Accelerated Graphics Port) - modified PCI:introduced in 1997r.;32-bit bus for servicing a single graphic card;optimized for fast data block transfer between main memory and graphic card;transfer rate up to 2133MB/s;

  • System buses PCIe */47PCIe (Peripheral Component Interconnect Express):introduced in 2004r. (v1.0);replaces firstly AGP and then PCI;designed for servicing a single (one slot = one driver PCIe) extension card mainly graphic card;slot size depends on transfer rate and transfer rate depends on number of transferring lanes;


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