atom 20100909 d-wave unit cell overview i richard harris

Experimental Investigation of an Eight Qubit Unit Cell

in a Superconducting Optimization ProcessorPart I: Hardware Design

Richard Harris, Fabio Altomare, Andrew Berkley, Paul Bunyk,Suz Gildert, Mark Johnson, Eric Ladizinsky, Trevor Lanting

and Elena Tolkacheva

D-Wave Systems Inc.Burnaby, BC Canada

September 2010

Primary Reference: Harris et al., Phys. Rev. B 82, 024511 (2010)

Copyright, D-Wave Systems (2010) QA Processor Design September 2010 1 / 45

Outline

1 Introduction to Quantum Annealing (QA)

2 Analog Components of a QA ProcessorQubits (Quantum Ising Spins)Interqubit CouplersPersistent Current CompensationInductance TunerReadoutSchematic Layout of Analog Components

3 Scalable Control and Readout Architecture

4 Summary


Introduction to Quantum Annealing (QA)

Outline




4 Summary



Spin-1/2 in a Magnetic Field

An otherwise free spin-1/2 subjected to a magnetic field:

H=0 H=-gµBBσz

B=Bz

Spin-1/2

cc

c

c,

Energy eigenstates are coincident with the spin basis (| ↓〉,| ↑〉),independent of field orientation.



Ising Spin in a Magnetic Field

Consider a spin-1/2 at the center of a tetragonal crystal unit cell. Crystalfield (symmetry) constrains spin to point along longest axis.

H=Hcf H=-gµB(Bllσz+Btσx)

Bll

cc

cc

,

Bt

Spin-1/2 in a

tetragonal crystal

α +β

cc

β −α

Field orientation matters:

For Bt ≫ B||, ground state is (| ↓〉 + | ↑〉)/√

2.

For Bt ≪ B||, ground state is either | ↓〉 or | ↑〉.Copyright, D-Wave Systems (2010) QA Processor Design September 2010 5 / 45


Ising Spin Glass (ISG)

A non-magnetic crystal with randomly distributed spin-1/2 dopants.



Ising Spin Glass (ISG)

A non-magnetic crystal with randomly distributed spin-1/2 dopants.

J12

J23

J13

HISG =∑

i ,j>i

Jĳσ(i)z σ

(j)z

Spin-spin interactions give rise to interactions Jĳ with random sign andmagnitude. Ground state is disordered (glassy).



Finding the Ground State via Quantum Annealing (QA)

Finding the ground state of an ISG is experimentally challenging. Oneapproach is to use Bt to perform quantum annealing (QA):

BtpJij/gµB

J12

J23

J13

HQSG ≈ −gµBBt

∑

i

σ(i)x





Bt ~ Jij/gµB

J12

J23

J13

HQSG =∑

i ,j>i

Jĳσ(i)z σ

(j)z − gµBBt

∑

i

σ(i)x





Bt`Jij/gµB

J12

J23

J13

HQSG ≈∑

i ,j>i

Jĳσ(i)z σ

(j)z





Bt=0

J12

J23

J13

HISG =∑

i ,j>i

Jĳσ(i)z σ

(j)z





Bt=0

J12

J23

J13

For QA experiments on a bulk ISG (LiHox Y1−xF4) see Brooke et al.,Science 284, 779 (1999).



Application of Ising Spin Glass Physics

There are commercial applications, such as optimization and machine

learning, that involve solving problems of the form

E (~s) = −∑

i

hisi +∑

i ,j>i

Kĳsi sj , (1)

where si = ±1 and −1 ≤ hi , Kĳ ≤ +1. The optimal solution ~sgs minimizes

E (~s). Substituting si → σ(i)z yields an ISG Hamiltonian

HISG(t)

E0(t)= −

∑

i

hiσ(i)z +

∑

i ,j>i

Kĳσ(i)z σ

(j)z , (2)

where E0(t) has units of energy. Now |~sgs〉 is the ground state of an ISG.Applying a global transverse field ∝ Γ(t) allows one to implement QA:

HQSG(t)

E0(t)= −

∑

i

hiσ(i)z +

∑

i ,j>i

Kĳσ(i)z σ

(j)z − Γ(t)

∑

i

σ(i)x . (3)

See Farhi et al., Science 292, 472 (2001) for details.



Why Implement QA?

Reason 1:

QA is a physically motivated method of harnessing quantum resources.Moreover, thermodynamics need not always thwart the intendedcomputation [see Amin et al. Phys. Rev. Lett. 100, 060503 (2008)].

Reason 2:

Valuable real-world optimization problems can be cast as an Ising spinglass. Why not build hardware that excels at solving such problems?

Reason 3:

Implementing QA is an excellent warmup exercise before implementingeven harder architectures. For example, universal adiabatic quantumcomputation [see Biamonte and Love, Phys. Rev. A 78, 012352 (2008)].


Analog Components of a QA Processor

Outline




4 Summary


Analog Components of a QA Processor

Implementing a Programmable QSG

D-Wave builds programmable hardware whose low energy Hamiltonian

HQSG(t)

E0(t)= −

∑

i

hiσ(i)z +

∑

i ,j>i

Kĳσ(i)z σ

(j)z − Γ(t)

∑

i

σ(i)x

can be used for solving optimization problems. We have adopted atop-down approach in which the QSG architecture drives the design.

Specific ingredients that must be incorporated into the hardware:

Quantum Ising spins (qubits) that can be annealed (Γ).

Local biases on each spin (hi ).

Tunable couplings between spins (Kĳ ).

A means of unambiguously reading the final spin configuration |~s〉.

Additional constraints:

The design must be robust against realistic fabrication variations.

The design must be realistically scalable up to 1000’s of qubits.


Analog Components of a QA Processor Qubits (Quantum Ising Spins)

Outline




4 Summary



rf-SQUID Flux Qubit

A Josephson junction of critical current Icin a superconducting loop of inductanceLbody . Loop is subjected to an externalflux bias Φx

q ≈ Φ0/2 (Φ0 ≡ h/2e ).

IcFq

x

jq

Lbodycc

c

Persistent current Ipq ∝ phase drop ϕq:

I pq ≡ Ic sin (ϕq) =

Φ0ϕq/2π − Φxq

Lbody

-3 -2 -1 0 1 2 30

5

10

15

20

Iq (mA)p

E/h

(G

Hz)

cc

Fq = F0/2x

-3 -2 -1 0 1 2 30

5

10

15

20

Iq (mA)p

E/h

(G

Hz)

cc

Fq t F0/2x

Bistable potential supports two countercirculating states | ↓〉 and | ↑〉.Copyright, D-Wave Systems (2010) QA Processor Design September 2010 13 / 45


Flux Qubits as Quantum Ising Spins

Low energy Hamiltonian is that of a qubit or a quantum Ising spin:

Hq = −1

2[ǫqσz + ∆qσx ]

ǫq = 2∣

∣I pq

∣

∣

(

Φxq − Φ0/2

)

-3 -2 0 2 30

5

10

15

20

Iq (mA)p

E/h

(G

Hz)

eq

1eq

2+Dq2

Fq t F0/2x

-|Iq|p +|Iq|

p

Parameter Qubit Quantum Ising Spin

ǫq Bias Energy Longitudinal Field (×gµB)∆q Tunneling Energy Transverse Field (×gµB)∣

∣Ipq

∣

∣ Persistent Current gµB

∣

∣Ipq

∣

∣ and ∆q are the defining properties of any flux qubit.



CCJJ Flux Qubit

We use a compound-compound Josephson junction (CCJJ) rf SQUID inour designs. One can define a net phase ϕq across the entire CCJJ:

I1 I2FL

x Fqx

jq

I3 I4FR

xFccjj

x

Lbody

Lccjj/2 Lccjj/2

Ic

Fqx

jq

Lbody@Ic=Fcn(FL,FR,Fccjj)

xx x

Key advantages of the CCJJ rf SQUID flux qubit:

The flux Φxccjj allows one to tune ∆q (transverse field).

The flux biases (ΦxL,Φx

R) can be used to mitigate the effects ofvariations in junction critical current, I1 6= I2 6= I3 6= I4.One can homogenize the net Ic(Φ

xL,Φx

R) between multiple CCJJ fluxqubits by carefully choosing (Φx

L,ΦxR).

See Harris et al. Phys. Rev. B, 81 134510 (2010) for details.



CCJJ Flux Qubit Parameters

The CCJJ flux qubit provides tunable ∆q(Φxccjj) [transverse field].

However,∣

∣

∣Ipq

(

Φxccjj

)∣

∣

∣[gµB ] is also altered by this control.

Hq = −1

2[ǫqσz + ∆qσx ] , ǫq = 2

∣

∣I pq

∣

∣

(

Φxq − Φ0

q

)

−0.63 −0.625 −0.62 −0.615 −0.6110

5

106

107

108

109

1010

Φx

ccjj/Φ0

∆q/h

(Hz)

Bistable1QLZ

2QLZΦx

ccjj Locked

2QLZΦx

ccjj Unlocked

−0.65 −0.64 −0.63 −0.62 −0.61 −0.6 −0.590

0.25

0.5

0.75

1

1.25

1.5

Bistable Monostable

Φx

ccjj/Φ0

|Ip q|(

µA

) q0

q1

q2

q3

q4

q5

q6

q7

Living with this latter phenomenon adds complexity to implementing QAwith flux qubits [see Harris et al., Phys. Rev. B 82, 024511 (2010)].


Analog Components of a QA Processor Interqubit Couplers

Outline




4 Summary



Interqubit Couplers

Mij

Coupler

{

Qubit i Qubit j

FcoxMco,l Mco,r

3 2 1 0 1 2 30

5

10

15

20

3 2 1 0 1 2 30

5

10

15

20

0 0.2 0.4 0.6−4

−2

0

2

+MAFM

−MAFM

Φxco/Φ0

Mij

(pH

)

A two-junction rf SQUID provides a sign and magnitude tunable mutualinductance

Mĳ = Mco,lMco,rχĳ (Φxco) ,

where χĳ (Φxco) represents a tunable linear magnetic susceptibility (units of

H−1). Maximum antiferromagnetic (AFM) coupling strength is denoted asMAFM. We generally restrict operation −MAFM . Mĳ ≤ MAFM.




A Network of Inductively Coupled Flux Qubits

Combining multiple qubits and couplers yields a QSG. The low energyHamiltonian for general bias conditions can be written as

H0(t) = −1

2

∑

i

[

ǫi (t)σ(i)z + ∆q(t)σ

(i)x

]

+∑

i ,j>i

Jĳ(t)σ(i)z σ

(j)z . (4)

ǫi(t) ≡ 2∣

∣I pq (t)

∣

∣

(

Φxi (t) − Φ0

i

)

Jĳ ≡ Mĳ

∣

∣I pq (t)

∣

∣

2

Eq. (4) has terms of the same symmetry as the QSG Hamiltonian:

H0(t)

E0(t)= −

∑

i

hiσ(i)z +

∑

i ,j>i

Kĳσ(i)z σ

(j)z − Γ(t)

∑

i

σ(i)x (5)

One then needs to choose a convenient E0(t) to map problem instances(hi , Kĳ) onto the hardware controls Φx

i (t) and Mĳ . Living with flux qubits(not ‘real’ quantum Ising spins) requires additional hardware . . .Copyright, D-Wave Systems (2010) QA Processor Design September 2010 19 / 45

Analog Components of a QA Processor Persistent Current Compensation

Outline




4 Summary



Mapping ISG Problems onto Hardware (1)

Let us complete the mapping of problem instance specifications ontohardware settings: (hi , Kĳ ) → (Φx

i (t), Mĳ). Define E0(t) ≡ MAFM|I pq (t)|2,

where MAFM is the maximum AFM interqubit coupling.

H0(t)

E0(t)= −

∑

i

hiσ(i)z +

∑

i ,j>i

Kĳσ(i)z σ

(j)z − Γ(t)

∑

i

σ(i)x (6a)

Simply solving for QSG parameters hi , Kĳ , and Γ(t) yields the following:

hi =ǫi(t)

2E0(t)=

Φxi (t) − Φ0

i

MAFM|I pq (t)| (6b)

Kĳ =Jĳ(t)

E0(t)=

Mĳ

MAFM(6c)

Γ(t) =∆q(t)

2E0(t)=

∆q(t)

2MAFM|I pq (t)|2 (6d)

Consider the forms of hi , Kĳ , and Γ(t) carefully . . .Copyright, D-Wave Systems (2010) QA Processor Design September 2010 21 / 45



First, look at the transverse component that is meant to facilitate QA:

Γ(t) =∆q(t)

2E0(t)=

∆q(t)

2MAFM|I pq (t)|2

−0.63 −0.625 −0.62 −0.615 −0.6110

5

106

107

108

109

1010

Φx

ccjj/Φ0

∆q/h

(Hz)

Bistable1QLZ

2QLZΦx

ccjj Locked

2QLZΦx

ccjj Unlocked

−0.65 −0.64 −0.63 −0.62 −0.61 −0.6 −0.590

0.25

0.5

0.75

1

1.25

1.5

Bistable Monostable

Φx

ccjj/Φ0

|Ip q|(

µA

) q0

q1

q2

q3

q4

q5

q6

q7

Sweeping the flux bias Φxccjj from right to left in time t ensures that

Γ(t = 0) ≫ 1 and Γ(t = tf ) ≪ 1, thus implementing QA.




Next, look at the problem instance parameters:

Kĳ =Jĳ(t)

E0(t)=

Mĳ

MAFM

hi =ǫi(t)

2E0(t)=

Φxi (t) − Φ0

i

MAFM|I pq (t)|

−0.65 −0.64 −0.63 −0.62 −0.61 −0.6 −0.590

0.25

0.5

0.75

1

1.25

1.5

Bistable Monostable

Φx

ccjj/Φ0

|Ip q|(

µA

) q0

q1

q2

q3

q4

q5

q6

q7

The problem parameters hi and Kĳ are supposed to be time-independent.This comes out very naturally for Kĳ , but not so for hi .

There is an imbalance in hi since ǫi (t) ∝∣

∣Ipq (t)

∣

∣ while Jĳ(t) ∝∣

∣Ipq (t)

∣

∣

2.

One needs to correct this with Φxi (t) − Φ0

i ∝∣

∣Ipq (t)

∣

∣.



Persistent Current Compensator (IPC)

Flux bias needed to implement persistent current compensation on qubit i :

Φxi (t) = hi × MAFM|I p

q (t)| + Φ0i . (7)

Φ0i is a trivial static flux offset (more later). Supply the time-dependent

portion via an external current bias Ig (t) = α|I pq (t)| (where α ≫ 1)

through a tunable mutual inductance

Mi(ΦxIPC ) = hi MAFM/α (8)

Ig(t)Mi

{

IPC

FIPCx

Fqx

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7−0.2

−0.15

−0.1

−0.05

0

0.05

0.1

ΦxIp,i/Φ0

Mi(p

H)

+MAFM/α

−MAFM/α

M0

M1

M2

M3

M4

M5

M6

M7

For complete details, see Harris et al., Phys. Rev. B 82, 024511 (2010).


Analog Components of a QA Processor Inductance Tuner

Outline




4 Summary


Analog Components of a QA Processor Inductance Tuner

Inductance Tuner

Interqubit couplers inductively load the qubits. Changing coupler χi will

change Lq, thus altering ∆q(Φxccjj) (transverse field) and

∣

∣

∣Ipq (Φx

ccjj)∣

∣

∣(gµB).

χ1 χn

FLTFLTx

Mco,1 Mco,n

=LbodyLccjj/2 Lccjj/2

−0.4 −0.2 0 0.2 0.40

4

8

12

16

ΦxLT /Φ0

δLq

(pH

)

Provide an inductance tuner (LT) with which one can compensate Lq to

render ∆q(Φxccjj) and

∣

∣

∣Ipq (Φx

ccjj)∣

∣

∣independent of coupler settings.

Lq = Lbody + Lccjj/4 +

n∑

i=1

M2co,iχi +

LLT

cos(

πΦxLT /Φ0

) (9)



Analog Components of a QA Processor Readout

Outline




4 Summary


Analog Components of a QA Processor Readout

QFP-Enabled Readout

Qubits are localized into | ↓〉 or | ↑〉 by the QA algorithm (∆q → 0). Weuse a quantum flux parametron (QFP) as a type of preamplifier of thequbit’s final state to boost the fidelity to in excess of 99.99% in practice.

iro(t)

QFP

vro(t)

Qubit dc SQUID

Flatchx

Frox

c

c

Basic readout operation:1 QFP is annealed in the presence of | ↓〉 or | ↑〉 by ramping Φx

latch fromΦ0/2 to Φ0, thus latching QFP state into its own | ↓〉 or | ↑〉.

2 ‘Latched’ state of QFP is then read by a dc SQUID usingconventional switching measurement.

See Berkley et al., arXiv:0905.0891 (2009) for details.(accepted in Supercond. Sci. Technol.)


Analog Components of a QA Processor Schematic Layout of Analog Components

Outline




4 Summary



Ingredients for a QA Processor

The complete qubit has a CCJJ, L tuner (LT),∣

∣Ipq

∣

∣ compensator (IPC),and readout (RO). Each qubit is subjected to two time-dependent currentbiases, Ig (t) that provides the

∣

∣Ipq

∣

∣-compensation signal and ICCJJ thatprovides the annealing signal Φx

ccjj(t).

Fccjjx

Ig

CCJJ

LT

IPC

RO

CouplerQubit

Qubits need to be arranged on a lattice connected by couplers to form aQA processor . . .



Schematic Layout - Eight Qubit Unit Cell

q0

RO

CCJJ

LT

IPC

Take the CCJJ rf SQUID and stretch out its body.Replicate four vertical qubits q0 → q3 spaced evenly apart.Overlay four horizontal qubits q4 → q7.Overlay internal couplers (ICO) at intersections of qubit bodies.Overlay portions of external couplers (XCO) at extrema of qubits.




q0 q1 q2 q3

RO

CCJJ

LT

IPC





q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

IPC





q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

ICO

IPC





q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

ICO

XCO

XCOIPC




Schematic Layout - Multiple Unit Cells

Larger processors are made by tiling the unit cell to the top, bottom, left,and right. Shown is a 128-qubit 352-coupler array.


Scalable Control and Readout Architecture

Outline




4 Summary




A 128-qubit processor requires 1632 control signals to operate. It is notpractical to rout one external bias per signal for many reasons:

Processor must be thermalized to a mixing chamber of a dilutionrefrigerator, limited heat load.

Processor active circuit size O(mm2), limited room for passing signalsonto chip (wirebonds).

Limited space on chip available for wiring channels. Crosstalk is aserious issue.

One needs to adopt more efficient strategies for controlling the processor:

Use programmable on-chip non-volatile memory to supplytime-independent biases.

Share currents for time-dependent biases among multiple devices(works with superconducting circuits).



Control of Qubits and Couplers

Required signals:

5 static (but programmable) flux biases per qubit, 1 per coupler.

2 time-dependent current biases per qubit.

CCJJ Minor

DAC

CCJJ Minor

DAC

L Tuner

DAC

|Iq | Comp.

DAC

p

Qubit Flux

DAC

Coupler

DAC

Ig(t)

Iccjj(t)

Fccjjx Qubit

Coupler

We use programmable magnetic memory (PMM) to provide static fluxesand shared current biases to provide the time-dependent signals.



Programmable Magnetic Memory (PMM)

Static flux biases provided by digital-to-analog converters (DACs). Inputsto DACs store integer flux quanta (Φ0 ≡ h/2e). DACs are addressable byusing a demultiplexing circuit that routs single flux quanta (SFQ). Memoryis non-volatile and demultiplexing circuit is ‘quiet’ when not in use.

See Johnson et al., Supercond. Sci. Technol. 23, 065004 (2010).Copyright, D-Wave Systems (2010) QA Processor Design September 2010 36 / 45


Global Analog Bias Lines

Sharing of current bias lines between multiple qubits provides a significantreduction in the number of external biases needed to run the processor.

Annealing Bias Iccjj(t)

Iccjj(t)

CCJJ

Qubit 1

CCJJ

Qubit 2

CCJJ

Qubit n∣

∣Ipq

∣

∣-Compensation Bias Ig (t) = α∣

∣Ipq (t)

∣

∣

Ig(t)

Body

Qubit 1

Body

Qubit 2

Body

Qubit n

M1 M2 Mn

See Johnson et al., Supercond. Sci. Technol. 23, 065004 (2010).



XY Addressable Readout

Use a single common QFP latch across entire chip. Share dc SQUIDcurrent (flux) biases as columns (rows).

c

c

c

c

c

c

c

c

Current Bias

Column 1

Current Bias

Column 2

Flux Bias

Row 1

Flux Bias

Row 2

QFP Latch

RO11 RO12

RO21 RO22

See Berkley et al., arXiv:0905.0891 for details.



Complete Eight Qubit Unit Cell

q0 q1 q2 q3q4

q5

q6

q7

RO

CCJJ

LT

ICO

XCO

XCOIPC

q0

q1

q2 q3q4

100 mm

q5

q6

q7

Complete unit cell with PMM circuitry.



Complete Multiple Unit Cells

Complete 128-qubit chip with PMM circuitry.



A Scalable QA Processor Architecture

How well does the architecture scale?

Element Count

Qubits 128Couplers 352QFPs 128dc SQUIDs 128PMM 992

A 128-qubit processor requires only 84 differential external biases tocalibrate and operate (compare with the initial estimate of 1632).



Not Covered in this Presentation . . .

There are many other parts neededto realize a functional QA processor:

Circuit Design and Layout

Fabrication

Cryogenics

Wiring/Filtering

Magnetic Shielding

Room TemperatureElectronics

Calibration Methods

Software


Summary

Outline




4 Summary


Summary

Summary

Key conclusions thusfar:

An architecture that enables quantum annealing of a lattice ofcoupled flux qubits has been described.

A scalable control and readout architecture has been developed.

Prototype processors based upon this design have been fabricated.

Does it work? This is the topic of Part II . . .


Summary

Useful References

Qubits

Harris et al. Phys. Rev. B, 81 134510 (2010).

Couplers

Harris et al. Phys. Rev. B, 80 052506 (2009).

Scalable Control Circuitry

Johnson et al., Supercond. Sci. Technol. 23, 065004 (2010).

XY-Addressable Readout

Berkley et al., arXiv:0905.0891 (2009).(accepted in Supercond. Sci. Technol.)

Unit Cell Architecture

Harris et al., Phys. Rev. B 82, 024511 (2010).


atom 20100909 d-wave unit cell overview i richard harris

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