aida design review davide braga steve thomas asic design group 11 march 2008

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AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

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AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008. Overview. Noise consideration Time jitter Intermediate Energy Channel Crosstalk Continuous reset feedback Slew-rate limited configuration Low Frequency Feedback Loop. Noise Analysis. - PowerPoint PPT Presentation

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Page 1: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

AIDA design reviewDavide Braga

Steve Thomas

ASIC Design Group

11 March 2008

Page 2: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 2

- Noise consideration- Time jitter- Intermediate Energy Channel- Crosstalk- Continuous reset feedback

- Slew-rate limited configuration- Low Frequency Feedback Loop

Overview

Page 3: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 3

Noise Analysis

Noise vs. shaping time, detector leakage current: Idet=1nA, 10nA

Idet=1nA Idet=10nA

shaping Time [μs] shaping Time [μs]

No

ise

V]

No

ise

V]

2 1.75

205150

Page 4: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 4

Noise vs. shaping time, detector leakage current: Idet=100nA, 1μA

→Idet must be < 100nA (detector cooling?)

Idet=100nA Idet=1μA

shaping Time [μs] shaping Time [μs]

No

ise

V]

No

ise

[m

V]

2

325

20.25

Noise Analysis

0.5

Page 5: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 5

Time Jitter

Comparator with hysteresis from previous design

Transient noise simulation with multiple noise seeds

[μs]

[V] Output preAmplifier

Page 6: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 6

Time Jitter

Qin [MeV] Ilk=1nA Ilk=100nA

0.2 2.7e-9 4e-9

0.5 1e-9 1.6e-9

1 7.3e-10 1.1e-9

2 5.2e-10 7.6e-10

5 3e-10 4.5e-10

20 1.3e-10 2.1e-10

Jitter rms [s]

Comparator threshold=0.26% FSR

Page 7: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 7

Intermediate Energy Channel

Cf=30pF

→ decreases with Cf

preAmplifier modified to increase slew rate in order to limit input voltage spikes

Cf=30pF

Cf=0.6pF

0wC

CCriseTime

f

fD

preAmplifier Output

rise Time Cf=0.6pF Cf=30pF

preAmp ref=0.1V

~91ns ~13ns

preAmp ref=1.6V

~91ns ~24ns

time [μs]

[V]

Page 8: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 8

Crosstalk

Fast collection time increases crosstalk

Simulation with 3 adjacent channels

Page 9: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 9

Crosstalk

input voltage shaper output

Coupling capacitance adjacent channels: Ccoupl=58pF

→ Considerable response even in the third channel

(but different peaking time: this may be used to discriminate spurious signals)

(see “AIDA Technical Specification”, pag.17)

Page 10: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 10

Crosstalk

2nd channelshaper output

Adjacent channel response < 0.25% FSR

→ Ccoupl<2pF

Ccoupl=58pF

Ccoupl=2pF

Page 11: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 11

Continuous Reset System

Shaper and preAmplifier have different input references

→ M1-M2 don’t match, usual pole-zero cancellation doesn’t work

Cf Cf*N

W W*NVbias

-A -A

Rf

Vref_amp Vref_sh

- a non-inverting shaper with time-constant of ~1μs would allow the use of a common reference, but would discharge the preamp’s output too quickly

- Using the pulsed reset, which is needed anyway for short dead time, would work without p-z canc.

M1 M2

Page 12: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 12

Isig

Slew-rate limited reset configuration

The source is towards the input side to fix the operating point

This is not possible if the leakage current is in the opposite direction of the signal current! -A

Ibias

Ileak

Vref_amp

(see S.Thomas, “AIDA amplifier feedback options” 20/02/07)

Ileak

S=0.1V D=[0.1:1.6]V

Isig

Ileak

S=1.6V D=[1.6:0.1]V

VdsP>0! VdsN<0!

Page 13: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 13

Slew-rate limited reset configuration

If the leakage current has the same polarity of the signal:

- pMOS feedback transistor: linearity ~=0.4%

- nMOS feedback transistor: linearity ~=0.015%

(Linearity improves for the Medium Energy Channel)

Page 14: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 14

Low Frequency Feedback Loop reset configuration

This architecture works with both leakage current polarities

Linearity: 0.6%

Input current [μA]

-0.2

0.4

Page 15: AIDA design review Davide Braga Steve Thomas ASIC Design Group 11 March 2008

11 March 2008 AIDA design review 15

Issues

- Detector current critical for noise

- Important to limit interstrip capacitance between adjacent channels

- Leakage current polarity is important in designing preamplifier’s feedback