a new simple technique for capacitance measurement

3
640 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. IM-35, NO.4, DECEMBER 1986 The output pulses of the BRM during the second half of the mea- suring cycle (designated I) are counted by the BCD counter. IV. LEAD-LAG INDICATOR The lead -lag indicator used is based on the same idea mentioned in [1]. The square current signal (waveform D) is used to control the set and reset inputs of the S-R flip-flop (see Fig. 4), while the square voltage signal SQV is differentiated and used as a clock in- put to the flip-flop. L Time ---"""' ... Fig. 3. Typical waveforms of the DPC. G Q V. CONCLUSIONS The accuracy of the digital PF meter was evaluated under dif- ferent input conditions. The accuracy with rated input voltage and current signals was found to be in the O.l-percent ± I-digit range. Such an accuracy is obtained with an input current ranging from 0.1 to 10 times its rated value or an input voltage ranging from 0.1 to 4 times its rated value. In general, errors in the designed digital power- factor meter arise from the following: 1) distortion in the input signal waveforms; 2) squaring, averaging, and rectifying cir- cuits; and 3) small errors in the DPC circuit due to the voltage-to- frequency conversion process. REFERENCES sav CK o Q SQV ---1 ....... ..... -_....... Ck ULJ----- rLJL I 1-- -- I I rt.r v rt.r: lead [1] M. A. H. Abdul-Karim and D. Boghosian, "A digital power-factor meter design based on binary rate multiplication techniques," IEEE Trans. Instrum. Meas., vol. IM-29, no. 4, pp. 435-438, Dec. 1980. [2] M. S. M. AI-Ani and M. A. H. Abdul-Karim, "Digital power factor meter design based on voltage to frequency conversion," Int. J. Elec- tron., vol. 52, pp. 463-470, 1982. [3] B. A. Hafeth and M. A. H. Abdul-Karim, "Digital power factor meter based on non-linear analogue-to-digital conversion," Int. J. Electron., vol. 58, no. 3, pp. 513-519, 1985. [4] K. H. A. Hameed and M. A. H. Abdul-Karim, "A digital power factor meter design," in Proc. Iraqi Conf. Engineering (ICE '85) (Baghdad, Iraq), Dec. 16-19, 1985, pp. 89-93. [5] N. Ashoor and A. Abdul-Kareem, "New digital power factor meter design, " in Proc. Iraqi Conf. Engineering (ICE '85) (Baghdad, Iraq), Dec. 16-19, 1985, pp. 94-98. la9 Fig. 4. The circuit and waveforms of lead-lag indicator. When the D flip-flop is triggered due to the change in the com- parator output state, the counter starts counting down and S3 is closed again. Thus the output voltage of the integrator V o ramps up to V ref The new condition lasts until the digital output of the up/ down counter reaches binary zero. Then the D flip-flop is cleared, S3 is opened, and a new measuring cycle starts. From Fig. 3 one can conclude that waveform G has a frequency F which is represented as A New Simple Technique for Capacitance Measurement WASIM AHMAD Abstract-A new and simple technique for capacitance measurement is presented. It uses a dc supply, and capacitance is measured using a single resistance variation. Experimental results confirm the theory de- veloped. Hence, the DPC is a VFC with K J (VFC conversion constant) de- fined as 1 F=- 2T . Substituting (10) into (11) yields F = V t/(2V refRC) = KJV t (11) (12) I. INTRODUCTION Inductively coupled and other ac bridges have been commonly used for capacitance measurements. The development of twin-T networks pushed this technology far ahead by providing a tech- nique to measure capacitances with high accuracy. However, an accurate measurement of capacitances using these methods calls for highly accurate standard capacitors (e.g., cylindrical cross ca- pacitors) and a highly skilled bridge balancing which make the above methods complicated. An IC bridge is relatively simpler but Consequently, the DPC is used as a VFC during the second half of the measuring cycle (as explained in the previous section) with V 2 as its input to obtain a frequency proportional to V m cos cPo Manuscript received August 31 1985; revised February 24, 1986. The author is with the Department of Electrical Engineering, Aligarh Muslim University, Aligarh, India. IEEE Log Number 8610426. 0018-9456/86/1200-0640$01.00 © 1986 IEEE

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Page 1: A new simple technique for capacitance measurement

640 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. IM-35, NO.4, DECEMBER 1986

The output pulses of the BRM during the second half of the mea-suring cycle (designated I) are counted by the BCD counter.

IV. LEAD-LAG INDICATOR

The lead-lag indicator used is based on the same idea mentionedin [1]. The square current signal (waveform D) is used to controlthe set and reset inputs of the S-R flip-flop (see Fig. 4), while thesquare voltage signal SQV is differentiated and used as a clock in-put to the flip-flop.

L

Time---"""'...Fig. 3. Typical waveforms of the DPC.

G

D-------..~--~S Q

V. CONCLUSIONS

The accuracy of the digital PF meter was evaluated under dif-ferent input conditions. The accuracy with rated input voltage andcurrent signals was found to be in the O.l-percent ± I-digit range.Such an accuracy is obtained with an input current ranging from0.1 to 10 times its rated value or an input voltage ranging from 0.1to 4 times its rated value. In general, errors in the designed digitalpower-factor meter arise from the following: 1) distortion in theinput signal waveforms; 2) squaring, averaging, and rectifying cir-cuits; and 3) small errors in the DPC circuit due to the voltage-to-frequency conversion process.

REFERENCES

sav

CK

o

Q

SQV---1 .......~_.....-_....... Ck

ULJ----- rLJLI 1-- - - I Irt.r v rt.r:

lead

[1] M. A. H. Abdul-Karim and D. Boghosian, "A digital power-factormeter design based on binary rate multiplication techniques," IEEETrans. Instrum. Meas., vol. IM-29, no. 4, pp. 435-438, Dec. 1980.

[2] M. S. M. AI-Ani and M. A. H. Abdul-Karim, "Digital power factormeter design based on voltage to frequency conversion," Int. J. Elec-tron., vol. 52, pp. 463-470, 1982.

[3] B. A. Hafeth and M. A. H. Abdul-Karim, "Digital power factor meterbased on non-linear analogue-to-digital conversion, " Int. J. Electron.,vol. 58, no. 3, pp. 513-519, 1985.

[4] K. H. A. Hameed and M. A. H. Abdul-Karim, "A digital power factormeter design," in Proc. Iraqi Conf. Engineering (ICE '85) (Baghdad,Iraq), Dec. 16-19, 1985, pp. 89-93.

[5] N. Ashoor and A. Abdul-Kareem, "New digital power factor meterdesign, " in Proc. Iraqi Conf. Engineering (ICE '85) (Baghdad, Iraq),Dec. 16-19, 1985, pp. 94-98.

la9

Fig. 4. The circuit and waveforms of lead-lag indicator.

When the D flip-flop is triggered due to the change in the com-parator output state, the counter starts counting down and S3 isclosed again. Thus the output voltage of the integrator Vo ramps upto Vref • The new condition lasts until the digital output of the up/down counter reaches binary zero. Then the D flip-flop is cleared,S3 is opened, and a new measuring cycle starts.

From Fig. 3 one can conclude that waveform G has a frequencyF which is represented as

A New Simple Technique for CapacitanceMeasurement

WASIM AHMAD

Abstract-A new and simple technique for capacitance measurementis presented. It uses a dc supply, and capacitance is measured using asingle resistance variation. Experimental results confirm the theory de-veloped.

Hence, the DPC is a VFC with KJ (VFC conversion constant) de-fined as

1F=-2T .

Substituting (10) into (11) yields

F = Vt/(2VrefRC)

= KJV t •

(11)

(12)

I. INTRODUCTION

Inductively coupled and other ac bridges have been commonlyused for capacitance measurements. The development of twin-Tnetworks pushed this technology far ahead by providing a tech-nique to measure capacitances with high accuracy. However, anaccurate measurement of capacitances using these methods callsfor highly accurate standard capacitors (e.g., cylindrical cross ca-pacitors) and a highly skilled bridge balancing which make theabove methods complicated. An IC bridge is relatively simpler but

Consequently, the DPC is used as a VFC during the second half ofthe measuring cycle (as explained in the previous section) with V2as its input to obtain a frequency proportional to Vm cos cPo

Manuscript received August 31 1985; revised February 24, 1986.The author is with the Department of Electrical Engineering, Aligarh

Muslim University, Aligarh, India.IEEE Log Number 8610426.

0018-9456/86/1200-0640$01.00 © 1986 IEEE

Page 2: A new simple technique for capacitance measurement

IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. IM-35, NO.4, DECEMBER 1986 641

TABLE IRESULTS OF THE EXPERIMENTAL STUDY

(k = 28.6 x 10-6 F . 0 for all the readings)

R

c

Output

1

Fig. 1. The phase-shift oscillator for the measurement of capacitances. (Forthe experimental study the component values taken are R I = R2 = 3.9kO, and C1 = C2 = 0.022 IlF.)

S. No.

1.2.3.4.5.6.7.8.

CIlF (given value)

0.0050.0090.010.050.10.40.8

100 pF

RO

528930002707

556.9279

6934.8

293.9 K

CIlF(=k/R)(measured value)

0.005410.009530.010560.051360.102510.414490.82189

97.3 pF

II. DESCRIPTION

This equation can be used for determining the value of C withknown values of Rand k.

The proposed circuit is a new type of phase-shift oscillator shownin Fig. 1. Using the Barkhausen criterion [5] it is found that thiscircuit oscillates if

IV. CONCLUSION

A new oscillator circuit is developed which is useful for easyand convenient measurement of capacitances. Measurements withmoderate accuracies can be obtained conveniently using readilyavailable circuit components. If the proposed circuit is imple-mented in IC form it can give better accuracy. It uses only a desupply, hence can give rise to a compact instrument for capacitancemeasurement. Of course, the balancing resistance is used exter-nally. The method is also good for the measurement of low capac-itances and hence it is useful for measurement and control appli-cations.

small discrepancy between the measured and given values of C maybe due to the following.

1) The approximations in the value of k (the values of Rb R2and C1, C2 are having ±10-percent tolerance.

2) The given value of C may not be very accurate.3) The operational amplifier used in the circuit (741) which was

easily available in the laboratory. Its input impedance is not veryhigh (- 1 MO) and its first pole frequency is about 10 Hz. Thesefactors may introduce slight approximations in the formula used.

4) The result will also improve if a proper shielding arrange-ment is utilized. Based on these factors, better accuracy can beobtained if the circuit of Fig. 1 is implemented in IC form withprovisions for connecting C (the capacitance to be measured) andR (the balancing resistance) externally. Naturally, in this case, thevalues of C1 and C2 can be only few hundred picofarads and Ri, R2

should also be limited to few kilohms. This will give a frequencyof oscillation (2) of the order of 100 kHz which may be in the rangewhere the open-loop gain of the operational amplifiers used maynot be considered infinite. So, operational amplifiers with a higherfirst pole frequency should be used. The p.A702A (first pole fre-quency = 1 MHz) is a possible choice. FET input operational am-plifiers like CA3140 can also give good results.

Note: Last observation is not taken from the decade boxes. C is a papercapacitor with a nominal value of 100 pF, and R is taken through a 220-kO fixed resistance in series with a 100-kO variable resistance. After gettingthe balance the total value of R is measured with a digital multimeter.

(3)

(2)

(1)

CR = k,

uses inductive windings which reduce the compactness of the in-strument [1].

Astable and monostable multivibrators can be used for quickand easy measurement of capacitances with moderate accuracies[2]-[4]. These methods are sensitive to stray capacitances and thevalue of the capacitance measured is proportional to the reading ofthe indicating meter which may have calibration drift and otherobservational problems.

In this paper the author suggests a simple technique for the ca-pacitance measurement. It uses a de supply and the circuit proposedcan be realized in monolithic form, yielding a compact instrument.One terminal of the capacitance to be measured is connected tovirtual ground which minimizes the problem of stray capacitances.The capacitance is measured in terms of single resistive variationwith an accuracy that is relatively easy to realize.

j= 121r.JC1C2R1R2 '

Equation (1) can be used for the measurement of the capacitanceC. If the values of R b R2 and Cb C2 are fixed, then at the pointwhere the circuit just starts (or stops) oscillation

R1R2a constant = ----=--=---R1 + R2 R2-..;;...---=- +-

C1 C2

R1R2----~~--- ~ CR{(R1 + R2)/C1 + R2/C2 }

and the frequency of oscillation is

III. EXPERIMENTAL RESULTS AND DISCUSSION

The circuit of Fig. 1 was designed with the component valuesindicated in the figure. A CRO is used for the detection of theoscillations (an ac voltmeter can also be used for this purpose). Forany value of C the circuit oscillates when R becomes zero. Thevalue of R is increased through a highly accurate decade resistancebox with a precision of O.1 O. A precise value of R is measuredwhen the circuit just stops oscillation. With this value of R thevalue of C is obtained (3). Table I shows the results of the mea-surements. The capacitance C is determined from a decade capac-itance box.

The results shown in Table I confirm the theory developed. A

ACKNOWLEDGMENT

The author is thankful to the members of the Department ofElectrical Engineering, Aligarh Muslim University, Aligarh, Indiafor their suggestions and helpfulness.

REFERENCES

[1] B. M. Oliver and J. M. Cage, Electronic Measurements and Instru-mentation. Kogakusha, Tokyo: McGraw-Hill, Ltd., 1971.

[2] M. A. Jani and W. Ahmad, "Astable multivibrator for the measure-ment of capacitances," J. lIST (India), vol. 4, no. 4, pp. 7-10, Oct.1975.

Page 3: A new simple technique for capacitance measurement

642 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. IM-35, NO.4, DECEMBER 1986

[3] M. A. Jani and W. Ahmad, "Capacitance to time-period conversionusing modified astable multivibrator," IEEE Trans. Ind. Electron.Contr. Instrum., vol. IECI-22, pp. 430-432, Aug. 1975.

[4] D. Stankovic and M. Simic, "Monostable multivibrator as the bridgecircuit with linear characteristic," IEEE Trans. Instrum Meas., vol.IM-21, pp. 66-69, Feb. 1972.

[5] J. Millman, Microelectronics: Digital and Analog Circuits and Sys-tems. New Delhi, India: McGraw-Hill Inc., 1979.

HighStability

Magnet

Load

NMR Signal NMRDetection

Circuit

FeedbackSignal

CoarseCurrentSource

Fig. 1. Schematic diagram of current stabilization by NMR lock method.

Fig. 2. Cross section of the high-stability electromagnet. The spacer isshown as the shaded portion.

flowing down the load is stabilized via the magnetic field of theelectromagnet.

In this method, both the sensitivity of current detection and thepower dissipation in the magnet are functions of the field intensity,i.e., total ampere tum of the field coil. Hence, by a suitable choiceof total tum numbers of the field coil, we could stabilize a widerange of currents while keeping a constant power dissipation.

III. HIGH-STABILITY ELECTROMAGNETFig. 2 shows the cross section of a high-stability electromagnet

which has been manufactured for this purpose. It is a small cylin-drical electromagnet with 11-mm gap width, and the outer dimen-sion is 165 mm in diameter and 150 mm in height. This type ofelectromagnet is mechanically stable and the return yoke acts asamagnetic shield for the environmental magnetic field. The accessto the pole gap is made through four measurement windows, andthe field coils are cooled by convection through eight cooling win-dows. The magnetic flux density of 0.2 T has been used in thisexperiment. At the field of 0.2 T, the protons in a spherical sampleof natural rubber 3 mm in diameter give a sharp NMR signal withsignal-to-noise ratio higher than 100. As the intrinsic linewidth ofthe protons in natural rubber is about 2 X 10-5 T, the field reso-lution of better than 1 ppm may easily be obtained. The operatingcurrent has been chosen as 1.018 A, so that the current can bemeasured precisely by a 1-0 high-power standard resistor and a1.018-V standard cell.

A specific feature of this electromagnet is the spacer inserted inthe return yoke. The field uniformity of an electromagnet is mainlydetermined by the parallelism of the pole faces. Therefore the poleface and the return-yoke edge have been lapped on the same plane,

TBy-pass

Yoke

(N-36)

~

-I165mmI·

High-Stability DC-Current Source Using NMR LockTechnique

HITOSHI SASAKI, AKIRA MIYAJIMA, NAOKO KASAl,AND HISAO NAKAMURA

The NMR field-frequency locking is a well-established schemein the field of high-resolution NMR experiments [5]. The fluctua-tion of magnetic field is detected by NMR, and a compensationfield is added via the coil current. Using this technique, a magneticfield can be stabilized to 10-9 or better [6].

The principle of current stabilization which is based on this NMRlock technique is schematically shown in Fig. 1. The high-stabilitymagnet, which has a highly stable coil constant, is connected inseries with the load. If the current flowing down the load varies,the magnetic field of the electromagnet also varies. The variationof the magnetic field is detected by the NMR detection circuit andthe deviation signal is fed back to the coil current. Thus the current

Stabilization of a current is generally realized by comparing thevoltage drop across a reference resistor with a stable voltage source.Currents up to 1 A can be stabilized to better than 1 ppm/h usingthis conventional method [1]. For the currents over 1 A, thermalinstability arises due to the increased power dissipation in the ref-erence resistor. A de-current comparator and a superconductingquantum interference device (SQUID) control system have beenthe only solutions to this problem [2]-[4].

In this paper, we describe a novel method of current stabilizationwhich is based on the nuclear magnetic resonance (NMR) field-frequency lock technique. This method is fundamentally suitablefor stabilizing a large current, and currents up to 100 A may bestabilized within 1 ppm/h. The system is easy to build and needsno cryogenic environments.

To test the potentiality of this method, a I-A current source usinga small electromagnet has been developed. The structure of theelectromagnet and the performance of the current source will alsobe described.

II. PRINCIPLE OF OPERATION

I. INTRODUCTION

Manuscript received September 14, 1985; revised March 3, 1986.The authors are with the Electrical Standard Division, Electrotechnical

Laboratory, 1-1-4, Umezono, Niihari-gun, Sakura-mura, Ibaraki, 305 Ja-pan.

IEEE Log Number 8610427.

Abstract-A high-stability constant current source has been devel-oped using the nuclear magnetic resonance (NMR) field-frequency locktechnique. The current is locked to the NMR frequency via the mag-netic field of the electromagnet which has a highly stable coil constant.The current of 1 A has been stabilized to better than 0.2 ppm/h.

0018-9456/86/1200-0642$01.00 © 1986 IEEE