8087 instruction set and example

7/25/2019 8087 Instruction Set and Example

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About the 8087

The 8087 uses a stack or chain of 8 registers

to use for internal storage and data

manipulation, as well as status and control

words to set rounding control and indicate the

results of operations.

It has its own instruction set, instructions are

recognizable because of the F- in front. (LikeFIADD, FCOM, etc)


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About the 8087

FWAIT checks a control line to see if the8087 is still active.

programmers used to have to use an FWAIT

before and after a set of instructions for the -87 to make sure -86 or -87 storage operationshad been completed. (Basically, to handlesynchronization).

FWAIT should not be necessary.


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About the 8087: data transfer

Data transfer:

Instruction result

FLD source load a real into st(0) FST dest store real at dest (86 mem)

FSTP dest store/pop st(0)

FXCH {st(i)} exchange two regs (St(0),St(1)) or St(0) and the operand


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About the 8087: data transfer

FILD source int load

FIST dest int store

FISTP dest int store/pop FBLD source bcd load (tbyte source)

FBSTP dest bcd store tbyte dest


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About the 8087: arithmetic

FADD source add a real (mem) to st(0)

FADD {St(1),ST}

FADD st(i),st or FADD ST,ST(i) FADDP St(i),ST add st to st(i) and pop

st(0)

FIADD {st,} source int add to st


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FSUB for real subtract has same formats as FADD

FISUB {st,} intmem for int sub

ALSO:

FSUBR {st(1),st} FSUBR {st,} rmem

FSUBRP st(i),st

Etc and

FISUBR {st,} intmem

Reverse subtract: subtract dest from source


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FMUL and FIMUL have same formats

available

FDIV and FIDIV have same formats

Also available

FDIVR, FDIVRP and FIDIVR


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Miscellaneous

FSQRT {st}

FABS {st} FCHS {ST} change sign

FLDZ {st} load a zero


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Control word

The control word is a 16 bit word that works like a flag registeron the 86 processor. It keeps information about zerodivide inbit 2 for example. Bits 3 and 4 are overflow and underflowrespectively.

Precision control is set in bits 8 and 9 and rounding is set inbits 10 and 11.

Rounding control bit settings are:

00 round to nearest/even

O1 round down 10 round up

11 chop/truncate


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Status word

Status word is also a 16 bit word value.

condition bits are named c3, c2,c1 and c0.Their position in the status word, though is:

C3 is bit 14

C2,c1,c0 are bits 10,9,8 respectively.

If you are curious, the eight possible bit

settings in bits (11,12,13) indicate whichregister in the chain is currently st(0)


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Temp real (80 bits)

Temp real has an f-p format. Bits 0..63 are the

significand in hidden bit format. Bits 64 to 78

are the biased exponent, bit 79 is the sign.

You shouldnt need to worry about these

values on the stack.


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Packed bcd (80 bits)

A packed bcd is a tbyte.

Bit 79 is the sign.

Bits 72 through 78 are not used.

Bits 0,1,2,3 store the 0 th (lsd) decimal digit.

Bits 4,5,6,7 store the 1st.

The 17th(msd) digit is in bits 68,69,70,71.

Youll need to pad with zeros if there are fewer than

18 digits.


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Int values

87 processor recognizes word, dword and

qword signed int types, in the same manner as

the 86 processor.


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The stack

Pushing and popping on the stack change the

register who is currently the top.

Pushing more than 8 times will push the last piece of

data out and put St(0) at the most recently pusheditem.

It is the programmers responsibility to count stack

push/pop operations.

Whoever is on top of the stack, is referenced by St or

ST(0). St(1) is next. And so on to St(7).


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Int transfer

FILD: load int. Type (word, dword, etc) is whatever

the operand type is. St(0) is this new value. St(1)

points to the previous value on top.

FIST: copy St(0) value to memory, converting to asigned int (following rounding control settings in the

control word)

FISTP: same as above, but pop the stack as well.


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BCD

FBLD load a bcd (tbyte) onto the stack

FBSTP store a tbyte bcd value into the

memory operand, popping the stack as you

go.

Example:

FBLD myval

FBSTP myval


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Exchanging/swapping on the stack

FXCHG dest

Swap stack top with operand.

ExampleFXCHG St(3)

; swaps St(0) value with St(3) value


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FPREM

Takes implicit operands st,st(1)

Does repeated subtract leaves st>0,(possiblyst==st(1)) or st==0.

May need to repeat it, because it only reducesst by exp(2,64)

If st>st(1) it needs to be repeated.

FPREM sets bit C2 of the status word if itneeds to be repeated, clears this bit if itcompletes operation.


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operands

Stack operands may be implicitly referenced.

FIADD, FISUB, FIDIV, FIDIVR, FIMUL and

FISUBR have only one form (example using

add instruction):

FIADD {ST,} intmem

St(0) is implied dest for all of these.


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comparison

FCOM ;no operands compares st,st(1)

FCOM St(i); one operand compares st with st(i)

FCOMP (compare and pop) is the same.

FCOMPP - only allows implicit operands St,st(1)

(compare then pop twice)

FTSTcompares St with 0.

These all use condition codes described above andmake the settings in the next slide.


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Condition codes

C3 c0

0 0 st>source

0 1 st


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Getting status and control words

FSTSW intmem ; copy status word to 16 bit

mem location for examination.

FLDCW intmem; load control word (to set

rounding, for example, from 16bit int mem)

FSTCW intmem; copy control word to int mem


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Example Programs

data segment


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data segment

org 00h

X DD 9.75

Y DD 13.09375

SUM DD ?

data ends

code segment

assume cs:code, ds:data

start: MOV AX,data

MOV DS,AXFINIT

FLD X

FLD Y

FADD ST(0), ST(1)

FST SUMMOV AH,4CH

INT 21H

code ends

END start


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Example: Excerpt from a 16-bit program & output

value word 1234

.code

main PROC

mov ax,@data

mov ds,ax

mov ax, value

call writedec

fild value

fiadd value

fistp value

mov ax,value

call crlfcall writedec

C:\MASM615>coprocessor

1234

2468

C:\MASM615>

8087 instruction set and example

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