4-bit dac/adc design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · this design is...
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![Page 1: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/1.jpg)
Group Member: Yunfei Shen
Ming Gao
Tianyu Feng
4-bit ADC/DAC Design
![Page 2: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/2.jpg)
Introduction
DAC Implementation
ADC Implementation
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This design is divided into two devices: an ADC and a DAC.
The ADC is composed of a comparator stage and an encoder stage.
-The comparator stage discretizes an analog input voltage.
-The encoder stage encodes the discrete values into a digital 4-bit binary word.
The DAC is made up of decoder and operational amplifier.
-The decoder is made up of 16 4-input NANDs.
-The Op amp amplify the decoded signals and transfer them to the output.
![Page 4: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/4.jpg)
Block Diagram
Decoder Op amp
DAC
4-bit
16 Vout
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R-2R DAC
DAC
4-bit
16
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R-2R DAC Simulation:
DAC
4-bit
16
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R-2R DAC Layout:
DAC
4-bit
16
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Charge Scaling DAC
DAC
4-bit
16
![Page 9: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/9.jpg)
Charge Scaling DAC Simulation:
DAC
4-bit
16
![Page 10: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/10.jpg)
Charge Scaling DAC Layout:
DAC
4-bit
16
![Page 11: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/11.jpg)
DAC Specification:
DA
C4-bit
16
-- R-2R DAC:
---7 transistors
---10 resistors
---1 capacitor
--Area of layout = 300um*500um=0.15(mm)^2
-- Charge Scaling DAC:
---7 transistors
---1 resistor
---7 capacitors
--Area of layout = 1100um*840um=0.924(mm)^2
![Page 12: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/12.jpg)
Block Diagram
Comparator Encoder
ADC
4-bit16Vin
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Top View
DAC
4-bit
16
![Page 14: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/14.jpg)
op amp for ADC
DAC
4-bit
16
![Page 15: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/15.jpg)
Simulation: op amp
DAC
4-bit
16
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Latch:
DAC
4-bit
16
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Simulation: latch
DAC
4-bit
16
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Comparator: op amp + latch
DAC
4-bit
16
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Simulation: Comparator
DAC
4-bit
16
![Page 20: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/20.jpg)
Simulation: encoder
DAC
4-bit
16
![Page 21: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/21.jpg)
Simulation: encoder
DAC
4-bit
16
![Page 22: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/22.jpg)
4-bit ADC
ADC
4-bit16Vin
![Page 23: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/23.jpg)
4-bit ADC Simulation:
DAC
4-bit
16
![Page 24: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/24.jpg)
4-bit ADC Layout:
DAC
4-bit
16
![Page 25: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/25.jpg)
ADC Specification:
-- Comparator-stage:
---8x15=120 transistors
---19 resistors
---15 capacitors
-- Latch: 8x15=120 transistors
-- Encoder-stage: 28x3+12x14=252 transistors
--ADC (total):
---492 transistors
---19 resistors
---15 capacitors
--Area of layout = 4.1mm*2.6mm=10.66(mm)^2
![Page 26: 4-bit DAC/ADC Design - ece.duke.edujmorizio/ee299/projects_2010/dacadc.pdf · This design is divided into two devices: an ADCand a DAC. The ADCis composed of a comparator stage and](https://reader033.vdocuments.site/reader033/viewer/2022041420/5e1e6426754d3c37a1711d42/html5/thumbnails/26.jpg)