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very good book for power electronicsTRANSCRIPT
MULTILEVEL INVERTERS
Dr. Venkata Reddy Kota
Assistant Professor
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
JNTU KAKINADA
INTRODUCTION
2JNTUK- KAKINADA
A multilevel converter has several advantages over a conventional two-level converter and can be briefly
summarized as follows.
Staircase waveform quality: Generates output voltages with very low distortion and reduce dv/dt
stresses; therefore electromagnetic compatibility (EMC) problems can be reduced.
Common-mode (CM) voltage: Multilevel converters produce smaller CM voltage; therefore, the
stress in the bearings of a motor connected to a multilevel motor drive can be reduced.
Input current: Multilevel converters can draw input current with low distortion.
Switching frequency: Multilevel converters can operate at both fundamental switching frequency
and high switching frequency PWM. It should be noted that lower switching frequency usually
means lower switching loss and higher efficiency.
Disadvantages:
Greater number of power semiconductor switches are needed.
Although lower voltage rated switches can be utilized in a multilevel converter, each switch requires
a related gate drive circuit. This may cause the overall system to be more expensive and complex.
Applications of multilevel converter
Industrial Medium-Voltage Motor Drives, Utility Interface for Renewable Energy Systems,
Flexible AC Transmission System (FACTS) and Traction Drive Systems, etc,.
MULTILEVEL INVERTERS
JNTUK- KAKINADA 3
Three different major multilevel converter structures are
1) Diode Clamped (Neutral Point Clamped),
2) Flying Capacitors (Capacitor Clamped), and
3) Cascaded H-Bridges converter with separate dc sources
1) DIODE CLAMPED MULTILEVEL INVERTER:
a) The main concept of this inverter is to use diodes to limit the power devices voltage stress.
b) The voltage over each capacitor and each switch is Vdc .
c) An m level inverter needs (m-1) voltage sources, 2(m-1) switching devices and (m-1) (m-2)
diodes.
e.g.: In a 3-level Diode Clamped Multilevel: m=3, Therefore:
Number of switches per leg =2(3-1) =4
Number of diodes per leg = (3-1) (3-2) =2
Number of DC capacitors = (3-1) =2
JNTUK- KAKINADA 4
THREE LEVEL DIODE CLAMPED MLI
Fig1: Three Phase Three Level Diode Clamped Inverter Topology
Sw1a
Sw1b
Sw1c
Sw1d Sw2d
Sw2c
Sw2b
Sw2a Sw3a
Sw3b
Sw3c
Sw3d
3
21
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
[L3b]
[L3a]
[L2d]
[L2c]
[L2b]
[L2a]
[L1d]
[L1c]
[L3d]
[L3c]
[L1b]
[L1a]
C2
C1
JNTUK- KAKINADA 5
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1-200
-150
-100
-50
0
50
100
150
200
Time (sec)
Voltage (
Volts)
Three Level single leg output voltage
Power Device Index
Switching States
Sw1a Sw1b Sw1c Sw1d
Vdc/2 1 1 0 0
0 0 1 1 0
-Vdc/2 0 0 1 1
Table 1: Switching States Three Level DCMLI For Output Voltages
Fig 2: Single Leg Output Voltage of Three Level Diode Clamped Inverter
Contd…
300 V
V1
V
Vabc
Iabc
A
B
C
a
b
c
Three-PhaseV-I Measurement
A B C
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
I
[L3d]
[L3c]
[L2f]
[L2e]
[L2d]
[L2c]
[L1f]
[L2h]
[L2g]
[L1h]
[L1g]
[L1e]
[L3h]
[L3g]
[L3b]
[L3a]
[L2b]
[L2a]
[L1b]
[L1a]
[L3f]
[L3e]
[L1d]
[L1c]
C4
C3
C2
C1
FIVE LEVEL DIODE CLAMPED MLI
Fig1: Three Phase Five Level Diode Clamped Inverter Topology
JNTUK- KAKINADA 7
Contd…
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
-150
-100
-50
0
50
100
150
Time (sec)
Volta
ge (v
olts
)
Five Level Single Leg DC MLI
Fig 2: Single Leg Output Voltage of Three Level Diode Clamped Inverter
Voltage Va
Switching States
Sw1a Sw1b Sw1c Sw1d S1w1a S1
w1b S1w1c S1
w1d
Vdc/2 1 1 1 1 0 0 0 0
Vdc/4 0 1 1 1 1 0 0 0
0 0 0 1 1 1 1 0 0
-Vdc/4 0 0 0 1 1 1 1 0
-Vdc/2 0 0 0 0 1 1 1 1
Table 1: Switching States Five Level DCMLI For Output Voltages
JNTUK- KAKINADA 8
Contd…
Applications of Diode-clamped Inverter:
1. an interface between a high-voltage dc transmission line and an ac transmission line.
2. In variable speed drives for high-power medium-voltage (2.4 kV to 13.8 kV) motors.
3. Static var compensation
Advantages:
1) All of the phases share a common dc bus, which minimizes the capacitance requirements of the
converter. For this reason, a back-to-back topology is possible such as in a high-voltage back-to-
back inter-connection or an adjustable speed drive.
2) The capacitors can be pre-charged as a group.
3) Efficiency is high for fundamental frequency switching.
Disadvantages:
1) Real power flow is difficult for a single inverter because the intermediate dc levels will tend to
overcharge or discharge without precise monitoring and control.
2) The number of clamping diodes required is quadratically related to the number of levels, which can
be cumbersome for units with a high number of levels.
JNTUK- KAKINADA 9
2) CAPACITOR CLAMPED MULTILEVEL INVERTER:
1) Maynard and Foch introduced a flying-capacitor-based inverter in 1992.
2) The structure of this inverter is similar to that of the diode-clamped inverter except that instead of
using clamping diodes, the inverter uses capacitors in their place.
3) Unlike the diode-clamped inverter, the flying-capacitor inverter does not require all of the
switches that are on (conducting) be in a consecutive series.
4) The flying-capacitor inverter has phase redundancies, whereas the diode-clamped inverter has only
line-line redundancies. These redundancies allow a choice of charging/discharging specific
capacitors and can be incorporated in the control system for balancing the voltages across the
various levels.
5) An m level inverter needs (m-1) voltage sources, 2(m-1) switching devices and (m-1) × (m-2)/2
auxiliary capacitors.
e.g.: In a 3-level Capacitor Clamped Multilevel: m=3, Therefore:
Number of switches per leg =2(3-1) =4
Number of auxiliary capacitor per leg = (3-1) (3-2)/2 =1
Number of DC Capacitors = (3-1) =2
Contd…
JNTUK- KAKINADA 10
Sw1a
Sw1b
Sw1c
Sw1dSw3d
Sw2cSw3c
Sw2b Sw3b
Sw3aSw2a
Sw2d
32
1
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
[L3b]
[L3a]
[L2d]
[L2c]
[L2b]
[L2a]
[L1d]
[L1c]
[L3d]
[L3c]
[L1b]
[L1a]
C7C5
C4
C2
C1
THREE LEVEL CAPACITOR CLAMPED MLI
Fig1: Three Phase Three Level Capacitor Clamped Inverter Topology
JNTUK- KAKINADA 11
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1-200
-150
-100
-50
0
50
100
150
200
Time (sec)
Voltage (
Volts)
Three Level single leg output voltage
Contd…
Power Device Index
Switching states
Sw1a Sw1b Sw1c Sw1d
VDC/2 1 1 0 0
0 0 1 0 1 0 1 0 1 0
-V DC/2 0 0 1 1
Table 2: switching states of Three Level FCMLI for output voltages
Fig 2: Single Leg Output Voltage of Three Level Capacitor Clamped Inverter
FIVE LEVEL CAPACITOR CLAMPED MLI
VVabc
IabcA
B
C
a
b
c
A B C
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
gm
CE
I
[L3d]
[L3c]
[L2f]
[L2e]
[L2d]
[L2c]
[L1f]
[L2h]
[L2g]
[L1h]
[L1g]
[L1e]
[L3h]
[L3g]
[L3b]
[L3a]
[L2b]
[L2a]
[L1b]
[L1a]
[L3f]
[L3e]
[L1d]
[L1c]
C7
C6
C5
C4
C3
C22
C21
C20
C2
C16
C15
C14
C1
Fig1: Three Phase Five Level Capacitor Clamped Inverter Topology
JNTUK- KAKINADA 13
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1-200
-150
-100
-50
0
50
100
150
200
Time (sec)
Volta
ge (v
olts
)
Five level Single leg output voltage
Fig 2: Single Leg Output Voltage of Five Level Capacitor Clamped Inverter
Contd…Table 1: Switching States Five Level DCMLI For Output Voltages
Voltage Va
Switching States
Sw1a Sw1b Sw1c Sw1d S1w1a S1
w1b S1w1c S1
w1d
Vdc/2 1 1 1 1 0 0 0 0
Vdc/4 0 1 1 1 1 0 0 0
0 0 0 1 1 1 1 0 0
-Vdc/4 0 0 0 1 1 1 1 0
-Vdc/2 0 0 0 0 1 1 1 1
14JNTUK- KAKINADA
Applications of Flying Capacitor Multilevel Inverter:
Static Var Generation
Advantages :
1) Phase redundancies are available for balancing the voltage levels of the capacitors.
2) Real and reactive power flow can be controlled.
3) The large number of capacitors enables the inverter to ride through short duration outages and deep
voltage sags.
Disadvantages:
1) Control is complicated to track the voltage levels for all of the capacitors. Also, precharging all of the
capacitors to the same voltage level and start up are complex.
2) Switching utilization and efficiency are poor for real power transmission.
3) The large numbers of capacitors are both more expensive and bulky than clamping diodes in multilevel
diode-clamped converters.
4) Packaging is also more difficult in inverters with a high number of levels.
Contd…
3) CASCADED H-BRIDGE MULTILEVEL INVERTER :
Each separate dc source (SDCS) is connected to a single-phase full-bridge, or H-bridge, inverter.
Each inverter level can generate three different voltage outputs, +Vdc, 0, and –Vdc by connecting the
dc source to the ac output by different combinations of the four switches, Sw1, Sw2, Sw3, and Sw4.
The ac outputs of each of the different full-bridge inverter levels are connected in series such that the
synthesized voltage waveform is the sum of the inverter outputs.
The number of output phase voltage levels m in a cascade inverter is defined by m = 2s+1, where s is
the number of separate dc sources.
Applications of Cascaded H-bridge Multilevel Inverter:
static var generation,
Cascaded inverters are ideal for connecting renewable energy sources with an ac grid, because of the
need for separate dc sources, which is the case in applications such as photo voltaic or fuel cells.
Main traction drive in electric vehicles, where several batteries or ultra capacitors are well suited to
serve as SDCSs.
The cascaded inverter could also serve as a rectifier/charger for the batteries of an electric vehicle
while the vehicle was connected to an ac supply. Additionally, the cascade inverter can act as a
rectifier in a vehicle that uses regenerative braking.JNTUK- KAKINADA 15
Contd…
JNTUK- KAKINADA16
Fig1: Three Phase Three Level Capacitor Clamped Inverter Topology
V3V2V1
V
Vabc
Iabc
A B C
a b cA
B
C
Scope
gm
CE
SW9
gm
CE
SW8
gm
CE
SW7
gm
CE
SW6
gm
CE
SW5
gm
CE
SW4
gm
CE
SW3
gm
CE
SW2
gm
CE
SW12
gm
CE
SW11
gm
CE
SW10
gm
CE
SW1
I
[Sc3]
[Sb2]
[Sb4]
[Sb1]
[Sb3]
[Sa2]
[Sa4]
[Sa1] [Sc2]
[Sc4]
[Sc1]
[Sa3]
THREE LEVEL CASCADED H-BRIDGE MLI
JNTUK- KAKINADA 17
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
-300
-200
-100
0
100
200
300
Time (sec)
Voltage(
volts)
CHB Single Leg Output Voltage
Fig 2: Single Leg Output Voltage of Three Level Capacitor Clamped Inverter
Table 2: switching states of Three Level FCMLI for output voltages
Power Device Index
Switching States
Sw1 Sw2 Sw3 Sw4
+VDC 1 0 0 1
0 1 1 0 0
0 0 0 1 1
-VDC 0 1 1 0
Contd…
FIVE LEVEL CASCADED H-BRIDGE MLI
Fig1: Three Phase Five Level Cascaded H-Bridge Inverter Topology
V1
Vab
c
Iabc
A B C
a b c
A B C
gm
CE
SW9
gm
CE
SW8
gm
CE
SW7
gm
CE
SW6
gm
CE
SW5
gm
CE
SW4
gm
CE
SW3
gm
CE
SW24
gm
CE
SW23
gm
CE
SW22
gm
CE
SW21
gm
CE
SW20
gm
CE
SW2
gm
CE
SW19
gm
CE
SW18
gm
CE
SW17
gm
CE
SW16
gm
CE
SW15
gm
CE
SW14
gm
CE
SW13
gm
CE
SW12
gm
CE
SW11
gm
CE
SW10
gm
CE
SW1
[Sa7]
[Sa5] [Sb6]
[Sb8]
[Sb3]
[Sa2]
[Sa4]
[S7]
[S5]
[S2]
[S4]
[S1][Sa1]
[S6]
[S8]
[S3]
[Sb7]
[Sb5]
[Sb2]
[Sb4]
[Sb1]
[Sa6]
[Sa8]
[Sa3]
150V5
150V4
150V3
150V2
150V1
150V
JNTUK- KAKINADA 19
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
-300
-200
-100
0
100
200
300
Time(sec)
Volta
ge (v
olts
)
Five Level single leg voltage
Fig 2: Single Leg Output Voltage of Three Level Capacitor Clamped Inverter
Contd…Table 2: switching states of Three Level FCMLI for output voltages
Van Van1 Van2
V0 V
V 02V V V
0
V -V
0 0
-V V
-V0 -V
-V 0-2V -V -V
Van = Van1 +Van2
JNTUK- KAKINADA20
Converter type Diode-clamped Flying capacitorsCascaded
H-Bridge
Main switching devices (m-1) x 2 (m-1) x 2 (m-1) x 2
Main diodes (m-1) x 2 (m-1) x 2 (m-1) x 2
Clamping diodes (m-1) x (m-2) 0 0
Dc bus capacitors (m-1) (m-1) (m-1)/2
Balancing capacitors 0 (m-1) x (m-2) / 2 0
Advantages of CHB:
The number of possible output voltage levels is more than twice the number of dc sources
(m = 2s + 1).
The series of H-bridges makes for modularized layout and packaging. This will enable the
manufacturing process to be done more quickly and cheaply.
Disadvantages of CHB:
Separate dc sources are required for each of the H-bridges. This will limit its application to products
that already have multiple SDCSs readily available.
Contd…
Table 1: Comparison of the components of conventional topologies
JNTUK- KAKINADA 21
Abundant modulation techniques and control paradigms have been developed for multilevel converters such as
1) Sinusoidal Pulse Width Modulation (SPWM),
2) Selective Harmonic Elimination (SHE-PWM),
3) Space Vector Modulation (SVM) and others.
The main aim of the modulation strategy of multilevel inverters is to synthesize the output voltage as close as
possible to the sinusoidal waveform.
The natural extensions of carrier based sinusoidal PWM for multilevel converter topologies are
1) Level-Shift (LSPWM) commonly known as
a) Phase Disposition (PD), where all carriers are in phase.
b) Phase Opposition Disposition (POD), where the carriers above the reference zero point are out of
phase with those below the zero point by 1800.
c) Alternate Phase Opposition Disposition (APOD), where each carrier is phase shifted by 180' from
its adjacent carriers.
2) Phase-Shift PWM (PSPWM).
The level-shifted multicarrier modulation technique produces the best harmonic performance, however this
technique produces uneven power distribution among the cells when applied to CHB Multilevel Inverter.
The Phase Shifted Carrier PWM (PSCPWM) is the standard modulation strategy for CHB Multilevel Inverter.
CONTROL STRATEGIES
JNTUK- KAKINADA22
PHASE DISPOSITION PWM
Fig 2: PD PWM for a Three Level Inverter
Fig 2: PD PWM for a Five Level Inverter
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-6
-4
-2
0
2
4
6
Time
PHASE DISPOSITION PWM
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
-10
-8
-6
-4
-2
0
2
4
6
8
10
Time (sec)
PHASE DISPOSITION PWM
JNTUK- KAKINADA 23
PHASE OPPOSITION DISPOSITION PWM
Fig 2: POD PWM for a Five Level Inverter
Fig 2: POD PWM for a Three Level Inverter
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
-10
-8
-6
-4
-2
0
2
4
6
8
10
Time (sec)
PHASE OPPOSITION DISPOSITION PWM
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-6
-4
-2
0
2
4
6
Time (sec)
PHASE OPPOSITION DISPOSITION PWM
JNTUK- KAKINADA 24
Fig 2: APOD PWM for a Three Level Inverter
Fig 2: APOD PWM for a Five Level Inverter
ALTERNATE PHASE DISPOSITION PWM
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02
-10
-8
-6
-4
-2
0
2
4
6
8
10
Time (sec)
ALTERNATE PHASE OPPOSITION DISPOSITION PWM
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-6
-4
-2
0
2
4
6
Time (sec)
ALTERNATE PHASE OPPOSITION DISPOSITION PWM
PHASE SHIFTED PWM
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-6
-4
-2
0
2
4
6
Time (sec)
Fig 2: PS PWM for a Three Level Inverter
Fig 2: PS PWM for a Three Level Inverter
0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02-6
-4
-2
0
2
4
6
Time (sec)