ELSEVIER

Optics & Laser Technology. Vol. 29. No. 4, pp. 221-221, 1997

C 1997 Elsevier Saence Ltd. All rights reserved

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Unified negabinary symbolic arithmetic for addition and subtraction with polarization- encoded optical shadow casting GUOQIANG LI, LlREN LIU, JIANWEN HUA, LAN SHAO

Conventional algorithms process addition and subtraction in different ways. In this paper, by introducing bipolar carries, a unified negabinary symbolic arithmetic for the two operations can be derived, using only the same six substitution rules. Based on the polarization-encoded optical shadow-casting technique, the encoding and decoding patterns for half-addition, half-subtraction and unified arithmetic are designed, with the fixed LED pattern and separate and simultaneous generation of the multi-outputs. The architecture is simple, programmable, cost-efficient, and the addition and subtraction of multiple pairs of bipolar numbers can be handled in parallel in the same manner. @ 1997 Elsevier Science Ltd.

KEYWORDS: optical computing, parallel processing, negabinary encoding

Introduction

Digital optical computing is an attractive field because optical systems have the advantages of high parallelism, massive interconnections and a large spatial-temporal bandwidth product. During the last decade, great effort has been devoted to developing various parallel architectures suitable for optics. Among them, two techniques common to us are optical symbolic substitution (OSS), proposed by Huang’, and optical shadow casting (OSC), proposed by Tanida and Ichioka2. OSS is a two-dimensional (2D) pattern transformation logic. In a lensless OSC system, by controlling the switching modes of the LEDs, different logic operations of the input can be performed simultaneously with a decoding mask. Since OSC can realize the projecting, shifting, and overlapping operations required by OSS3, OSC has been used to implement OSS4. In addition, another parallel logic array architecture introduced by Yataga? can perform multiple-instruction multiple-data (MIMD) logic operations with a space-variant decoding mask.

OSS and OSC have been widely applied to Boolean logic, image processing and digital arithmetic2m3*6’3. The OSC-based OSS is promising for digital optical computing because the system is flexible, programmable, and easily implemented. A particularly efficient way of handling addition is to use the parallel-sequential

processing capabilities of OSC and OSS’ ’ . However, the original OSC utilized two light levels, transparent and opaque, for encoding and decoding. Initially, this limited the number of input variables to two when a variable is encoded by four subpixels. Although a multi- input parallel logic scheme was proposed recently13, there was a great trade-off of the space bandwidth product for the encoding of a single pixel. The extension of OSC to include additional polarized input pixel codes and output mask transparency (POSC)14 increased the degrees of freedom, and the design of relatively complicated combinational logic units with a small coding pixel area was possible. A general design scheme based on the overlap equation has been given in Ref. 15. Consequently, many l-bit adders have been designed, including binary’&“, modified signed digit (MSD)18, and trinary” number representation, as well as other complex logic units20.2’.

It is known22 that another number system, called negabinary, can uniquely represent both positive and negative numbers without a sign bit. This property permits arithmetic to be performed at digit level rather than word level, as in normal binary; i.e. it is not necessary to be concerned with overflow, end-round carries, etc. Thus, the requirement on the interconnection is decreased. The OSC-based OSS can realize the logic more conveniently.

The authors are in the Information Optics Laboratory, Shanghai Institute of Optics and Fine Mechanics, Academia Sinica. P.O. Box 800-211, Shanghai 201800, China. E-mail: Irliu@fudan.ihep.ac.cn. Received 18 June 1996. Accepted 19 November 1996.

In this paper, POSC is efficiently extended to deal with negabinary symbolic arithmetic. It is very interesting that by introducing positive and negative carries, both addition and subtraction can be performed through the alternate use of double-in double-out substitution rules

221

222 Unified negabinary symbolic arithmetic: Guoqiang Li et al

(each rule has two input and two output pixels) for half- addition and half-subtraction. Furthermore, the two sets of rules can be combined into one set, including only six triple-in triple-out rules. Thus, a unified negabinary symbolic arithmetic for addition and subtraction is derived. In the algorithm, the two different arithmetic operations can be performed at the same time by the iterative use of the same SS rules. Next, the encoding states of the inputs for half-addition, half-subtraction, and the unified arithmetic, are designed from the POSC logic equations according to the particular SS rules, all assuming that the four LEDs are fixed to be ON, and the double or triple outputs are generated and detected at different subpixels separately and simultaneously. This leads to only one of the input variables being properly encoded with polarization in the three cases. As a demonstration, an experiment of parallel 4-bit addition and subtraction on two pairs of numbers is verified. In comparison with the above-mentioned counterparts, the architecture proposed here is more advantageous, since bipolar data can be processed at digit level and at the same cost. Moreover, addition and subtraction on multiple parts of data can be handled in parallel using the same instructions, i.e. the same encoding and decoding methods and the same SS rules, so the technique has an additional parallelism for digital optical computing.

Unified negabinary symbolic arithmetic for addition and subtraction

Properties of negabinary number system

Negabinary is one of the positional number systems with the fixed base -2. In the system, any analogue quantity, say a, has one and only one representation as an (N + M)-bit string UN-~. .ala~a_~. . . a-M

N-l

a= c

a;(-2)‘, Qi E (0, 11 i=-M

(1)

in which the digits with non-negative subscripts constitute the integral part, and those with negative subscripts constitute the fractional part. Note that the digits carry not only magnitude but also polarity information. The signs of the weight assigned to each digit change alternately. This property enables us to represent any bipolar number without a sign bit. It is this property that gives us an advantage in performing negabinary arithmetic-not at word level but at digit level-because such things as carry-ins to the least significant bit (LSB), end-round carries, and overflows can be neglected, i.e. the result is independent of the polarities of the operands. Such processing is needed in the conventional sign-magnitude or radix-complement system, where the polarity is determined by the most significant bit (MSB), called the sign bit. Therefore, fewer interconnections are required in the digit-level negabinary arithmetic.

Half-addition and half-subtraction

When symbolic substitution is used for some purpose, the main task is to ascertain the substitution rules. These rules are a kind of truth table. For example, the SS rules for binary addition correspond to a half-adder3. N-bit additions can be achieved iteratively by applying these rules to the two-dimensional data in parallel, at most N

times. Thus, before the discussion of negabinary symbolic addition and subtraction, the truth tables for half-addition and half subtraction are presented. Assume a and b are two negabinary numbers, and a; and bi are their ith bits respectively.

Half-addition For the l-bit addition of ai and bi, there are four combinations, namely, (ai, bJ = (0, 0), (0, l), (1,O) and (1,l). It is obviously seen that the first three combinations are carry free and the sums of these pairs are 0, 1 and 1, respectively. However, the fourth combination of bits (1,1) will generate a carry out. As described above, the signs of adjacent bits in negabinary are different, so the carry produced at one bit position should be subtracted from the sum of the next higher bit. It is, therefore, termed as a negative carry (marked by ci+r -). This can be concluded easily from the identity equation

(1 + l)(-2)’ = O(-2)’ - 1(-2)‘+’

The truth table is shown in Table 1.

(2)

Half-subtraction When two bits ai and bi are taken for subtraction, three of the four combinations, namely, (ai, bi) = (0, 0), (l,O), (1,l) do not yield any carry, and their sums equal 0, 1 , 0, respectively (for the sake of unity, the difference of two operands is also called the sum). Nevertheless, the combination (0,l) will generate a positive carry-out (defined as ci+i +), with the sum being 1. This is due to the fact that

(0 - 1)(-2)’ = 1(-2)’ + 1(-2)‘+’

The truth table is shown in Table 2.

(3)

Negabinary symbolic addition

Let us consider the SS rules necessary for negabinary addition. In the first iteration, the corresponding digits of ui and bi are added in parallel. So the truth table of half-addition is available for each bit position. The four substitution rules can be obtained from Table 1 and are illustrated in Fig. l(a). The two digits are placed one over the other, and each column including ai and bi is replaced by a new two-column pattern including the sum si and the negative carry ci+t - to the next higher bit position. The numerical values rather than their spatial

Table 1. Truth table for half-addition

ai b; si Ci+l

0 0 0 0 0 1 1 0 1 0 0 1 1 :, 1

Table 2. Truth table for half-subtraction

ai bi si G-1

0 0 0 0 0 1 1 1 0 1 :, 1 1 0 0

Unified negabinary symbolic arithmetic: Guoqiang Li et al. 223

encoding are used. This operation will generate a sum string s(i) and a negative carry string c-(‘) (the number in the parentheses defines the iteration time).

In the second iteration, the two digits to be added in each column come from sj’) and cZP(‘). In fact, the addition between the sum sil) and the negative carry c-(l) is a negabinary half-subtraction. According to Table 2, the four substitution rules are listed in Fig. l(b). Consequently, another sum string sc2) and a positive carry string c+c2) are produced.

For the third iteration, it is easily seen that the two digits to be added in a column originate from si*’ and c?(2). The half-addition rules in Fig. l(a) can be applied, resulting in the sum string sy) together with the possible negative carry c,YC3). Analogous to the second iteration, in the fourth iteration the half-subtraction SS rules are to be used. Therefore, the half-addition and half-subtraction rules are used alternatively, for odd time and even time iterations respectively. Before combining the two groups of SS rules, we briefly discuss negabinary symbolic subtraction.

Negabinary symbolic subtraction

In reference to negabinary addition, one notices readily that, for negabinary subtraction, the half-subtraction rules should be employed first and then the half-addition rules. This procedure will continue until no positive or negative carries occur.

A unified symbolic arithmetic for addition and subtraction

Generally speaking, both addition and subtraction can be performed easily by using two sets of substitution rules, one for half-addition and the other for half- subtraction. It is possible to combine the two sets of rules into one by introducing both positive and negative carries at the same time. If we define the left-hand side of the rules containing the pixels si’ (i-0, ,,+(i-1)

and c-(i-l) and the right-hand side of the rules containing $), c+(j) ,+, and c;:{‘, the two sets of double-in double-out rules can be merged into one set of triple-in triple-out substitution rules. Since the condition that both c;+ and c;- equal 1 does not happen, there are only six combinations for the negabinary triple-in variables. The unified arithmetic truth table and the corresponding SS rules are shown in Table 3 and Fig. 2, respectively.

The initial values of the three digit strings sy), c+(O), c;(O) should be assigned before the addition and subtraction are performed. For addition, the augend a can be viewed as the initial sum, and the addend b can be viewed as the initial positive carry, while for subtraction, the minuend a can also be taken as the original sum, and the subtrahend b can be taken as the original negative carry. Hence there exist the following formulas

for addition,

I c+(o) = b; I (44

ci -CO) = 0 (ix -M,..., -l,O,l,..., N- 1)

i-0 0 0 I I- I o-o o- I

0 0 0 I

I 0-I t--+0 0 0

1-1 1-o 0 I 0 I

(a) (b)

Fig. 1 Substitution rules for (a) half-addition; (b) half subtraction

i-O0 0 l-O1 ;-b”l 0 0 0 0 0 0

i ‘OO 0 A00 0 1 f 0

Fig. 2 Substitution rules for the unified negabinary arithmetic

for subtraction,

I

JO’ = a- I I

Cf(0) - 0 I - (4b)

Ci -(O)= b; (i= -A4 ,..., -l,O,l,..., N- 1)

After the initialization, both addition and subtraction of two numbers can be carried out in parallel by the successive use of the same substitution rules listed above. At each iteration, at least one bit of the final result for a pair of operands can be obtained. Therefore, a unified symbolic arithmetic for addition and subtraction has been established. The idea provides a technique for exploring parallelism in optical digital computing, and the method that initial data determine the contents of an operation suggests an extension to data-driven computing.

For clarity and without loss of generality, the addition of the 4-bit integral numbers a = (3),, = (Olll)_, and b = ( -6),. = (11 10)_2, and subtraction of the numbers a = (-3),, = (llOl)_, and b = (-9),. = (loll)_, are illustrated in Fig. 3. Using the unified SS rules in Fig. 2, the addition and subtraction are executed in parallel. From (1) it is understood that the range of 4-bit integral numbers representable expands from - 10 to 5, i.e. [ - 10, 51. In the addition example, there is no overflow. However, in the subtraction example, a positive carry is generated out of the MSB at the third step. As described above, the arithmetic is performed at digit level, so this does not bring about any problem. One can continue to utilize the SS rules for the final result (the fourth step).

Table 3. Truth table for the unified negabinary arithmetic

si C,Y+ C,T Si Cl Ci+l

0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 1 0 0 1

:, 0 0 0 1

0 1 1 1 0 1 0 1 0 0 0

224 Unified negabinary symbolic arithmetic: Guoqiang Li et al

oooo 0010 00 1 -6 1101 0110 0010 1010 %lOlO

4-9 1011 0000 01 0 MO)

Fig. 3 Numerical example of parallel addition and subtraction using the unified substitution rules

Decoding mask

I d

(a)

w (4 Fig. 4 A POSC system configuration (a) and the decoding masks for negabinary (b) half-addition; (c) half-subtraction; (d) unified arithmetic

POSC design

Figure 4(a) is a general POSC system. For illustration, in the source plane four LEDs are arranged in a square array (but they are not limited to this configuration”). The two input variables A and B (an extension can be made to three or more variables) are each encoded by four subpixels and are overlapped to each other in the input plane. Both the LEDs and subpixels can be represented by transparent (T), opaque (F), vertically polarized (V) and horizontally polarized (H) codes. The LED arrangement causes the superimposed pixel to produce an output pixel pattern in the output plane comprising nine equal-sized subpixels in a square. It is possible to decode the output at more than one subpixel for the simultaneous generation of multi-output, using the codes T, H, V as well as the mixed polarized (HV or VH). All these factors offer more degrees of freedom for the design of a more complicated functional unit.

It will be convenient for the logical expression if the inputs A and B and the source L are represented by 2 x 2 matrices

and the decoding mask by a 3 x 3 matrix

D= (a;; I; ;I;)

Since, in the input plane, the spatially coded inputs are overlapped and in the output plane the projected shadowgrams are overlapped with the decoding mask, the overlap rules should be outlined first

XAT=X

xr\F=F

XAX=X

Hr\V=Vr\H=F I

where x = T, F, H or V, and the symbol A indicates an overlap. Note that (a) F and T, and (b) H and V are complementary. The complementary pairs and the pairs involving F are orthogonal since their overlap results in opaque output. After this definition, the input can be represented by the overlapped matrix

0, = ag A b, (i,j = 1,2) (6)

The POSC design includes determining the encoding patterns of the inputs and the LEDs that will produce the desired output. Based on the overlap rules, the POSC equations are formed for true and false logic from the input-output equations for a particular decoding mask. Then the POSC equations are solved simultaneously and consistently. A detailed description of the design steps can be found in Ref. 15. It is not necessary for the input patterns of the two levels (0 or 1) of a variable to be complementary to each other. An optimized selection is made to satisfy maximum SS rules with the minimum inputs involved.

In the following, the negabinary half-addition and half-subtraction, and the unified symbolic arithmetic POSC units are constructed. Since there are fewer rules included in these units, for simplicity, the four LEDs are fixed to be on without polarization.

Half-addition

To realize the symbolic substitution shown in Fig. l(a), two different subpixels 022 and Dsi are detected in parallel for the sum s and negative carry c - respectively. From the figure, the condition that both s and c- are logical 1 does not exist. Thus 022 and Dsi can be assumed to be T and V polarized respectively (see Fig. 4(b)). The corresponding input-output equations are

L~I A 011 + ~512 A 012 + ~521 A 021

+ L22 A 022 = 022 (74

L12 A 021 = D31 V’b)

According to Table 1, the true and false logic equations can be written separately.

True logic

Lii A [Oii(iib) + Oq(ab)] = V (i,j = 1,2) (84

LIZ A Ozl(ab) = H (gb) \L21 L22l

Unified negabinary symbolic arithmetic: Guoqiang Li et al. 225

False logic

Lji A [O&&) + O;i(ab)] = F or H (i,j = 1,2) (9a)

LIZ A [02,(&) + Oz,(&) + OX(&)] = F or V (9b)

The true logic operations are considered first. The desired output is projected backwards to determine the input pixel pattern. The resulting pattern is substituted to verify the false logic. The false operation must be satisfied by all the input pixels while a true logic can be obtained from a single input pixel.

From (8b). we can choose either a21 = H, b2i = T, or ~21 = T. hri = H, or ~21 = h?i = H. Suppose ~21 = T, h~i = H. For @a), one can arbitrarily select 012 for the first operation and 021 for the second operation respectively. To satisfy OQ(&) = V, Uiz _= T and_ hi = V can be chosen. To satisfy Oz,(ah) = V, h2i should be chosen V since a21 has been chosen T. Substituting these results into (9a) and (9b), one finds that the false logic equations are tenable if all the remaining subpixels are encoded by F. But ait is changed to T to keep the encoding of the variable A consistent with that of the minuend for half-subtraction (see below). Therefore, the inputs can be encoded as

(10)

L=

Half-subtraction

For this operation, the subpixels 022 and Dti are used for the detection of the sum s and the positive carry c+ respectively, and they are both chosen V polarized since there is a condition that both s and c+ are logic 1 (Fig. 4(c)). The input and the output relation has the relation

Lzz A O,, = D,,

LI I A 01 I + LIZ A 012 + Lz, A 02, + Lzz A 0z2 = Dz2

(lla)

(lib)

In reference to the encoding method of the augend A in half-addition, the solution of these equations is chosen as

L=

(14)

Note that one (A) of the two variables in half-addition and half-subtraction has the same form, hence we can consecutively employ the two operations to perform the negabinary addition or subtraction only by changing the encoding method of the other variable (B).

Unified symbolic arithmetic unit design

Based on the above analyses, the unified symbolic arithmetic unit can be designed. The decoding mask is shown in Fig. 4(d), using V polarized D,, and D2z for the detection of the positive carry and sum respectively and H polarized D3, for the negative carry. The three inputs s, CS, c- from Table 3 are all represented as a 2 x 2 matrix. Now we determine the encoding patterns of the inputs.

The POSC equations are established first.

True logic

L22 A O,,(SC + c-) = v

Ljj A [O;;(sC + c-) + O&c + c-)

+ Ojj(SC + c-)] = v

L,z A 02,(sc + C-) = H

False logic

(15)

L22 A [O,,(SC + c-) + O,,(sC + c-) + O,,(Sc + c-)

+ O,,(sc + C-) + O,l(sC + c-)] = F or H

L;i A [o;j(ic + c-) + o;;(SC + c--) + O;j(St + C-)]

=ForH

LIZ A [Oz,(SC + C-) + Oz,(sC + c-1 + Or,(Sc + c-)

+ Oz,(SC + c-) + O?,(sC + c-)J = F or V

(16) The POSC logic equations are constructed as follows.

True logic

L22 A O,,(Zb) = V

L;, A [O;@) + O;@)] = v I (12)

False logic

L12 r\[Oii(&+ Oil(&) + O,,(ab)l = F or H

Lij A [O;j(tih) + O;j(ah)] = F or H (13)

The solution is not unique. One feasible scheme with only one input c+ polarized is

(17)

226 Unified negabinary symbolic arithmetic: Guoqiang Li et al.

If the input logic values 0 and 1 are required to be complementary, one solution with two polarized inputs is

L=

For illustration, the spatial representation of Table with the input encoding pattern in (17) and the corresponding decoding mask is depicted in Fig. 5.

(18)

3

Optical implementation

It is evident that, by use of the unified triple-in triple-out symbolic POSC system with only one input polarized, the addition or subtraction of bipolar numbers can be performed simultaneously in the parallel-sequential manner. Alternatively, one can use the double-in double-out systems in turn for half-addition and half- subtraction. The latter case needs changing the encoding pattern of one of the variables for different iterations. We consider the implementation for parallel addition and subtraction on the previous numerical example (Fig. 3) using the former algorithm.

The data arrangement in the input plane should be considered. In this scheme (Fig. 4(a)), each digit is spatially encoded by a pixel, and at each position, the corresponding pixels si, ci+, and ci - are superposed as the input pixel. In the output plane, for each pixel three subpixels in two columns are detected. Since the shadowgrams of adjacent input pixels overlap each other on the screen, to avoid crosstalk between the output pixels, the input pixels must be separated in the horizontal and vertical directions by a distance of one subpixel. For a pair of operands, the input pixels are aligned in a row from the LSB in the right to the MSB in the left. When multiple pairs of operands are processed, different pairs are arranged from the top to the bottom. The two-dimensional input data pattern and the decoding mask are illustrated in Figs 6(a) and (b) respectively, and the input plane is partitioned into two parts for addition and subtraction respectively. Figure 6(c) is the input pattern encoded in terms of (17).

In the POSC system (see Fig. 4(a)), assume t is the distance between the two consecutive horizontal or vertical light sources, dl and d are the subpixel sizes in the input and output planes respectively, and zl and z are the distances from the source plane to the input plane and from the input plane to the output plane, respectively. The following geometrical relations must be satisfied

d = ?d,/(t - dl)

z + zl = tzl/(t - dl) (19)

The effect of diffraction has to be considered2 if the input subpixels become finer.

LED pattern

00

00

Encoding pattern

si ci+ c;

S,^c:^c; Shadowgram

Decoding mask

0 %I

o” c_“i #

0 i+l

0’

0

0*

0

I0 1

O1 0

O0

Fig. 5 POSC design for the unified negabinary arithmetic unit. The input CT (positive carry), c,- (negative carry), and si (sum bit) generate the output CA, (positive carry to the next bit position), c,;, (negative carry to the next bit position), and the new sum bits,

Input pattern Decoding mask

0 = s*c+‘yT

(a)

q 66E 66B6

cc> Fig. 6 (a) Data arrangement in the input plane; (b) decoding mask; (c) initial encoded input

Conclusions

The POSC system has been efficiently used to design negabinary symbolic arithmetic. By introducing positive and negative carries, we are able to perform addition and subtraction through the alternate use of the half- addition and substitution rules. Alternatively, the two sets of substitution rules are combined and a unified negabinary symbolic arithmetic is obtained with only six rules. Both addition and subtraction can be realized by employing the same rules iteratively at digit level. Correspondingly, the encoding and decoding patterns for half-addition, half-subtraction, and the unified arithmetic are designed for POSC implementation. In the system, addition and subtraction of multiple pairs of numbers can be achieved in parallel with the same encoding and decoding methods. The architecture is simple, flexible, more functional, and cost-efficient. By

Unified negabinary symbolic arithmetic: Guoqiang Li et al. 227

using spatial light modulators and linear polarizers, real-time processing can be performed.

Acknowledgement

This work was supported by the National Natural Science Foundation of China.

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