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TLE206x, TLE206xA, TLE206xB, TLE206xYEXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE

µPOWER OPERATIONAL AMPLIFIERSSLOS193A – FEBRUARY 1997 – REVISED MARCH 1998

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2× Bandwidth (2 MHz) of the TL06x andTL03x Operational Amplifiers

Low Supply Current . . . 290 µA/Ch Typ

On-chip Offset Voltage Trimming forImproved DC Performance

High Output Drive, Specified into 100- ΩLoads

Lower Noise Floor Than EarlierGenerations of Low-Power BiFETs

description

The TLE206x series of low-power JFET-input operational amplifiers doubles the bandwidth of the earliergeneration TL06x and TL03x BiFET families without significantly increasing power consumption. TexasInstruments Excalibur process also delivers a lower noise floor than the TL06x and TL03x. On-chip zenertrimming of offset voltage yields precision grades for dc-coupled applications. The TL206x devices arepin-compatible with other TI BiFETs; they can be used to double the bandwidth of TL06x and TL03x circuits,or to reduce power consumption of TL05x, TL07x, and TL08x circuits by nearly 90%.

BiFET operational amplifiers offer the inherently-higher input impedance of the JFET-input transistors, withoutsacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing withhigh-impedance sensors or very low-level ac signals. They also feature inherently better ac response thanbipolar or CMOS devices having comparable power consumption. The TLE206x family features ahigh-output-drive circuit capable of driving 100-Ω loads at supplies as low as ±5 V. This makes them uniquelysuited for driving transformer loads in modems and other applications requiring good ac characteristics, lowpower, and high output drive.

Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken toobserve common-mode input voltage limits and output swing when operating from a single supply. DC biasingof the input signal is required and loads should be terminated to a virtual ground node at mid-supply. TexasInstruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from singlesupplies.

The TLE206x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems,Texas Instruments LinCMOS families of operational amplifiers (TLC- and TLV-prefixes) are recommended.When moving from BiFET to CMOS amplifiers, particular attention should be paid to slew rate and bandwidthrequirements, and output loading. The Texas Instrument TLV2432 and TLV2442 CMOS operational amplifiersare excellent choices to consider.

Copyright 1998, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TLE206x, TLE206xA, TLE206xB, TLE206xYEXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVEµPOWER OPERATIONAL AMPLIFIERS

SLOS193A – FEBRUARY 1997 – REVISED MARCH 1998

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLE2061 AVAILABLE OPTIONS

PACKAGED DEVICESCHIP

TAVIOmaxAT 25°C

SMALLOUTLINE†

(D)

CHIPCARRIER

(FK)

CERAMICDIP(JG)

PLASTICDIP(P)

TSSOP‡

(PW)

CHIPFORM§

(Y)

500 µV — — — — — —0°C to 70°C 1.5 mV TLE2061ACD — — TLE2061ACP — —

3 mV TLE2061CD — — TLE2061CP TLE2061CPWLE TLE2061Y

500 µV — — — — — —–40°C to 85°C 1.5 mV TLE2061AID — — TLE2061AIP — —

3 mV TLE2061ID — — TLE2061IP — —

500 µV — — TLE2061BMJG — — —–55°C to 125°C 1.5 mV TLE2061AMD TLE2061AMFK TLE2061AMJG TLE2061AMP — —

3 mV TLE2061MD TLE2061MFK TLE2061MJG TLE2061MP — —

† The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2061ACDR).Chips are tested at 25°C.‡ The PW package is available left-end taped and reeled (indicated by the LE suffix on the device type (e.g., TLE2061CPWLE).§ Chip forms are tested at 25°C only.


PACKAGED DEVICESCHIP FORM‡

TAVIOmaxAT 25°C

SMALL OUTLINE †

(D)CHIP CARRIER

(FK)CERAMIC DIP

(JG)PLASTIC DIP

(P)

CHIP FORM‡

(Y)

0°C to

70°C

1 mV2 mV4 mV

TLE2062BCDTLE2062ACDTLE2062CD

———

———

TLE2062BCPTLE2062ACPTLE2062CP

——

TLE2062Y

–40°C to

85°C

1 mV2 mV4 mV

TLE2062BIDTLE2062AIDTLE2062ID

———

———

TLE2062BIPTLE2062AIPTLE2062IP

———

–55°C to

125°C

1 mV2 mV4 mV

TLE2062BMDTLE2062AMDTLE2062MD

TLE2062BMFKTLE2062AMFKTLE2062MFK

TLE2062BMJGTLE2062AMJGTLE2062MJG

TLE2062BMPTLE2062AMPTLE2062MP

———

† The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2062ACDR).‡ Chip forms are tested at 25°C only.


PACKAGED DEVICESCHIP FORM‡

VIOmax SMALL OUTLINE † CHIP CARRIER CERAMIC DIP PLASTIC DIPCHIP FORM‡

TAVIOmaxAT 25°C

SMALL OUTLINE†

(D)CHIP CARRIER

(FK)CERAMIC DIP

(J)PLASTIC DIP

(N)(Y)TA AT 25°C (D) (FK) (J) (N)( )

0°Cto

70°C

2 mV4 mV6 mV

—TLE2064ACDTLE2064CD

— —TLE2064BCNTLE2064ACNTLE2064CN

——

TLE2064Y

–40°Cto

85°C

2 mV4 mV6 mV

—TLE2064AIDTLE2064ID

— —TLE2064BINTLE2064AINTLE2064IN

———

–55°Cto

125°C

2 mV4 mV6 mV

—TLE2064AMDTLE2064MD

—TLE2064AMFKTLE2064MFK

TLE2064BMJTLE2064AMJTLE2064MJ

TLE2064BMNTLE2064AMNTLE2064MN

———

† The D packages are available taped and reeled. Add R suffix to device type, (e.g., TLE2064ACDR).‡ Chip forms are tested at 25°C only.




1

2

3

4

8

7

6

5

OFFSET N1IN–IN+

VCC –

NCVCC+OUTOFFSET N2

NC – No internal connection

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NCVCC+NCOUTNC

NCIN –NC

IN +NC

NC

OF

FS

ET

N1

NC

NC

NC

NC

NC

OF

FS

ET

N2

NC

CC

–V

TLE2061, TLE2061A, AND TLE2061BD, DB, JG, P, OR PW PACKAGE

(TOP VIEW)

TLE2061M, TLE2061AM, TLE2061BMFK PACKAGE(TOP VIEW)

1

2

3

4

8

7

6

5

1OUT1IN–1IN+

VCC–

VCC+2OUT2IN–2IN+

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC2OUTNC2IN–NC

NC1IN–

NC1IN+

NC

NC

NC

NC

NC

NC

VN

C2I

N+

CC

–

VC

C +

1OU

T

TLE2062, TLE2062A, TLE2062BD, JG, OR P PACKAGE

(TOP VIEW)

TLE2062M, TLE2062AM, TLE2062BMFK PACKAGE(TOP VIEW)

4OU

T

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

4IN+NCVCC–NC3IN+

1IN+NC

VCC+NC

2IN+

1IN

–1O

UT

NC

3IN

–4I

N –

2IN

–

NC

3OU

T

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1OUT1IN–1IN+

VCC +2IN+2IN–

2OUT

4OUT4IN–4IN+VCC–3IN+3IN–3OUT

2OU

T

TLE2064, TLE2064A, TLE2064BD, J, OR N PACKAGE

(TOP VIEW)

TLE2064M, TLE2064AM, TLE2064B MFK PACKAGE(TOP VIEW)




TLE2061Y chip information

This chip, when properly assembled, displays characteristics similar to the TLE2061. Thermal compression orultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductiveepoxy or a gold-silicon preform.

OFFSET N1

IN+

IN–

OFFSET N2

VCC+

VCC–

OUT

CHIP THICKNESS: 15 MILS TYPICAL

BONDING PADS: 4 X 4 MILS MINIMUM

TJmax = 150°C

TOLERANCES ARE ± 10%.

ALL DIMENSIONS ARE IN MILS.

PIN (4) IS INTERNALLY CONNECTEDTO BACKSIDE OF CHIP.

BONDING PAD ASSIGNMENTS

(7)

(6)

(4)

(1)

(3)

(2)

(5)

45

65

(7) (6)

(1)

(3)(2)

(5)

(4)








BONDING PADS: 4 × 4 MILS MINIMUM

TJmax = 150°C

TOLERANCES ARE ±10%.


PIN (4) IS INTERNALLY CONNECTEDTO BACKSIDE OF THE CHIP.

+

–1OUT

1IN+

1IN–

VCC+

(4)

(6)

(3)

(2)

(5)

(1)

(7)

(8)

–

+2OUT

2IN+

2IN–

VCC–

73

75

(1)

(2)

(3)(4)

(5)

(6)

(7)(8)








BONDING PADS: 4 × 4 MILS MINIMUM

TJmax = 150°C

TOLERANCES ARE ±10%.


PIN (11) IS INTERNALLY CONNECTEDTO BACKSIDE OF CHIP.

+

–1OUT

1IN+

1IN–

VCC+(4)

(6)

(3)

(2)

(5)

(1)

–

+(7) 2 IN+

2 IN–2OUT

(11)

+

–3OUT

3IN+

3IN–

(13)

(10)

(9)

(12)

(8)

–

+(14)4OUT

4IN+

4IN–

VCC–

139

73

(1)

(2)(4)

(7)

(5) (6)

(8)

(11) (9)(10)(12)(13)

(14)

(3)

TLE206x, TLE206xA, TLE206xB, TLE206xYEXCALIBUR JFET-INPUT HIG

H-OUTPUT-DRIVE

POW

ER OPERATIO

NAL AMPLIFIERS

SLO

S193A

– FE

BR

UA

RY

1997 – RE

VIS

ED

MA

RC

H 1998

µ

PO

ST

OF

FIC

E B

OX

655303 DA

LLAS

, TE

XA

S 75265

•6–7

equivalent schematic (each channel)

Q20

VCC–

VCC+

Q13Q9

Q14

Q16Q4

IN+

IN–Q1 Q5 Q7Q3

Q6

C1

Q2

Q12

Q15

Q21

Q22

Q26

Q31

Q10

Q11

Q18

Q19Q25

Q27

Q17Q23

Q28

Q24

D1Q30

Q29

Q32

Q35Q33

Q34 Q36

D2

Q37

Q38

Q40Q41

Q42Q39

OUT

R11.1 kΩ

R455 kΩ

R21.1 kΩ

Q8

15 pF

R6

2.7 kΩ

R8

20 ΩR9

100 Ω

R7600 ΩR5

60 kΩ

R32.4 kΩ

C35.3 pF

C215 pF

See Note AOFFSET N2

OFFSET N1

NOTES: A. OFFSET N1 AND OFFSET N2 are only availiable on the TLE2061x devices.B. Component values are nominal.

ACTUAL DEVICE COMPONENT COUNT

COMPONENT TLE2061 TLE2062 TLE2064

Transistors 43 42 42

Resistors 9 9 9

Diodes 1 2 2

Capacitors 3 3 3




absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage, VCC+ (see Note 1) 19 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC– –19 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage, VID (see Note 2) ±38 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (any input) ±VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO ±80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current into VCC+ 80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current out of VCC – –80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, or PW package 260°C. . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.2. Differential voltages are at IN+ with respect to IN–.3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGETA ≤ 25°C

POWER RATINGDERATING FACTORABOVE TA = 25°C

TA = 70°CPOWER RATING



D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW

D–14 950 mW 7.6 mW/°C 608 mW 494 mW 190 mW

FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW

J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW

JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW

N 1150 mW 9.2 mW/°C 736 mW 598 mW 230 mW

P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW

PW 525 mW 4.2 mW/°C 336 mW — —

recommended operating conditions

C SUFFIX I SUFFIX M SUFFIXUNIT

MIN MAX MIN MAX MIN MAXUNIT

Supply voltage, VCC± ±3.5 ±18 ±3.5 ±18 ±3.5 ±18 V

Common mode input voltage VICVCC± = ± 5 V –1.6 4 –1.6 4 –1.6 4

VCommon-mode input voltage, VICVCC± = ± 15 V –11 13 –11 13 –11 13

V

Operating free-air temperature, TA 0 70 –40 85 –55 125 °C




TLE2061C electrical characteristics at specified free-air temperature, V CC± = ±5 V (unlessotherwise noted)

PARAMETER TEST CONDITIONS TA†

TLE2061CTLE2061ACTLE2061BC UNIT

MIN TYP MAX

TLE2061C25°C 0.8 3.1

TLE2061CFull range 4

VIO Input offset voltage TLE2061AC25°C 0.6 2.6

mVVIO Input offset voltage TLE2061ACFull range 3.5

mV

TLE2061BC25°C 0.5 1.9

TLE2061BC

VIC = 0 RS = 50 ΩFull range 2.4

αVIO Temperature coefficient of input offset voltageVIC = 0, RS = 50 Ω

Full range 6 µV/°C

Input offset voltage long-term drift (see Note 4) 25°C 0.04 µV/mo

IIO Input offset current25°C 1 pA

IIO Input offset currentFull range 0.8 nA

IIB Input bias current25°C 3 pA

IIB Input bias currentFull range 2 nA

VICR Common mode input voltage range

25°C–1.6

to4

–2to6

V

VICR Common-mode input voltage range

Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7

VOM Maximum positive peak output voltage swing

RL = 10 kΩFull range 3.3

VVOM+ Maximum positive peak output voltage swing

RL = 100 Ω25°C 2.5 3.1

V

RL = 100 ΩFull range 2

RL = 10 kΩ25°C –3.7 –3.9

VOM Maximum negative peak output voltage swing

RL = 10 kΩFull range –3.3

VVOM– Maximum negative peak output voltage swing

RL = 100 Ω25°C –2.5 –2.7

V

RL = 100 ΩFull range –2

VO = ±2 8 V RL = 10 kΩ25°C 15 80

VO = ±2.8 V, RL = 10 kΩFull range 2

AVD Large signal differential voltage amplification VO = 0 to 2 V RL = 100 Ω25°C 0.75 45

V/mVAVD Large-signal differential voltage amplification VO = 0 to 2 V, RL = 100 ΩFull range 0.5

V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3

VO = 0 to –2 V, RL = 100 ΩFull range 0.25

ri Input resistance 25°C 1012 Ω

ci Input capacitance 25°C 4 pF

zo Open-loop output impedance IO = 0 25°C 280 Ω

CMRR Common mode rejection ratio VIC = VICRmin RS = 50 Ω25°C 65 82

dBCMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 ΩFull range 65

dB

kSVR Supply voltage rejection ratio (∆VCC± /∆VIO)VCC± = ±5 V to ±15 V, 25°C 75 93

dBkSVR Supply-voltage rejection ratio (∆VCC± /∆VIO) CC± ,RS = 50 Ω Full range 75

dB

† Full range is 0°C to 70°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated

to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.




TLE2061C electrical characteristics at specified free-air temperature, V CC± = ±5 V (unlessotherwise noted) (continued)



MIN TYP MAX

ICC Supply current25°C 280 325

µAICC Supply currentVO = 0, No load Full range 350

µA

∆ICC Supply-current change over operating temperature range Full range 29 µA

† Full range is 0°C to 70°C.

TLE2061C operating characteristics at specified free-air temperature, V CC± = ±5 V



MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ CL = 100 pF25°C 2.2 3.4

V/µsSR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pFFull range 2.1

V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω

25°C59 100

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω

25°C43 60

nV/√Hz

VN(PP) Peak to peak equivalent input noise voltage f = 0 1 Hz to 10 Hz 25°C 1 1 µVVN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 µV

In Equivalent input noise current f = 1 kHz 25°C 1 fA/√Hz

THD Total harmonic distortionAVD = 2, f = 10 kHz,

25°C 0 025%THD Total harmonic distortion VD , ,VO(PP) = 2 V, RL = 10 kΩ 25°C 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF

25°C1.8

MHzB1 Unity-gain bandwidth (see Figure 3)RL = 100 Ω, CL = 100 pF

25°C1.3

MHz

t Settling time0.1%

25°C5

µsts Settling time0.01%

25°C10

µs

BOM Maximum output-swing bandwidth AVD = 1, RL = 10 kΩ 25°C 140 kHz

φ Phase margin at unity gain (see Figure 3)RL = 10 kΩ, CL = 100 pF

25°C58°

φm Phase margin at unity gain (see Figure 3)RL = 100 Ω, CL = 100 pF

25°C75°








MIN TYP MAX

TLE2061C25°C 0.6 3

TLE2061CFull range 3.9

VIO Input offset voltage TLE2061AC25°C 0.5 1.5


mV

TLE2061BC25°C 0.3 0.5

TLE2061BC

VIC = 0 RS = 50 kΩFull range 1

αVIO Temperature coefficient of input offset voltageVIC = 0, RS = 50 kΩ




IIO Input offset currentFull range 1 nA




25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13.2 13.7


RL = 10 kΩFull range 13


RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7


RL = 10 kΩFull range –13


RL = 600 Ω25°C –12.5 –13

V


VO = ±10 V RL = 10 kΩ25°C 30 230

VO = ±10 V, RL = 10 kΩFull range 20

AVD Large signal differential voltage amplification VO = 0 to 8 V RL = 600 Ω25°C 25 100

V/mVAVD Large-signal differential voltage amplification VO = 0 to 8 V, RL = 600 ΩFull range 10

V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25

VO = 0 to –8 V, RL = 600 ΩFull range 1






dB



dB






TLE2061C electrical characteristics at specified free-air temperature, V CC ± = ±15 V (unlessotherwise noted) (continued)



MIN TYP MAX


µAICC Supply currentVO = 0, No load Full range 375

µA

∆ICC Supply current change over operating temperature rangeO

Full range 34 µA∆ICC Supply-current change over operating temperature range Full range 34 µA





MIN TYP MAX



V/µs


25°C70 100


25°C40 60

nV/√Hz

VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 25°C 1.1 µV

In Equivalent input noise current f = 1 kHz 25°C 1.1 fA/√Hz




25°C2


25°C1.5

MHz

t Settling time0.1%

25°C5


25°C10

µs



25°C60°


25°C70°





TLE2061I electrical characteristics at specified free-air temperature, V CC± = ±5 V (unless otherwisenoted)

PARAMETER TEST CONDITIONS TA†TLE2061I , TLE2061AI

TLE2061BI UNITTAMIN TYP MAX

TLE2061I25°C 0.8 3.1

TLE2061IFull range 4.4

VIO Input offset voltage TLE2061AI25°C 0.6 2.6

mVVIO Input offset voltage TLE2061AIFull range 3.9

mV

TLE2061BI25°C 0.5 1.9

TLE2061BIVIC = 0, Full range 2.7

αVIO Temperature coefficient of input offset voltageVIC 0,RS = 50 Ω Full range 6 µV/°C






VICR Common mode input voltage range25°C –1.6 to 4 –2 to 6 V

VICR Common-mode input voltage rangeFull range –1.6 to 4 V

RL = 10 kΩ25°C 3.5 3.7




RL = 100 Ω25°C 2.5 3.1

V


RL = 10 kΩ25°C –3.7 –3.9




RL = 100 Ω25°C –2.5 –2.7

V


VO = ±2.8 V, 25°C 15 80VO ±2.8 V,RL = 10 kΩ Full range 2

AVD Large signal differential voltage amplification VO = 0 to 2 V, 25°C 0.75 45V/mVAVD Large-signal differential voltage amplification VO 0 to 2 V,

RL = 100 Ω Full range 0.5V/mV

VO = 0 to –2 V, 25°C 0.5 3VO 0 to 2 V,RL = 100 Ω Full range 0.25




CMRR Common mode rejection ratioVIC = VICRmin, 25°C 65 82

dBCMRR Common-mode rejection ratio IC ICR ,RS = 50 Ω Full range 65

dB


dBkSVR Supply-voltage rejection ratio (∆VCC± /∆VIO) CC±RS = 50 Ω Full range 65

dB


µAICC Supply currentVO = 0, N l d

Full range 350µA

∆ICCSupply-current change over operating temperature range

No loadFull range 29 µA

† Full range is –40°C to 85°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated





TLE2061I operating characteristics at specified free-air temperature, V CC± = ±5 V


TLE2061ITLE2061AITLE2061BI UNIT

MIN TYP MAX



V/µs


25°C59 100


25°C43 60

nV/√Hz




25°C 0 025%THD Total harmonic distortion VD , ,VO(PP) = 2 V, RL = 10 kΩ

25°C 0.025%


25°C1.8


25°C1.3

MHz

t Settling time0.1%

25°C5


25°C10

µs



25°C58°


25°C75°

† Full range is –40°C to 85°C.




TLE2061I electrical characteristics at specified free-air temperature, V CC± = ±15 V (unlessotherwise noted)

PARAMETER TEST CONDITIONS TA†TLE2061I, TLE2061AI

TLE2061BI UNITTAMIN TYP MAX

TLE2061I25°C 0.6 3


VIO Input offset voltage TLE2061AI25°C 0.5 1.5


mV

TLE2061BI25°C 0.3 0.5

TLE2061BIFull range 1.3

αVIOTemperature coefficient of input offset voltage

VIC = 0,RS = 50 Ω Full range 6 µV/°C






VICR Common mode input voltage range25°C –11 to 13 –12 to 16 V

VICR Common-mode input voltage rangeFull range –11 to 13 V

RL = 10 kΩ25°C 13.2 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7

VOMMaximum negative peak output voltage


VVOM–Maximum negative eak out ut voltageswing

RL = 600 Ω25°C –12.5 –13

V


VO = ±10 V, 25°C 30 230VO ±10 V,RL = 10 kΩ Full range 20

AVD Large signal differential voltage amplification VO = 0 to 8 V, 25°C 25 100V/mVAVD Large-signal differential voltage amplification VO 0 to 8 V,

RL = 600 Ω Full range 10V/mV

VO = 0 to –8 V, 25°C 3 25VO 0 to 8 V,RL = 600 Ω Full range 01




CMRR Common mode rejection ratio VIC = VICRmin, 25°C 72 90dBCMRR Common-mode rejection ratio VIC VICRmin,

RS = 50 Ω Full range 65dB



dB


µAICC Supply currentVO = 0, Full range 375

µA


ONo load

Full range 34 µA









MIN TYP MAX



V/µs


25°C70 100


25°C40 60

nV/√Hz






25°C2


25°C1.5

MHz

t Settling time0.1%

25°C5


25°C10

µs



25°C60°


25°C70°





TLE2061M electrical characteristics at specified free-air temperature, V CC± = ±5 V (unlessotherwise noted)


TLE2061MTLE2061AMTLE2061BM UNIT

MIN TYP MAX

TLE2061M25°C 0.8 3.1

TLE2061MFull range 6

VIO Input offset voltage TLE2061AM25°C 0.6 2.6

mVVIO Input offset voltage TLE2061AMFull range 4.6

mV

TLE2061BM25°C 0.5 1.9

TLE2061BM










25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7


VOM Maximum positive peak output voltage swing RL = 600 Ω25°C 2.5 3.6

VVOM+ Maximum positive peak output voltage swing RL = 600 ΩFull range 2

V

RL = 100 Ω25°C 2.5 3.1


RL = 10 kΩ25°C –3.5 –3.9


VOMMaximum negative peak FK and JG

RL = 600 Ω25°C –2.5 –3.5

VVOM–g

output voltage swing packagesRL = 600 Ω

Full range –2V

D and PRL = 100 Ω

25°C –2.5 –2.7

packagesRL = 100 Ω

Full range –2

VO = ±2 8 V RL = 10 kΩ25°C 15 80


VO = 0 to 2 5 V RL = 600 Ω25°C 1 65

FK and JGVO = 0 to 2.5 V, RL = 600 Ω

Full range 0.5

AVDLarge-signal differential packages

VO = 0 to 2 5 V RL = 600 Ω25°C 1 16

V/mVAVDg g

voltage amplification VO = 0 to –2.5 V,RL = 600 ΩFull range 0.5

V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.75 45

D and PVO = 0 to 2 V, RL = 100 Ω

Full range 0.5packages

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3







TLE2061M electrical characteristics at specified free-air temperature, V CC± = ±5 V (unlessotherwise noted) (continued)



MIN TYP MAX




CMRR Common mode rejection ratioVIC = VICRmin, 25°C 65 82

dBCMRR Common-mode rejection ratio IC ICR ,RS = 50 Ω Full range 60

dB

kSVR Supply-voltage rejection ratio (∆VCC± /∆VIO)VCC± = ±5 V to ±15 V, 25°C 75 93

dBkSVR Su ly-voltage rejection ratio (∆VCC± /∆VIO)RS = 50 Ω Full range 65

dB


µAICC Supply currentVO = 0 No load

Full range 350µA

∆ICCSupply-current change over operatingtemperature range

VO = 0, No load

Full range 39 µA


TLE2061M operating characteristics at specified free-air temperature, V CC± = ±5 V, TA = 25°C

PARAMETER TEST CONDITIONS


MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ CL = 100 pF 3 4 V/µsSR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 3.4 V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω 59

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω 43

nV/√Hz

VN(PP) Peak to peak equivalent input noise voltage f = 0 1 Hz to 10 Hz 1 1 µVVN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 1.1 µV

In Equivalent input noise current f = 1 kHz 1 fA /√Hz


0 025%THD Total harmonic distortion VD , ,VO(PP) = 2 V, RL = 10 kΩ 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF 1.8

MHzB1 Unity-gain bandwidth (see Figure 3)RL = 600 Ω, CL = 100 pF 1.3

MHz

t Settling time0.1% 5

µsts Settling time0.01% 10

µs

BOM Maximum output-swing bandwidth AVD = 1, RL = 10 kΩ 140 kHz

φ Phase margin at unity gain (see Figure 3)RL = 10 kΩ, CL = 100 pF 58°

φm Phase margin at unity gain (see Figure 3)RL = 600 Ω, CL = 100 pF 75°





PARAMETER TEST CONDITIONS TA†TLE2061M ,TLE2061AM

TLE2061BM UNITTAMIN TYP MAX

TLE2061M25°C 0.6 3


VIO Input offset voltage TLE2061AM25°C 0.5 1.5

mVVIO Input offset voltage TLE2061AMFull range 3.6

mV

TLE2061BM25°C 0.3 0.5

TLE2061BMFull range 1.7

αVIOTemperature coefficient of input offsetvoltage

VIC = 0,RS = 50 Ω Full range 6 µV/°C






VICR Common mode input voltage range25°C –11 to 13 –12 to 16 V

VICR Common-mode input voltage rangeFull range –11 to 13 V

RL = 10 kΩ25°C 13 13.7

VOMMaximum positive peak output voltage


VVOM+Maximum ositive eak out ut voltageswing

RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13 –13.7

VOMMaximum negative peak output voltage


VVOM–Maximum negative eak out ut voltageswing

RL = 600 Ω25°C –12.5 –13

V


VO = ±10 V, 25°C 30 230VO ±10 V,RL = 10 kΩ Full range 20

AVDLarge-signal differential voltage VO = 0 to 8 V, 25°C 25 100

V/mVAVDLarge signal differential voltage amplification

VO 0 to 8 V,RL = 600 Ω Full range 7

V/mV

VO = 0 to – 8 V, 25°C 3 25VO 0 to 8 V,RL = 600 Ω Full range 1




CMRR Common mode rejection ratio VIC = VICRmin, 25°C 72 90dBCMRR Common-mode rejection ratio VIC VICRmin,


kSVRSupply-voltage rejection ratio VCC± = ±5 V to ±15 V, 25°C 75 93

dBkSVRy g j

(∆VCC± /∆VIO)CC± ,







TLE2061M electrical characteristics at specified free-air temperature, V CC± = ±15 V (unlessotherwise noted) (continue)

PARAMETER TEST CONDITIONS TA†TLE2061M ,TLE2061AM

TLE2061BM UNITTAMIN TYP MAX


µAICC Supply current

VO = 0 No loadFull range 375

µA


VO = 0, No load

Full range 46 µA


TLE2061M operating characteristics at specified free-air temperature, V CC± = ±15 V



MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ CL = 100 pF25°C 2 3.4


V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω 25°C 70

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 25°C 40

nV/√Hz


In Equivalent input noise current f = 1 kHz 25°C 1.1 fA /√Hz

THD Total harmonic distortionAVD = 2, f = 10 kHz,VO(PP) = 2 V, RL = 10 kΩ 25°C 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF 25°C 2

MHzB1 Unity-gain bandwidth (see Figure 3)RL = 600 Ω, CL = 100 pF 25°C 1.5

MHz

t Settling time0.1% 25°C 5

µsts Settling time0.01% 25°C 10

µs

BOM Maximum output swing bandwidth AVD = 1 RL = 10 kΩ 25°C 40 kHzBOM Maximum output-swing bandwidth AVD = 1, RL = 10 kΩ 25°C 40 kHz

φ Phase margin at unity gain (see Figure 3)RL = 10 kΩ, CL = 100 pF 25°C 60°

φm Phase margin at unity gain (see Figure 3)RL = 600 Ω, CL = 100 pF 25°C 70°





TLE2061Y electrical characteristics at V CC± = ±15 V, TA = 25°C (unless otherwise noted)

PARAMETER TEST CONDITIONSTLE2061Y

UNITPARAMETER TEST CONDITIONSMIN TYP MAX

UNIT

VIO Input offset voltage 0.6 3 mV

αVIO Input offset voltage long-term drift (see Note 4)VIC = 0 RS = 50 Ω

0.04 µV/mo

IIO Input offset currentVIC = 0, RS = 50 Ω

2 pA

IIB Input bias current 4 pA

VICR Common-mode input voltage range–11

to13

–12to16

V

VOM Maximum positive peak output voltage swingRL = 10 kΩ 13.2 13.7

VVOM+ Maximum positive peak output voltage swingRL = 600 Ω 12.5 13.2

V

VOM Maximum negative peak output voltage swingRL = 10 kΩ –13.2 –13.7

VVOM– Maximum negative peak output voltage swingRL = 600 Ω –12.5 – 13

V

VO = ±10 V, RL = 10 kΩ 30 230

AVD Large-signal differential voltage amplification VO = 0 to 8 V, RL = 600 Ω 25 100 V/mV

VO = 0 to – 8 V, RL = 600 Ω 3 25

ri Input resistance 1012 Ω

ci Input capacitance 4 pF

zo Open-loop output impedance IO = 0 280 Ω

CMRR Common-mode rejection ratio RS = 50 Ω, VIC = VICRmin 72 90 dB

kSVR Supply voltage rejection ratio (∆VCC/∆VIO)VCC± = ±5 V to ±15 V,R 50 Ω 75 93 dBkSVR Supply-voltage rejection ratio (∆VCC/∆VIO) RS = 50 Ω 75 93 dB

ICC Supply current VO = 0, No load 290 350 µA

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolatedto TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

TLE2061Y operating characteristics at V CC± = ±15 V, TA = 25°C



UNIT

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 2.6 3.4 V/µs


nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω 40

nV/√Hz

VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 Hz to 10 Hz 1.1 µV

In Equivalent input noise current f = 1 Hz 1.1 fA /√Hz


0 025%THD Total harmonic distortion VD , ,VO(PP) = 2 V, RL = 10 kΩ 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF 2


MHz

t Settling time0.1% 5

µsts Settling time0.01% 10

µs










MIN TYP MAX

TLE2062C25°C 1 5


VIO Input offset voltage TLE2062AC25°C 0.9 4


mV

TLE2062BC25°C 0.7 3

TLE2062BC










25°C–1.6

to4

–2to6

V

VICR Common-mode in ut voltage range

Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7




RL = 100 Ω25°C 2.5 3.1

V


RL = 10 kΩ25°C –3.7 –3.9




RL = 100 Ω25°C –2.5 –2.7

V


VO = ± 2 8 V RL = 10 kΩ25°C 15 80

VO = ± 2.8 V, RL = 10 kΩFull range 2



V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3







dB

kSVR Supply voltage rejection ratio (∆VCC± /∆VIO)VCC± = ± 5 V to ± 15 V, 25°C 75 93


dB

† Full range is 0°C to 70°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolated

to TA = 25 °C using the Arrhenius equation and assuming an activation energy of 0.96 eV.







MIN TYP MAX




µA

∆ICCSupply-current change over operating

VO = 0, No load

Full range 26 µA∆ICCy g g

temperature range Full range 26 µA





MIN TYP MAX



V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω 25°C 59 100

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 25°C 43 60

nV/√Hz



THD Total harmonic distortionVO(PP) = 2 V, RL = 10 kΩ,

25°C 0 025%THD Total harmonic distortion O(PP) ,AVD = 2,

L ,f = 10 kHz

25°C 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF 25°C 1.8


MHz

Settling time0.1% 25°C 5

µsSettling time0.01% 25°C 10

µs











MIN TYP MAX

TLE2062C25°C 0.9 4




mV

TLE2062BC25°C 0.5 1

TLE2062BC










25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13.2 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7




RL = 600 Ω25°C –12.5 –13

V


VO = ± 10 V RL = 10 kΩ25°C 30 230

VO = ± 10 V, RL = 10 kΩFull range 20



V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25







dB



dB

† Full range is 0°C to 70°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolated








MIN TYP MAX



VO = 0 V No loadFull range 715

µA


VO = 0 V, No load


temperature rangeFull range 36 µA





MIN TYP MAX



V/µs


V/√HVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 25°C 40 60

nV/√Hz





L ,f = 10 kHz

25°C 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 10 0 pF 25°C 2


MHz



µs











MIN TYP MAX

TLE2062I25°C 1 5


VIO Input offset voltage TLE2062AI25°C 0.9 4


mV

TLE2062BI25°C 0.7 3

TLE2062BI










25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7




RL = 100 Ω25°C 2.5 3.1

V


RL = 10 kΩ25°C –3.7 –3.9




RL = 100 Ω25°C –2.5 –2.7

V


VO = ± 2 8 V RL = 10 kΩ25°C 15 80

VO = ± 2.8 V, RL = 10 kΩFull range 2



V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3







dB



dB

† Full range is –40°C to 85°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolated





TLE2062I electrical characteristics at specified free-air temperature, V CC± = ±5 V (unless otherwisenoted) (continued)



MIN TYP MAX




µA


VO = 0, No load




TLE2062I operating characteristics at specified free-air temperature, V CC ± = ±5 V



MIN TYP MAX



V/µs



nV/√Hz





L ,f = 10 kHz

25°C 0.025%

B1 Unity gain bandwidth (see Figure 3)RL = 10 kΩ, CL = 100 pF 25°C 1.8


MHz



µs











MIN TYP MAX

TLE2062I25°C 0.9 4




mV

TLE2062BI25°C 0.5 1

TLE2062BI










25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13.2 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7




RL = 600 Ω25°C –12.5 –13

V


VO = ± 10 V RL = 10 kΩ25°C 30 230




V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25







dB



dB






TLE2062I electrical characteristics at specified free-air temperature, V CC± = ±15 V (unlessotherwise noted) (continued)



MIN TYP MAX




µA


VO = 0, No load







MIN TYP MAX



V/µs



nV/√Hz





L ,f = 10 kHz

25°C 0.025%



MHz



µs








TLE2062M electrical characteristics at specified free-air temperature, V CC± = ±5 V



MIN TYP MAX

TLE2062M25°C 1 5


VIO Input offset voltage TLE2062AM25°C 0.9 4

mVVIO Input offset voltage TLE2062AMFull range 6

mV

TLE2062BM25°C 0.7 3

TLE2062BM

VIC = 0 RS = 50 ΩFull range 5









25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7


VOMMaximum positive peak output FK and JG RL = 600 Ω

25°C 2.5 3.6VVOM+ voltage swing

FK and JGpackages RL = 600 Ω

Full range 2V

D and P RL = 100 Ω25°C 2.5 3.1D and P

packages RL = 100 ΩFull range 2

RL = 10 kΩ25°C –3.5 –3.9


VOMMaximum negative peak output FK and JG RL = 600 Ω

25°C –2.5 –3.5VVOM–

gvoltage swing

FK and JGpackages RL = 600 Ω

Full range –2V

D and P RL = 100 Ω25°C –2.5 –2.7D and P

packages RL = 100 ΩFull range –2

VO = ±2 8 V RL = 10 kΩ25°C 15 80


VO = 0 to 2 5 V RL = 600 Ω25°C 1 65

FK and JGVO = 0 to 2.5 V, RL = 600 Ω

Full range 0.5

AVDLarge-signal differential voltage

FK and JGpackages

VO = 0 to 2 5 V RL = 600 Ω25°C 1 16

V/mVAVDg g g

amplificationVO = 0 to –2.5 V, RL = 600 Ω

Full range 0.5V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.75 45

D and PVO = 0 to 2 V, RL = 100 Ω

Full range 0.5D and Ppackages

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3










MIN TYP MAX




CMRR Common mode rejection ratioVIC = VICRmin 25°C 65 82

dBCMRR Common-mode rejection ratio RS = 50 Ω, Full range 60dB


dBkSVR Supply-voltage rejection ratio (∆VCC± /∆VIO) RS = 50 Ω Full range 65dB

ICC Supply current (two amplifiers)25°C 560 620

µAICC Supply current (two amplifiers)


µA


VO = 0, No load


temperature range (two amplifiers)Full range 72 µA


TLE2062M operating characteristics at specified free-air temperature, T A = 25°C, VCC± = ±5 V



MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 3.4 V/µs


nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 43

nV/√Hz


In Equivalent input noise current f = 1 kHz 1 fA/√Hz


0 025%THD Total harmonic distortion O(PP) ,AVD = 2,

L ,f = 10 kHz

0.025%



MHz

Settling time0.1% 5

µsSettling time0.01% 10

µs










MIN TYP MAX

TLE2062M25°C 0.9 4




mV

TLE2062BM25°C 0.5 1

TLE2062BM










25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13 –13.7




RL = 600 Ω25°C –12.5 –13

V


VO = ± 10 V RL = 10 kΩ25°C 30 230




V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25







dB



dB









MIN TYP MAX




µA


VO = 0, No load







MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ CL = 100 pF25°C 2 3.4


V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω 25°C 70

nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 25°C 40

nV/√Hz



THD Total harmonic distortionVO(PP) = 2 V,AVD = 2,

RL = 10 kΩ,f = 10 kHz

25°C 0.025%



MHz



µs

BOM Maximum output swing bandwidth AVD = 1 RL = 10 kΩ 25°C 40 kHzBOM Maximum output-swing bandwidth AVD = 1, RL = 10 kΩ 25°C 40 kHz










UNIT


αVIO Input offset voltage long-term drift (see Note 4)VIC = 0 RS = 50 Ω

0.04 µV/mo


2 pA


–11 –12VICR Common-mode input voltage range

11to

12to VICR g g

13 16



V

VOM Maximum negative peak output voltage swingRL = 10 kΩ –13.2 –13.7

VVOM– Maximum negative peak output voltage swingRL = 600 Ω –12.5 –13

V

VO = ±10 V, RL = 10 kΩ 30 230


VO = 0 to –8 V, RL = 600 Ω 3 25




CMRR Common-mode rejection ratio VIC = VICRmin, RS = 50 Ω 72 90 dB

kSVR Supply voltage rejection ratio (∆VCC/∆VIO)VCC± = ±5 V to ±15 V,

75 93 dBkSVR Supply-voltage rejection ratio (∆VCC/∆VIO) CC± ,RS = 50 Ω 75 93 dB

ICC Supply current VO = 0, No load 625 690 µA

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150 °C extrapolatedto TA = 25 °C using the Arrhenius equation and assuming an activation energy of 0.96 eV.




UNIT

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 2.6 3.4 4 V/µs


nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz, RS = 20 Ω 40

nV/√Hz


In Equivalent input noise current f = 1 Hz 1.1 fA/√Hz

THD Total harmonic distortionVO(PP) = 2 V,AVD = 2,

RL = 10 kΩ,f = 10 kHz

0.025%



MHz

Settling time0.1% 5

µsSettling time0.01% 10

µs










MIN TYP MAX

TLE2064C25°C 1.2 7




mV

TLE2064BC25°C 0.8 3.5

TLE2064BC



25°C 6 µV/°CInput offset voltage long-term drift (see Note 4) Full range 0.04 µV/mo






25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7




RL = 100 Ω25°C 2.5 3.1

V


RL = 10 kΩ25°C –3.7 –3.9




RL = 100 Ω25°C –2.5 –2.7

V


VO = ±2 8 V RL = 10 kΩ25°C 15 80




V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3


ri Input resistance 25°C 1012 Ωci Input capacitance 25°C 4 pF




dB



dB









MIN TYP MAX

ICC Supply current (four amplifiers)25°C 1.12 1.3

mAICC Supply current (four amplifiers)

VO = 0 No loadFull range 1.3

mA


VO = 0, No load


temperature range (four amplifiers)Full range 52 µA

VO1/VO2 Crosstalk attenuation AVD = 1000, f = 1 kHz 25°C 120 dB





MIN TYP MAX



V/µs


25°C59 100

nV/√HVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω

25°C43 60

nV/√Hz




25°C 0 025%THD Total harmonic distortion VD ,VO(PP) = 2 V,

,RL = 10 kΩ 25°C 0.025%


25°C1.8


25°C1.3

MHz

t Settling timeε = 0.1%

25°C5

µsts Settling timeε = 0.01%

25°C10

µs



25°C58°


25°C75°








MIN TYP MAX

TLE2064C25°C 0.9 6




mV

TLE2064BC25°C 0.7 2

TLE2064BC



25°C 6 µV/°C

Input offset voltage long-term drift (see Note 4) Full range 0.04 µV/mo






25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13.2 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7




RL = 600 Ω25°C –12.5 –13

V


VO = ±10 V RL = 10 kΩ25°C 30 230




V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25







dB



dB









MIN TYP MAX




mA


VO = 0, No load


temperature range (four amplifiers) Full range 72 µA






MIN TYP MAX



V/µs


25°C70 100


25°C40 60

nV/√Hz





,RL = 10 kΩ 25°C 0.025%


25°C2


25°C1.5

MHz


25°C5


25°C10

µs



25°C50°


25°C70°








MIN TYP MAX

TLE2064I25°C 1.2 7




mV

TLE2064BI25°C 0.8 3.5

TLE2064BI









25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7




RL = 100 Ω25°C 2.5 3.1

V


RL = 10 kΩ25°C –3.7 –3.9




RL = 100 Ω25°C –2.5 –2.7

V


VO = ±2 8 V RL = 10 kΩ25°C 15 80




V/mV

VO = 0 to 2 V RL = 100 Ω25°C 0.5 3






dB



dB






TLE2064I electrical characteristics at specified free-air temperature, V CC± = ±5 V (unless otherwisenoted) (continued)



MIN TYP MAX




mA


VO = 0, No load





TLE2064I operating characteristics at specified free-air temperature, V CC± = ±5 V (unless otherwisenoted)



MIN TYP MAX



V/µs


25°C59 100

nV/√HVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , f = 1 kHz ,

25°C43 60

nV/√Hz



THD Total harmonic distortionAVD = 2,VO(PP) = 2 V,

f = 10 kHz,RL = 10 kΩ 25°C 0.025%


25°C1.8


25°C1.3

MHz


25°C5


25°C10

µs



25°C58°


25°C75°

† Full range is – 40°C to 85°C.







MIN TYP MAX

TLE2064I25°C 0.9 6




mV

TLE2064BI25°C 0.7 2

TLE2064BI









25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13.2 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13.2 –13.7




RL = 600 Ω25°C –12.5 –13

V


VO = ±10 V RL = 10 kΩ25°C 30 230




V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25






dB



dB

† Full range is – 40°C to 85°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated





TLE2064I electrical characteristics at specified free-air temperature, V CC± = ±15 V (unlessotherwise noted) (continued)



MIN TYP MAX




mA


VO = 0, No load





TLE2064I operating characteristics at specified free-air temperature, V CC± = ± 15 V



MIN TYP MAX



V/µs

V Equivalent input noise voltage (see Figure 2)f = 10 Hz, RS = 20 Ω,

25°C70 100


25°C40 60

nV/√Hz




25°C 0 025%THD Total harmonic distortion VD ,RL = 10 kΩ

,VO(PP) = 2 V,

25°C 0.025%


25°C2


25°C1.5

MHz


25°C5


25°C10

µs



25°C60°


25°C70°








MIN TYP MAX

TLE2064M25°C 1.2 7




mV

TLE2064BM25°C 0.8 3.5

TLE2064BM



25°C 6 µV/°C

Input offset voltage long-term drift (see Note 4) Full range 0.04 µV/mo






25°C–1.6

to4

–2to6

V


Full range–1.6

to4

V

RL = 10 kΩ25°C 3.5 3.7


VOMMaximum positive peak output FK and J

RL = 600 Ω25°C 2.5 3.6

VVOM+ voltage swing packagesRL = 600 Ω

Full range 2V

D and NRL = 100 Ω

25°C 2.5 3.1

packagesRL = 100 Ω

Full range 2

RL = 10 kΩ25°C –3.5 –3.9


VOMMaximum negative peak output FK and J

RL = 600 Ω25°C –2.5 –3.5

VVOM–g

voltage swing packagesRL = 600 Ω

Full range –2V

D and NRL = 100 Ω

25°C –2.5 –2.7

packagesRL = 100 Ω

Full range –2

VO = ±2 8 V RL = 10 kΩ25°C 15 80


AVDLarge-signal differential voltage

VO = 0 to 2 5 V RL = 600 Ω25°C 1 65

V/mVAVDg g g

amplification FK and JVO = 0 to 2.5 V, RL = 600 Ω

Full range 0.5V/mV

packagesVO = 0 to 2 5 V RL = 600 Ω

25°C 1 16VO = 0 to –2.5 V, RL = 600 Ω

Full range 0.5† Full range is – 55°C to 125°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated





TLE2064M electrical characteristics at specified free-air temperature, V CC± = ±5 V (unlessotherwise noted) continued)



MIN TYP MAX

VO = 0 to 2 V RL = 100 Ω25°C 0.75 45

AVDLarge-signal differential voltage D and N

VO = 0 to 2 V, RL = 100 ΩFull range 0.25

V/mVAVDg g g

amplification packagesVO = 0 to 2 V RL = 100 Ω

25°C 0.4 3V/mV







dB



dB




mA

∆ICCSupply-current change over operatingtemperature range (four amplifiers)

VO = 0, No load

Full range 144 µA



TLE2064M operating characteristics, V CC± = ±5 V, TA = 25°C



MIN TYP MAX

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 3.4 V/µs


nV/√HVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω 43

nV/√Hz


In Equivalent input noise current f = 1 kHz 1 fA/√Hz


0 025%THD Total harmonic distortion VD ,VO(PP) = 2 V,

,RL = 10 kΩ 0.025%



MHz

t Settling timeε = 0.1% 5

µsts Settling timeε = 0.01% 10

µs










MIN TYP MAX

TLE2064M25°C 0.9 6




mV

TLE2064BM25°C 0.7 2

TLE2064BMFull range 4

αVIO Temperature coefficient of input offset voltage VIC = 0, RS = 50 Ω 25°C 6 µV/°CInput offset voltage long-term drift (see Note 4)

Full range 0.04 µV/mo






25°C–11

to13

–12to16

V


Full range–11

to13

V

RL = 10 kΩ25°C 13 13.7




RL = 600 Ω25°C 12.5 13.2

V


RL = 10 kΩ25°C –13 –13.7




RL = 600 Ω25°C –13 –13

V

RL = 600 ΩFull range –12.5

VO = ±10 V RL = 10 kΩ25°C 30 230




V/mV

VO = 0 to 8 V RL = 600 Ω25°C 3 25






dB



dB

† Full range is – 55°C to 125°C.NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated





TLE2064M electrical characteristics at specified free-air temperature, V CC± = ±15 V (unlessotherwise noted) (continued)



MIN TYP MAX




mA


VO = 0, No load








MIN TYP MAX



V/µs


25°C70


25°C40

nV/√Hz





,RL = 10 kΩ 25°C 0.025%


25°C2


25°C1.5

MHz


25°C5


25°C10

µs



25°C60°


25°C70°








UNIT


∝ VIO Input offset voltage long-term drift (see Note 4)VIC = 0 RS = 50 Ω

0.04 µV/mo


2 pA


VICR Common-mode input voltage range–11

to13

–12to16

V



V

VOM Maximum negative peak output voltage swingRL = 10 kΩ –13.2 –13.7 V

VOM– Maximum negative peak output voltage swingRL = 600 Ω 12.5 13 V

VO = ±10 V, RL = 10 kΩ 30 230


VO = 0 to –8 V, RL = 600 Ω 3 25




CMRR Common-mode rejection ratioRS = 50 Ω,VIC = VICRmin,

72 90 dB

kSVR Supply-voltage rejection ratio (∆VCC± /∆VIO)VCC± = ±5 V to ±15 V,RS = 50 Ω 75 93 dB

ICC Supply current VO = 0, No load 1.25 1.4 mA

VO1/VO2 Crosstalk attenuation AVD = 1000, f = 1 kHz 120 dB

NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolatedto TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.




UNIT

SR Slew rate at unity gain (see Figure 1) RL = 10 kΩ, CL = 100 pF 2.6 3.4 V/µs


nV/√HVn Equivalent input noise voltage (see Figure 2)f = 1 kHz , RS = 20 Ω 40

nV/√Hz


In Equivalent input noise current f = 1 kHz 1.1 fA/√Hz


0 025%THD Total harmonic distortion VD ,VO(PP) = 2 V,

,RL = 10 kΩ 0.025%



MHz

t Settling timeε = 0.1% 5

µsts Settling timeε = 0.01% 10

µs







PARAMETER MEASUREMENT INFORMATION

Figure 1. Slew-Rate Test Circuit

RL(see Note A)

CL

VO

VCC–

VI +

–

VCC+

NOTE A: CL includes fixture capacitance.

Figure 2. Noise-Voltage Test Circuit

VO

RSRS

2 kΩ

VCC–

VCC+

+

–

VO

RLCL(see Note A)

10 kΩ

100 ΩVI

VCC–

VCC+

+

–

NOTE A: CL includes fixture capacitance.

Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit

typical values

Typical values presented in this data sheet represent the median (50% point) of device parametric performance.

input bias and offset current

At the picoampere bias current level typical of the TLE206x, TLE2064xA, and TLE206xB, accuratemeasurement of the bias current becomes difficult. Not only does this measurement require a picoammeter,but test socket leakages can easily exceed the actual device bias currents. To accurately measure these smallcurrents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeterswith bias voltages applied but with no device in the socket. The device is then inserted into the socket, and asecond test that measures both the socket leakage and the device input bias current is performed. The twomeasurements are then subtracted algebraically to determine the bias current of the device.




TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

VIO Input offset voltage Distribution 4, 5, 6

IIB Input bias currentvs Common-mode input voltagevs Free-air temperature

78

IIO Input offset current vs Free-air temperature 8

VICR Common-mode input voltage vs Free-air temperature 9

VOM Maximum peak output voltagevs Output currentvs Supply voltage

10, 1112, 13, 14

VO(PP) Maximum peak-to-peak output voltagevs Frequencyvs Load resistance

15, 1617

AVD Large-signal differential voltage amplificationvs Frequencyvs Free-air temperature

1819

IOS Short-circuit output currentvs Elasped timevs Free-air temperature

2021

zo Output impedance vs Frequency 22, 23

CMRR Common-mode rejection ratio vs Frequency 24

ICC Supply currentvs Supply voltagevs Free-air temperature

25, 26, 2728, 29, 30

Voltage-follower small-signal pulse response vs Time 31, 32

Voltage-follower large-signal pulse response vs Time 33, 34

Noise voltage (referred to input) 0.1 to 10 Hz 35

Vn Equivalent input noise voltage vs Frequency 36

THD Total harmonic distortion vs Frequency 37, 38

B1 Unity-gain bandwidthvs Supply voltagevs Free-air temperature

3940

φm Phase marginvs Supply voltagevs Load capacitancevs Free-air temperature

414243

Phase shift vs Frequency 18





Figure 4

TLE2061DISTRIBUTION OF

INPUT OFFSET VOLTAGE

43210–1–2–3–4

VIO – Input Offset Voltage – mV

Per

cent

age

of

Am

plifi

ers

– %

0

5

10

15

P PackageTA = 25°CVCC± = ±15 V736 Amplifiers Tested From 3 Wafer Lots

Figure 5VIO – Input Offset Voltage – mV

10

5

0– 2 –1 0 1

Per

cent

age

of A

mpl

ifier

s –

%


INPUT OFFSET VOLTAGE

2 3 4

151836 Amplifiers Tested From 1 Wafer LotVCC± = ±15 VTA = 25°CP Package

–3–4

Figure 6


INPUT OFFSET VOLTAGE20

15

10

5

N PackageTA = 25°CVCC± = ±15 V

86420– 2– 4– 6– 8

VIO – Input Offset Voltage – mV

Per

cent

age

of A

mpl

ifier

s –

%

0

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

2792 Amplifiers Tested From 2 Wafer Lots

Figure 7

– In

put B

ias

Cur

rent

– n

AI IB

1.5

1

0.5

TA = 25°CVID = 0

VCC± = ±15 V

VIC – Common-Mode Input Voltage – V

– 20 – 15 – 10 – 5 0 5 10 15 20

2

0

INPUT BIAS CURRENTvs

COMMON-MODE INPUT VOLTAGE




TYPICAL CHARACTERISTICS †

Figure 8

INPUT BIAS CURRENTAND INPUT OFFSET CURRENT

vsFREE-AIR TEMPERATURE

TA – Free-Air Temperature – °C10585654525

105

104

103

102

101

100

VIC = 0VCC± = ±15 V

– In

put B

ias

and

Inpu

t Offs

et C

urre

nts

– pA

I IB

and

I IO

ÎÎÎÎ

IIOÎÎÎÎIIB

125

Figure 9

COMMON-MODE INPUT VOLTAGEvs

FREE-AIR TEMPERATURE

1251007550250– 25– 50– 75

TA – Free-Air Temperature – °C

VCC +

VCC +

VCC –

VCC –

VCC – + 2

+ 3

+ 4

VCC +

+ 1

+ 2

– C

omm

on-M

ode

Inpu

t Vol

tage

– V

VIC

ÎÎÎVIC +

ÎÎÎÎ

VIC –

Figure 10

MAXIMUM POSITIVE PEAKOUTPUT VOLTAGE

vsOUTPUT CURRENT

– M

axim

um P

ositi

ve P

eak

Out

put V

olta

ge –

VV O

M+

– 60– 50– 40– 30– 20– 100

IO – Output Current – mA

0

2

4

6

8

10

12

14

16

18

20

VCC± = ± 5 V

VCC± = ±15 V

ÎÎÎÎÎÎÎÎÎÎ

TA = 25°C

Figure 11

MAXIMUM NEGATIVE PEAKOUTPUT VOLTAGE

vsOUTPUT CURRENT

– M

axim

um N

egat

ive

Pea

k O

utpu

t Vol

tage

– V

VO

M–

30 35

VCC± = ±15 V

VCC± = ±5 V

IO – Output Current – mA

0 5 10 15 20 25 40

– 20

– 18

– 16

– 14

– 12

– 10

– 8

– 6

– 4

– 2

0

ÎÎÎÎÎÎÎÎ

TA = 25°C

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.





Figure 12

MAXIMUM PEAK OUTPUT VOLTAGEvs

SUPPLY VOLTAGE

– M

axim

um P

eak

Out

put V

olta

ge –

VV O

M

20181614121086420

| VCC± | – Supply Voltage – V

– 20

– 15

– 10

– 5

0

5

10

15

20

VOM –

VOM +

TA = 25°CRL = 10 kΩ

Figure 13


SUPPLY VOLTAGE

RL = 600 ΩTA = 25°C

VOM +

VOM –

20

15

10

5

0

– 5

– 10

– 15

– 20

| VCC+ | – Supply Voltage – V

0 2 4 6 8 10 12 14 16 18 20

– M

axim

um P

eak

Out

put V

olta

ge –

VV O

M

Figure 14


SUPPLY VOLTAGE

– M

axim

um P

eak

Out

put V

olta

ge –

VV O

M

VOM –

VOM +TA = 25°CRL = 100 Ω

1086420| VCC± | – Supply Voltage – V

– 6

– 4

– 2

0

2

4

6

Figure 15

MAXIMUM PEAK-TO-PEAKOUTPUT VOLTAGE

vsFREQUENCY

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

VV O

(PP

)

TA = 25°CRL = 10 kΩVCC± = ±5 V

10

8

6

10 k 100 k 1 M 10 Mf – Frequency – Hz

4

2

0





Figure 16

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

VV O

(PP

)


vsFREQUENCY

15

RL = 10 kΩVCC± = ±15 V

30

25

20

10 k 100 k 1 M 10 M

f – Frequency – Hz

10

5

0

ÎÎÎÎÎÎÎÎ

TA = 25°C

Figure 17


vsLOAD RESISTANCE

RL – Load Resistance – Ω

10 k1 k100100

2

4

6

8

10ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCC± = ±5 VTA = 25°C

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

VV O

(PP

)

– La

rge-

Sig

nal D

Iffer

entia

l Vol

tage

Am

plifi

catio

n –

dBA

VD

LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT

vsFREQUENCY

Pha

se S

hift

TA = 25°CCL = 100 pFRL = 10 kΩVCC± = ±15 V

Phase Shift

60°

80°

100°

120°

140°

160°

180°

200°10 M1 M100 k10 k1 k1001010.1


–20

0

20

40

60

80

100

120

ÎÎAVD

Figure 18

LARGE-SIGNAL VOLTAGE AMPLIFICATIONvs


RL = 10 kΩ

VCC± = ±5 V

VCC± = ±15 V


1251007550250– 25– 50– 75

350

300

250

200

150

100

50

0

400

– La

rge-

Sig

nal D

Iffer

entia

l Vol

tage

Am

plifi

catio

n –

V/m

VA

VD

Figure 19






Figure 20

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

AI O

S

SHORT-CIRCUIT OUTPUT CURRENTvs

ELAPSED TIME

VID = 100 mV

VO = 0

TA = 25°CVCC± = ±15 V

VID = – 100 mV

6050403020100

t – Elapsed Time – s

– 80

– 60

– 40

– 20

0

20

40

60

80

Figure 21

SHORT-CIRCUIT OUTPUT CURRENTvs


VID = – 100 mV

VID = 100 mV

VO = 0

VCC± = ±15 V80

– 80

– 60

– 40

– 20

0

20

40

60

– 75 – 50 – 25 0 25 50 75 100 125


– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

AI O

S

Figure 22

TA = 25°CVCC± = ±15 V

AVD = 10


1 M100 k10 k1 k10010

– O

utpu

t Im

peda

nce

–

0.001

0.01

0.1

1

10

100

1000

ÁÁÁÁ

z o

ÁÁÁÁ

Ω AVD = 100

ÎÎÎÎÎÎ

AVD = 1

TLE2061OUTPUT IMPEDANCE

vsFREQUENCY

Figure 23

– O

utpu

t Im

peda

nce

–z o

35

30

25

20

15

10

5

TA = 25°CVCC± = ±15 V

AVD = 100


1 M100 k10 k1 k1000

Ω

ÎÎÎÎÎÎAVD = 1

ÎÎÎAVD = 10

10 M

TLE2062 AND TLE2064OUTPUT IMPEDANCE

vsFREQUENCY






Figure 24

COMMON-MODE REJECTION RATIOvs

FREQUENCY

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B

10 100 1 k 10 k 100 k 1 M


10 M0

20

40

60

80

100

TA = 25°C


VCC± = ±5 V

Figure 25

Aµ

2

– S

uppl

y C

urre

nt –

I CC

No LoadVO = 0

TA = 125°C

TA = 25°C

TA = –55°C

2018161412108640


340

240

260

280

300

320

TLE2061SUPPLY CURRENT

vsSUPPLY VOLTAGE

Figure 26|VCC±| – Supply Voltage – V

ICC

– S

uppl

y C

urre

nt –

xA

CC

I

600

575

525

5000 2 4 6 8 10 12

625

675

700

14 16 18 20

550

650Aµ

TA = 25°C

TA = 125°C

TA = –55°C

VO = 0No Load


vsSUPPLY VOLTAGE

Figure 27

– S

uppl

y C

urre

nt –

mA

I CC

1

1.1

1.2

1.3

1.4

No LoadVO = 0

TA = 125°C

TA = 25°C

TA = – 55°C


20181614121086420

1.25

1.35

1.05

1.15


vsSUPPLY VOLTAGE






Figure 28

Aµ

–75

– S

uppl

y C

urre

nt –

I CC

VCC± = ±5 V

VO = 0No Load

240

260

280

300

320

340

1251007550250–25–50


260

280

300


VCC± = ±15 V



Figure 29

– 75 – 50 – 25 0 25 50 75 100 125

VCC± = ±5 V

VCC± = ±15 V

VO = 0No Load

600

575

525

500

625

675

700

550

650


ICC

– S

uppl

y C

urre

nt –

xA

CC

IA

µ



Figure 30

– S

uppl

y C

urre

nt –

mA

I CC

1.4

1.3

1.2

1.1ÎÎÎÎÎÎÎÎÎÎ

VCC± = ±5 V

ÎÎÎÎÎVCC± = ±15 V

VO = 0No Load


11251007550250– 25– 50– 75

1.25

1.35

1.05

1.15



Figure 31

– O

utpu

t Vol

tage

– m

VV

O

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE

t – Time – µs210

– 100

– 50

0

50

100

VCC± = ±5 VRL = 10 kΩCL = 100 pFTA = 25°CSee Figure 1

2.51.50.5






Figure 32

3

– O

utpu

t Vol

tage

– m

VV O

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE100

50

0

– 50

– 1000 1 2 3

t – Time – µs


2.51.50.5

Figure 33

VOLTAGE-FOLLOWERLARGE-SIGNAL

PULSE RESPONSE

0 5 10 15

t – Time – µs

– 2

– 1

0

1

2

3

4

– O

utpu

t Vol

tage

– V

VO

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ


Figure 34

– O

utpu

t Vol

tage

– V

V O

VOLTAGE-FOLLOWERLARGE-SIGNAL

PULSE RESPONSE

t – Time – µs

403020100– 15

– 10

– 5

0

5

10

15VCC± = ±15 VRL = 10 kΩCL = 100 pFTA = 25°CSee Figure 1

Figure 35

NOISE VOLTAGE(REFERRED TO INPUT)

0.1 TO 10 Hz

t – Time – µs

Noi

se V

olta

ge –

V

109876543210– 1

– 0.5

0

0.5

1

TA = 25°CVCC± = ±15 V





Figure 36

– E

quiv

alen

t Inp

ut N

oise

Vol

tage

–V

n

EQUIVALENT INPUT NOISE VOLTAGEvs

FREQUENCY

10 k1 k100101


0

20

40

60

80

100

nV/

Hz

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCC± = ±5 VRS = 20ΩTA = 25°CSee Figure 2

Figure 37

TOTAL HARMONIC DISTORTIONvs

FREQUENCY

VCC± = ±5 V

AVD = 2VO(PP) = 2 VTA = 25°C

Source Signal

0.2

0.1

100 k10 k1 k10010


TH

D –

Tot

al H

arm

onic

Dis

tort

ion

– %

0

0.3

Figure 38

TOTAL HARMONIC DISTORATIONvs

FREQUENCY

VCC± = ±5 V

Source Signal

TA = 25°CVO(PP) = 2 VAVD = 10

0.3

0.1

0.5

0.6

0

TH

D –

Tot

al H

arm

onic

Dis

tort

ion

– %


10 100 1 k 10 k 100 k

0.2

0.4

Figure 39

UNITY-GAIN BANDWIDTHvs

SUPPLY VOLTAGE

See Figure 3TA = 25°CCL = 100 pFRL = 10 kΩ

2018161412108642


2.5

2

1.5

10

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1





Figure 40

UNITY-GAIN BANDWIDTHvs


RL = 10 kΩCL = 100 pFSee Figure 3

VCC± = ±5 V

VCC± = ±15 V

TA – Free-Air Temperature – °C1251007550250– 25– 50– 75

1

1.5

2

2.5

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1

Figure 41

PHASE MARGINvs

SUPPLY VOLTAGE

RL = 10 kΩCL = 100 pFTA = 25°CSee Figure 3

62°

61°

60°

59°

58°

57°

56°

0


2 4 6 8 10 12 14 16 18 2055°

– P

hase

Mar

gin

ÁÁÁÁ

mφ

Figure 42

PHASE MARGINvs

LOAD CAPACITANCE

CL – Load Capacitance – pF

10008006004002000

10°

20°

30°

40°

50°

0°

60°

See Figure 3TA = 25°CRL = 10 kΩVCC± = ±15 V

– P

hase

Mar

gin

ÁÁÁÁ

mφ

Figure 43

PHASE MARGINvs


– P

hase

Mar

gin

ÁÁÁÁ

mφ

1251007550250– 25– 50– 75


54°

56°

58°

60°

62°

64°

66°

VCC± = ±5 V

VCC± = ±15 V

See Figure 3CL = 100 pFRL = 10 kΩ





APPLICATION INFORMATION

input characteristics

The TLE206x, TLE206xA, and TLE206xB are specified with a minimum and a maximum input voltage that ifexceeded at either input could cause the device to malfunction. Because of the extremely high input impedanceand resulting low bias current requirements, the TLE206x, TLE206xA, and TLE206xB are well suited forlow-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceedbias current requirements and cause degradation in system performance. It is good practice to include guardrings around inputs (see Figure 44). These guards should be driven from a low-impedance source at the samevoltage level as the common-mode input.

VI

R2R1

VI

R4

+

–

VO

R3

VI

+

–

VOVO

+

–

R3R4

R2R1

Where

Figure 44. Use of Guard Rings

TLE2061 input offset voltage nulling

The TLE2061 series offers external null pins that can be used to further reduce the input offset voltage. Thecircuit of Figure 45 can be connected as shown if the feature is desired. When external nulling is not needed,the null pins may be left unconnected.

+

–

VCC–

N2

N1 100 kΩ

5 kΩ

IN–

IN+

OUT

Figure 45. Input Offset Voltage Nulling




APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts , the model generation software usedwith Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 46 were generated usingthe TLE206x typical electrical and operating characteristics at 25°C. Using this information, output simulationsof the following key parameters can be generated to a tolerance of 20% (in most cases):

Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit

Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification

NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journalof Solid-State Circuits, SC-9, 353 (1974).

OUT

+

–

+

–

+

–

+

–+

–

+

– +

–

+ –

.subckt TLE2062 1 2 3 4 5c1 11 12 1.457E–12c2 6 7 15.00E–12dc 5 53 dxde 54 5 dxdlp 90 91 dxdln 92 90 dxdp 4 3 dxegnd 99 0 poly (2) (3,0) (4,0) 0 .5 .5fb 7 99 poly (5) vb vc ve vlp

+ vln 0 4.357E6 –4E6 4E6 4E6 –4E6ga 6 0 11 12 188.5E–6gcm 0 6 10 99 3.352E–9iss 3 10 dc 51.00E–6hlim 90 0 vlim 1kj1 11 2 10 jxj2 12 1 10 jxr2 6 9 100.0E3

VCC+

rp

IN–2

IN+1

VCC–

rd1

11

j1 j2

10

rss iss

3

12

rd2

ve

54de

dp

vc

dc

4

C1

53

r2

6

9

egnd

vb

fb

C2

gcm ga vlim

8

5

ro1

ro2

hlim

90

dip

91

din

92

vinvip

99

7

rd1 4 11 5.305E3rd2 4 12 5.305E3r01 8 5 280r02 7 99 280rp 3 4 113.2E3rss 10 99 3.922E6vb 9 0 dc 0vc 3 53 dc 2ve 54 4 dc 2vlim 7 8 dc 0vlp 91 0 dc 50vln 0 92 dc 50

.model dx D(Is=800.0E–18)

.model jx PJF(Is=2.000E–12 Beta = 423E–6+ Vto = –1).ends

Figure 46. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.




MECHANICAL INFORMATIOND (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE14 PIN SHOWN

4040047/D 10/96

0.228 (5,80)0.244 (6,20)

0.069 (1,75) MAX0.010 (0,25)0.004 (0,10)

1

14

0.014 (0,35)0.020 (0,51)

A

0.157 (4,00)0.150 (3,81)

7

8

0.044 (1,12)0.016 (0,40)

Seating Plane

0.010 (0,25)

PINS **

0.008 (0,20) NOM

A MIN

A MAX

DIM

Gage Plane

0.189(4,80)

(5,00)0.197

8

(8,55)

(8,75)

0.337

14

0.344

(9,80)

16

0.394(10,00)

0.386

0.004 (0,10)

M0.010 (0,25)

0.050 (1,27)

0°–8°

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).D. Falls within JEDEC MS-012




MECHANICAL INFORMATIONFK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

4040140/D 10/96

28 TERMINAL SHOWN

B

0.358(9,09)

MAX

(11,63)

0.560(14,22)

0.560

0.458

0.858(21,8)

1.063(27,0)

(14,22)

ANO. OF

MINMAX

0.358

0.660

0.761

0.458

0.342(8,69)

MIN

(11,23)

(16,26)0.640

0.739

0.442

(9,09)

(11,63)

(16,76)

0.962

1.165

(23,83)0.938

(28,99)1.141

(24,43)

(29,59)

(19,32)(18,78)

**

20

28

52

44

68

84

0.020 (0,51)

TERMINALS

0.080 (2,03)0.064 (1,63)

(7,80)0.307

(10,31)0.406

(12,58)0.495

(12,58)0.495

(21,6)0.850

(26,6)1.047

0.045 (1,14)

0.045 (1,14)0.035 (0,89)

0.035 (0,89)

0.010 (0,25)

121314151618 17

11

10

8

9

7

5

432

0.020 (0,51)0.010 (0,25)

6

12826 27

19

21B SQ

A SQ22

23

24

25

20

0.055 (1,40)0.045 (1,14)

0.028 (0,71)0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. This package can be hermetically sealed with a metal lid.D. The terminals are gold plated.E. Falls within JEDEC MS-004




MECHANICAL INFORMATIONJ (R-GDIP-T**) CERAMIC DUAL-IN-LINE PACKAGE14 PIN SHOWN

20

0.290

(7,87)0.310

0.975(24,77)

(23,62)0.930

(7,37)

0.245(6,22)

(7,62)0.300

181614PINS **

0.290

(7,87)0.310

0.785(19,94)

(19,18)0.755

(7,37)

0.310(7,87)

(7,37)0.290

0.755(19,18)

(19,94)0.785

0.245(6,22)

(7,11)0.280

A

0.300(7,62)

(6,22)0.245

A MIN

A MAX

B MAX

B MIN

C MIN

C MAX

DIM

0.310(7,87)

(7,37)0.290

(23,10)0.910

0.300(7,62)

(6,22)0.245

Seating Plane

0.014 (0,36)0.008 (0,20)

4040083/C 08/96

C

8

7

0.020 (0,51) MIN

B

0.070 (1,78)0.100 (2,54)

0.065 (1,65)0.045 (1,14)

14

1

0.015 (0,38)0.023 (0,58)

0.200 (5,08) MAX

0.130 (3,30) MIN

0.100 (2,54)0°–15°

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. This package can be hermetically sealed with a ceramic lid using glass frit.D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.E. Falls within MIL-STD-1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, and GDIP1-T20




MECHANICAL INFORMATIONJG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE

0.310 (7,87)0.290 (7,37)

0.014 (0,36)0.008 (0,20)

Seating Plane

4040107/C 08/96

5

40.065 (1,65)0.045 (1,14)

8

1

0.020 (0,51) MIN

0.400 (10,20)0.355 (9,00)

0.015 (0,38)0.023 (0,58)

0.063 (1,60)0.015 (0,38)

0.200 (5,08) MAX

0.130 (3,30) MIN

0.245 (6,22)0.280 (7,11)

0.100 (2,54)

0°–15°

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. This package can be hermetically sealed with a ceramic lid using glass frit.D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.E. Falls within MIL-STD-1835 GDIP1-T8




MECHANICAL INFORMATIONN (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE

20

0.975(24,77)

0.940(23,88)

18

0.920

0.850

14

0.775

0.745

(19,69)

(18,92)

16

0.775(19,69)

(18,92)0.745

A MIN

DIM

A MAX

PINS **

0.310 (7,87)0.290 (7,37)

(23.37)

(21.59)

Seating Plane

0.010 (0,25) NOM

14/18 PIN ONLY

4040049/C 08/95

9

8

0.070 (1,78) MAX

A

0.035 (0,89) MAX 0.020 (0,51) MIN

16

1

0.015 (0,38)0.021 (0,53)

0.200 (5,08) MAX

0.125 (3,18) MIN

0.240 (6,10)0.260 (6,60)

M0.010 (0,25)

0.100 (2,54)0°–15°

16 PIN SHOWN

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)




MECHANICAL INFORMATIONP (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

4040082/B 03/95

0.310 (7,87)0.290 (7,37)

0.010 (0,25) NOM

0.400 (10,60)0.355 (9,02)

58

41

0.020 (0,51) MIN

0.070 (1,78) MAX

0.240 (6,10)0.260 (6,60)

0.200 (5,08) MAX

0.125 (3,18) MIN

0.015 (0,38)0.021 (0,53)

Seating Plane

M0.010 (0,25)

0.100 (2,54) 0°–15°

NOTES: A. All linear dimensions are in inches (millimeters).B. This drawing is subject to change without notice.C. Falls within JEDEC MS-001




MECHANICAL INFORMATIONPW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

4040064/E 08/96

14 PIN SHOWN

Seating Plane

0,05 MIN1,20 MAX

1

A

7

14

0,19

4,504,30

8

6,206,60

0,30

0,750,50

0,25

Gage Plane

0,15 NOM

0,65 M0,10

0°–8°

0,10

PINS **

A MIN

A MAX

DIM

2,90

3,10

8

4,90

5,10

14

6,60

6,404,90

5,10

16

7,70

20

7,90

24

9,60

9,80

28

NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.D. Falls within JEDEC MO-153

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 1998, Texas Instruments Incorporated

This datasheet has been download from:

www.datasheetcatalog.com

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http://www.datasheetcatalog.com



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