THE INTEL MICROPROCESSORS

8086/8088, 80186/80188, 80286, 80386, 80486, Pentium, Pentium Pro Processor,

Pentium II, Pentium III, Pentium 4, and Core2 with 64-Bit Extensions

Architecture, Programming, and Interfacing

Eighth Edition

BARRY B. BREY

PEARSON

Prentice Hall

Pearson Education International

CONTENTS

CHAPTER 1 INTRODUCTION TO THE MICROPROCESSOR AND COMPUTER Introduction/Chapter Objectives 1

1-1 A Historical Background 2 The Mechanical Age 2; The Electrical Age 2; Programming Advancements 4; The Microprocessor Age 5; The Modern Microprocessor 7

1-2 The Microprocessor-Based Personal Computer System 17 The Memory and I/O System 17; The Microprocessor 25

1-3 Number Systems 29 Digits 29; Positional Notation 30; Conversion to Decimal 31; Conversion from Decimal 32; Binary-Coded Hexadecimal 33

1^1 Computer Data Formats 35 ASCII and Unicode Data 35; BCD (Binary-Coded Decimal) Data 37; Byte-Sized Data 38; Word-Sized Data 40; Doubleword-Sized Data 41; Real Numbers 43

1-5 Summary 45 1-6 Questions and Problems 46

CHAPTER 2 THE MICROPROCESSOR AND ITS ARCHITECTURE Introduction/Chapter Objectives 51

2-1

51

2-2

2-3

2-4

2-5 2-6 2-7

Internal Microprocessor Architecture 51 The Programming Model 52; Multipurpose Registers 54 Real Mode Memory Addressing 58 Segments and Offsets 58; Default Segment and Offset Registers 60; Segment and Offset Addressing Scheme Allows Relocation 60 Introduction to Protected Mode Memory Addressing 63 Selectors and Descriptors 63; Program-Invisible Registers 67 Memory Paging 68 Paging Registers 69; The Page Directory and Page Table 70 Flat Mode Memory 72 Summary 73 Questions and Problems 74

CHAPTER 3 ADDRESSING MODES Introduction/Chapter Objectives 77

3-1 Data-Addressing Modes 78 Register Addressing 81; Immediate Addressing 83; Direct Data Addressing 86; Register Indirect Addressing 88; Base-Pius-Index Addressing 91;

77

XI

XII COMTENTS

Register Relative Addressing 93; Base Relative-Plus-Index Addressing 96; Scaled-Index Addressing 98; RIP Relative Addressing 99; Data Structures 99

3-2 Program Memory-Addressing Modes 100 Direct Program Memory Addressing 100; Relative Program Memory Addressing 101; Indirect Program Memory Addressing 101

3-3 Stack Memory-Addressing Modes 102 3-4 Summary 105 3-5 Questions and Problems 107

CHAPTER 4 DATA MOVEMENT INSTRUCTIONS 111 Introduction/Chapter Objectives 111

4-1 MOV Revisited 112 Machine Language 112; The 64-Bit Mode for the Pentium 4 and Core2 120

4-2 PUSH/POP 122 PUSH 122; POP 124; Initializing the Stack 124

4-3 Load-Effective Address 127 LEA 127; LDS, LES, LFS, LGS, and LSS 128

4-4 String Data Transfers 130 The Direction Flag 130; DI and SI 130; LODS 130; STOS 131; MOVS 133; INS 135; OUTS 136

4-5 Miscellaneous Data Transfer Instructions 137 XCHG 137; LANF and SAHF 137; XLAT 138; IN and OUT 138; MOVSX and MOVZX 140; BSWAP 140; CMOV 141

4-6 Segment Override Prefix 142 4-7 Assembler Detail 142

Directives 143; Memory Organization 147; A Sample Program 150 4-8 Summary 151 4-9 Questions and Problems 154

CHAPTER 5 ARITHMETIC AND LOGIC INSTRUCTIONS 156 Introduction/Chapter Objectives 156

5-1 Addition, Subtraction, and Comparison 156 Addition 157; Subtraction 162; Comparison 165

5-2 Multiplication and Division 166 Multiplication 166; Division 169

5-3 BCD and ASCII Arithmetic 172 BCD Arithmetic 172; ASCII Arithmetic 173

5-4 Basic Logic Instructions 175 AND 175; OR 176; Test and Bit Test Instructions 180; NOT and NEG 181

5-5 Shift and Rotate 182 Shift 182; Rotate 184; Bit Scan Instructions 185

5-6 String Comparisons 186 SCAS 186;CMPS 187

5-7 Summary 187 5-8 Questions and Problems 189

CHAPTER 6 PROGRAM CONTROL INSTRUCTIONS 192 Introduction/Chapter Objectives 192

6-1 The Jump Group 192 Unconditional Jump (JMP) 193; Conditional Jumps and Conditional Sets 198; LOOP 201

6-2 Controlling the Flow of the Program 202 WHILE Loops 205; REPEAT-UNTIL Loops 206

6-3 Procedures 208 CALL 209; RET 211

CONTENTS XIII

CHAPTER 7

CHAPTER 8

CHAPTER 9

6-4 Introduction to Interrupts 213 Interrupt Vectors 213; Interrupt Instructions 214; Interrupt Control 215; Interrupts in the Personal Computer 216; 64-Bit Mode Interrupts 216

6-5 Machine Control and Miscellaneous Instructions 217 Controlling the Carry Flag Bit 217; WAIT 217; HLT 217; NOP 217; LOCK Prefix 218; ESC 218; BOUND 218; ENTER and LEAVE 218

6-6 Summary 219 6-7 Questions and Problems 221

USING ASSEMBLY LANGUAGE WITH C/C++ Introduction/Chapter Objectives 223

7-1 Using Assembly Language with C++ for 16-Bit DOS Applications 224 Basic Rules and Simple Programs 224; What Cannot Be Used from MASM Inside an _asm Block 226; Using Character Strings 226; Using Data Structures 227; An Example of a Mixed-Language Program 229 Using Assembly Language with Visual C/C++ for 32-Bit Applications 231 An Example that Uses Console I/O to Access the Keyboard and Display 231; Directly Addressing I/O Ports 233; Developing a Visual C++ Application for Windows 234 Mixed Assembly and C++ Objects 242 Linking Assembly Language with Visual C++ 242; Adding New Assembly Language Instructions to C/C++ Programs 247 Summary 247 Questions and Problems 248

223

7-2

7-3

7-4 7-5

PROGRAMMING THE MICROPROCESSOR Introduction/Chapter Objectives 250

250

-l

8-3

8-4

Modular Programming 251 The Assembler and Linker 251; PUBLIC and EXTRN 253; Libraries 254; Macros 257 Using the Keyboard and Video Display 259 Reading the Keyboard 259; Using the Video Display 265; Using a Timer in a Program 267; The Mouse 269 Data Conversions 271 Converting from Binary to ASCII 272; Converting from ASCII to Binary 274; Displaying and Reading Hexadecimal Data 274; Using Lookup Tables for Data Conversions 276; An Example Program Using a Lookup Table 278 Disk Files 280 Disk Organization 280; File Names 281; Sequential Access Files 282; Random Access Files 291 Example Programs 294 Time/Date Display Program 294; Numeric Sort Program 295; Data Encryption 297 Summary 299 Questions and Problems 300

8086/8088 HARDWARE SPECIFICATIONS Introduction/Chapter Objectives 302

9-1 Pin-Outs and the Pin Functions 302 The Pin-Out 303; Power Supply Requirements 303; DC Characteristics 303; Pin Connections 304

9-2 Clock Generator (8284A) 307 The 8284A Clock Generator 307; Operation of the 8284A 309

9-3 Bus Buffering and Latching 310 Demultiplexing the Buses 310; The Buffered System 312

9^1 Bus Timing 315 Basic Bus Operation 315; Timing in General 315; Read Timing 316; Write Timing 319

302

Xiv CONTENTS

9-5 Ready and the Wait State 320 The READY Input 320; RDY and the 8284A 320

9-6 Minimum Mode versus Maximum Mode 323 Minimum Mode Operation 323; Maximum Mode Operation 323; The 8288 Bus Controller 324; Pin Functions 325

9-7 Summary 325 9-8 Questions and Problems 326

CHAPTER 10 MEMORY INTERFACE 328 Introduction/Chapter Objectives 328

10-1 Memory Devices 328 Memory Pin Connections 329; ROM Memory 330; Static RAM (SRAM) Devices 332; Dynamic RAM (DRAM) Memory 333

10-2 Address Decoding 340 Why Decode Memory? 340; Simple NAND Gate Decoder 341; The 3-to-8 Line Decoder (74LS138) 342; The Dual 2-to-4 Line Decoder (74LS139) 344; PLD Programmable Decoders 344

10-3 8088 and 80188 (8-Bit) Memory Interface 349 Basic 8088/80188 Memory Interface 349; Interfacing Flash Memory 351; Error Correction 353

10—4 8086, 80186, 80286, and 80386SX (16-Bit) Memory Interface 356 16-Bit Bus Control 356

10-5 80386DX and 80486 (32-Bit) Memory Interface 363 Memory Banks 363; 32-Bit Memory Interface 364

10-6 Pentium through Core2 (64-Bit) Memory Interface 366 64-Bit Memory Interface 366

10-7 Dynamic RAM 370 DRAM Revisited 370; EDO Memory 371; SDRAM 371; DDR 373; DRAM Controllers 373

10-8 Summary 373 10-9 Questions and Problems 375

CHAPTER 11 BASIC I/O INTERFACE 377 Introduction/Chapter Objectives 377

11-1 Introduction to I/O Interface 377 The I/O Instructions 378; Isolated and Memory-Mapped I/O 379; Personal Computer I/O Map 380; Basic Input and Output Interfaces 380; Handshaking 382; Notes about Interfacing Circuitry 383

11-2 I/O Port Address Decoding 387 Decoding 8-Bit I/O Port Addresses 387; Decoding 16-Bit I/O Port Addresses 388; 8- and 16-Bit-Wide I/O Ports 389; 32-Bit-Wide I/O Ports 392

11-3 The Programmable Peripheral Interface 395 Basic Description of the 82C55 395; Programming the 82C55 397; Mode 0 Operation 398; An LCD Display, Interfaced to the 82C55 403; Mode 1 Strobed Input 414; Signal Definitions for Mode 1 Strobed Input 414; Mode 1 Strobed Output 416; Signal Definitions for Mode 1 Strobed Output 416; Mode 2 Bidirectional Operation 418; Signal Definitions for Bidirectional Mode 2 418; 82C55 Mode Summary 420; The Serial EEPROM Interface 421

11-4 8254 Programmable Interval Timer 423 8254 Functional Description 423; Pin Definitions 424; Programming the 8254 424; DC Motor Speed and Direction Control 429

11-5 16550 Programmable Communications Interface 433 Asynchronous Serial Data 433; 16550 Functional Description 433; 16550 Pin Functions 434; Programming the 16550 435

11-6 Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converters 440 The DAC0830 Digital-to-Analog Converter 440; The ADC080X Analog-to-Digital Converter 442; Using the ADC0804 and the DAC0830 445

CONTENTS XV

CHAPTER 12

CHAPTER 13

CHAPTER 14

11-7 Summary 446 11-8 Questions and Problems 448

INTERRUPTS 451 Introduction/Chapter Objectives 451

12-1 Basic Interrupt Processing 451 The Purpose of Interrupts 451; Interrupts 452; Interrupt Instructions: BOUND, INTO, INT, INT 3, and IRET 455; The Operation of a Real Mode Interrupt 455; Operation of a Protected Mode Interrupt 456; Interrupt Flag Bits 457; Storing an Interrupt Vector in the Vector Table 458

12-2 Hardware Interrupts 459 INTR and INTA 461; The 82C55 Keyboard Interrupt 462

12-3 Expanding the Interrupt Structure 465 Using the 74ALS244 to Expand Interrupts 465; Daisy-Chained Interrupt 466

12-4 8259A Programmable Interrupt Controller 468 General Description of the 8259A 468; Connecting a Single 8259A 469; Cascading Multiple 8259As 469; Programming the 8259A 469; 8259A Programming Example 475

12-5 Interrupt Examples 481 Real-Time Clock 482; Interrupt-Processed Keyboard 484

12-6 Summary 487 12-7 Questions and Problems 488

DIRECT MEMORY ACCESS AND DMA-CONTROLLED I/O 490 Introduction/Chapter Objectives 490

13-1 Basic DMA Operation 490 Basic DMA Definitions 491

13-2 The 8237 DMA Controller 492 Pin Definitions 492; Internal Registers 494; Software Commands 497; Programming the Address and Count Registers 498; The 8237 Connected to the 80X86 Microprocessor 498; Memory-to-Memory Transfer with the 8237 499; DMA-Processed Printer Interface 504

13-3 Shared-Bus Operation 506 Types of Buses Defined 507; The Bus Arbiter 509; Pin Definitions 509

13^4 Disk Memory Systems 513 Floppy Disk Memory 513; Pen Drives 517; Hard Disk Memory 518; Optical Disk Memory 521

13-5 Video Displays 522 Video Signals 522; The TTL RGB Monitor 523; The Analog RGB Monitor 524

13-6 Summary 529 13-7 Questions and Problems 529

THE ARITHMETIC COPROCESSOR, MMX, AND SIMD TECHNOLOGIES 531 Introduction/Chapter Objectives 531

14-1 Data Formats for the Arithmetic Coprocessor 532 Signed Integers 532; Binary-Coded Decimal (BCD) 533; Floating-Point 533

14-2 The 80X87 Architecture 536 Internal Structure of the 80X87 536

14-3 Instruction Set 541 Data Transfer Instructions 541; Arithmetic Instructions 543; Comparison Instructions 544; Transcendental Operations 545; Constant Operations 546; Coprocessor Control Instructions 546; Coprocessor Instructions 548

14-4 Programming with the Arithmetic Coprocessor 565 Calculating the Area of a Circle 565; Finding the Resonant Frequency 566; Finding the Roots Using the Quadratic Equation 566; Using a Memory Array to Store Results 567; Converting a Single-Precision Floating-Point Number to a String 568

XVi CONTENTS

14-5 Introduction to MMX Technology 570 Data Types 570; Instruction Set 571

14-6 Introduction to SSE Technology 581 Floating-Point Data 582; The Instruction Set 583; The Control/Status Register 584; Programming Examples 584; Optimization 587

14-7 Summary 587 14-8 Questions and Problems 589

CHAPTER 15 BUS INTERFACE 592 Introduction/Chapter Objectives 592

15-1 The ISA Bus 592 Evolution of the ISA Bus 593; The 8-Bit ISA Bus Output Interface 593; The 8-Bit ISA Bus Input Interface 598; The 16-Bit ISA Bus 601

15-2 The Peripheral Component Interconnect (PCI) Bus 602 The PCI Bus Pin-Out 603; The PCI Address/Data Connections 603; Configuration Space 605; BIOS for PCI 607; PCI Interface 610; PCI Express Bus 610

15-3 The Parallel Printer Interface (LPT) 612 Port Details 612; Using the Parallel Port Without ECP Support 614

15-4 The Serial COM Ports 614 Communication Control 615

15-5 The Universal Serial Bus (USB) 617 The Connector 617; USB Data 617; USB Commands 618; The USB Bus Node 620; Software for the USBN9604/3 621

15-6 Accelerated Graphics Port (AGP) 623 15-7 Summary 624 15-8 Questions and Problems 625

CHAPTER 16 THE 80186,80188, AND 80286 MICROPROCESSORS 627 Introduction/Chapter Objectives 627

16-1 80186/80188 Architecture 627 Versions of the 80186/80188 628; 80186 Basic Block Diagram 628; 80186/80188 Basic Features 629; Pin-Out 631; DC Operating Characteristics 634; 80186/80188 Timing 634

16-2 Programming the 80186/80188 Enhancements 637 Peripheral Control Block 637; Interrupts in the 80186/80188 638; Interrupt Controller 638; Timers 643; DMA Controller 649; Chip Selection Unit 651

16-3 80C188EB Example Interface 655 16-4 Real-Time Operating Systems (RTOS) 662

What Is a Real-Time Operating System (RTOS)? 662; An Example System 663; A Threaded System 666

16-5 Introduction to the 80286 670 Hardware Features 670; Additional Instructions 672; The Virtual Memory Machine 674

16-6 Summary 674 16-7 Questions and Problems 675

CHAPTER 17 THE 80386 AND 80486 MICROPROCESSORS 677 Introduction/Chapter Objectives 677

17-1 Introduction to the 80386 Microprocessor 678 The Memory System 681; The Input/Output System 687; Memory and I/O Control Signals 688; Timing 689; Wait States 691

17-2 Special 80386 Registers 692 Control Registers 692; Debug and Test Registers 693

17-3 80386 Memory Management 695 Descriptors and Selectors 695; Descriptor Tables 698; The Task State Segment (TSS) 700

17^1 Moving to Protected Mode 702

CONTENTS XVII

17-5 Virtual 8086 Mode 712 17-6 The Memory Paging Mechanism 713

The Page Directory 714 The Page Table 715 17-7 Introduction to the 80486 Microprocessor 718

Pin-Out of the 80486DX and 80486SX Microprocessors 718; Pin Definitions 718; Basic 80486 Architecture 722; 80486 Memory System 723

17-8 Summary 726 17-9 Questions and Problems 727

CHAPTER 18 THE PENTIUM AND PENTIUM PRO MICROPROCESSORS 729 Introduction/Chapter Objectives 729

18-1 Introduction to the Pentium Microprocessor 730 The Memory System 734; Input/Output System 735; System Timing 735; Branch Prediction Logic 738; Cache Structure 738; Superscalar Architecture 738

18-2 Special Pentium Registers 738 Control Registers 738; EFLAG Register 739; Built-in Self-Test (BIST) 740

18-3 Pentium Memory Management 740 Paging Unit 740; Memory-Management Mode 740

18—4 New Pentium Instructions 742 18-5 Introduction to the Pentium Pro Microprocessor 747

Internal Structure of the Pentium Pro 748; Pin Connections 750; The Memory System 754; Input/Output System 755; System Timing 755

18-6 Special Pentium Pro Features 756 Control Register 4 756

18-7 Summary 757 18-8 Questions and Problems 758

CHAPTER 19 THE PENTIUM II, PENTIUM III, PENTIUM 4, AND C0RE2 MICROPROCESSORS 759 Introduction/Chapter Objectives 759

19-1 Introduction to the Pentium II Microprocessor 760 The Memory System 765; Input/Output System 767; System Timing 768

19-2 Pentium II Software Changes 768 CPUID Instruction 768; SYSENTER and SYSEXIT Instructions 769; FXSAVE and FXRSTOR Instructions 770

19-3 The Pentium III 770 Chip Sets 770; Bus 771; Pin-Out 771

19-4 The Pentium 4 and Core2 771 Memory Interface 772; Register Set 773; Hyper-Threading Technology 775; Multiple Core Technology 776; CPUID 776; Model-Specific Registers 779; Performance-Monitoring Registers 780; 64-Bit Extension Technology 780

19-5 Summary 782 19-6 Questions and Problems 783

APPENDIX A: THE ASSEMBLER, VISUAL C++, AND DOS 785 The Assembler 785 Assembler Memory Models 786 Selected DOS Function Calls 787 Using Visual C++ 790

Create a Dialog Application 791

APPENDIX B: INSTRUCTION SET SUMMARY 794 Instruction Set Summary 798 SIMD Instruction Set Summary 881

CONTENTS

Data Movement Instructions 883 Arithmetic Instructions 885 Logic Instructions 891 Comparison Instructions 892 Data Conversion Instructions 894

APPENDIX C: FLAG-BIT CHANGES 895

APPENDIX D: ANSWERS TO SELECTED EVEN-NUMBERED QUESTIONS AND PROBLEMS 897

INDEX 915