the adpms ready for flight - space seminar main page€¦ · 20-23 november 2007 slide1 the adpms...
TRANSCRIPT
20-23 November 2007
Slide1
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
The
AD
PM
S rea
dy
for F
light
An A
dva
nce
d D
ata
& P
ower
Managem
ent Sys
tem
for sm
all sate
llites
& m
issi
ons
Authors:
Koen Puim
ege –Verhaert Space –koen.puim
ege@
verhaert.com
Hogenakkerhoekstraat 9, 9150 Kruibeke, Belgium
www.verhaert.com
Sven Landstroem
-ESA/ESTEC –sven.landstroem
@esa.int
David Hardy -ESA/ESTEC –
Keplerlaan 1, 2201 AZ Noordwijk, the Netherlands
www.esa.int
20-23 November 2007
Slide2
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Conte
nts
Conte
nts
•Introduction
•Satellite requirements
•System design
•Architectural
•New technologies
•The result
•Key features
20-23 November 2007
Slide3
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Intr
oduction
Intr
oduction
In a contract for the European Space Agency, Verhaert Space
developed a state-off-the-art control unit for small but high
demanding satellites.
Built on the experience gained with the PROBA-I satellite that has
been in daily use since its launch in 2001. This next generation
avionics has been developed and will have its first in-orbit
demonstration in 2008 as the satellite control unit for PROBA-II.
The n
eed for
a p
erf
orm
ant, e
asily a
dapte
d a
nd c
onfigure
d s
ate
llite c
ontr
ol unit h
as b
een identified
as c
rucia
l to
succeed in the s
yste
m d
esig
n o
f sm
all s
ate
llites w
ith h
igh a
uto
nom
y d
em
ands.
20-23 November 2007
Slide4
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Intr
oduction (2)
Intr
oduction (2)
The goal of this contract was to improve even further the PROBA-I satellite-
bus (currently in orbit) in terms of:
·Pow
er consum
ption
·M
ass a
nd V
olu
me
·D
esig
n u
niform
ity (com
ple
xity r
eduction)
·‘O
pen’arc
hitectu
re (<->
pro
prieta
ry b
lack b
ox d
esig
n)
·C
om
puting a
nd d
ata
-handling p
erf
orm
ance
·M
odula
rity
·Scala
bility
·Testa
bility
And to make this satellite control unit not only suitable for the PROBA-II, but
for any other small satellite.
A detailed look at the above top-level requirements identifies however some
contradictions:
·Low power consumption versus high computing performance
·Low mass and volume versus modularity
·Highly integrated system versus testability
This presentation describes how the ADPMS design has provided ananswer
to all above criteria without penalising one of them.
20-23 November 2007
Slide5
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Sate
llite r
equir
em
ents
Sate
llite r
equir
em
ents F
or Eart
h O
bserv
ation
instr
um
ents
1 im
age
=
1 c
om
mand
( target latitude and longitude)
Onboard
Auto
nom
y
Featu
res
-Autonomy in planning / scheduling
-Autonomy in attitude control
system
-Autonomous target prediction and
trajectory generation
-High level payload management
-Powerful automated on-board
functions
Gro
und S
egm
ent
Auto
mation
-Internet access for payload activity
requests
-Internet access for payload data
distribution
-“Light-out”ground segment
20-23 November 2007
Slide6
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Poin
ting M
odes
Inert
ial Poin
ting
Possible Utilisation:
-Astronomy
-Solar physics
Eart
h P
oin
ting
Possible Utilisation:
-Earth Observation
(pushbroom)
-Telecommunications
-Space Environment
Fix
ed E
art
h T
arg
et
Poin
ting
Possible Utilisation:
-Earth Observation
(snapshot high
resolution imaging)
-Elevation Modeling
-Disaster Monitoring
Com
ple
x
Manoeuvring
Possible Utilisation:
-Earth Observation
-Multiple target
imaging
-Image Paving
Sate
llite r
equir
em
ents
(2)
Sate
llite r
equir
em
ents
(2)
20-23 November 2007
Slide7
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
HR
M
MT
MT
MT
RW
RW
RW
RW
MM
MM
CH
U1
CH
U2
AS
C
AS
C
ADPMS
2 NSO’s
Rx
Rx
Tx
Tx
Ant
Ant
MC
PM
SW
AP
LYR
A
SLP
DSS
BC
ST
PS
Cogex
IIU
Power
Data
High speed data link
AO
CS U
NIT
SP
ow
er
Data
handling
Com
ms
Paylo
ads
Technolo
gy
Dem
onstr
ato
rs
SA
M
Battery
Sola
r
Arr
ays
SS
SS
SG
VM
AntRFDU
Alc
ate
l
GPS
ESP
TP
MU
DSLP
DPU
SLP
XC
AM
HR
M
HR
M
HR
M
AO
CS IF
AO
CS IF
GPS
GP
S
Fluidic interface
FSD
Ant
Sate
llite r
equir
em
ents
(3)
Sate
llite r
equir
em
ents
(3)
20-23 November 2007
Slide8
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Sate
llite O
bje
ctive: m
ore
resourc
es a
vailable
for
the P
aylo
ads
Sate
llite O
bje
ctive: m
ore
resourc
es a
vailable
for
the P
aylo
ads
PR
OB
A-I
Mass
~30%for the payloads
~70 % for the satellite bus
Pow
er
~30%for the payloads
~70 % for the satellite bus
PR
OB
A-II
Mass
~50%for the payloads
~50 % for the satellite bus
Pow
er
~50%for the payloads
~50 % for the satellite bus
20%
reduction
for
the b
us
ele
ments
Sate
llite r
equir
em
ents
(4)
Sate
llite r
equir
em
ents
(4)
20-23 November 2007
Slide9
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S S
yste
m d
esig
nA
DPM
S S
yste
m d
esig
n
In o
rder
to f
ulfil t
he t
op-level
requirem
ents
lis
ted b
efo
re s
om
e d
rastic c
hanges w
ere
needed.
There
fore
the f
ollow
ing f
ive e
ssential
sate
llite b
us e
lem
ents
have b
een i
ncorp
ora
ted i
nto
one
syste
m:
•S/C Power Conditioning System (PCS)
•S/C Power Distribution Unit (PDU)
•S/C Data Handling System (DHS)
•S/C Mass Memory Unit (MMU)
•S/C Payload Processing Unit (PPU)
A very effective power, mass and volume reduction could be achieved by the integration of these
elements. Resulting at Satellite level in a:
•centr
alisation o
f all d
ata
handling, sto
rage a
nd p
rocessin
g
•centr
alisation o
f all a
nalo
g-and tem
pera
ture
sensor acquis
itio
n
•elim
ination o
f th
e h
arn
ess that in
terc
onnecte
d the form
erl
y s
epara
te u
nits
•re
duction o
f th
e m
echanic
s b
ecause o
f th
e inte
gra
tion into
one p
hysic
al enclo
sure
.AD
PM
SA
DPM
SA
DPM
S
PC
SPD
U
DH
S
MM
UPPU
20-23 November 2007
Slide10
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral
AD
PM
S A
rchitectu
ral
The computer is partitionedinto sub-modules in the form of 3U
Compact-PCI boards.
The main modules consist of:
•a p
rocessor board
with m
em
ory
•a T
M/T
C b
oard
•a s
pacecra
ft inte
rface
board
•one o
r m
ore
data
-acquis
itio
n b
oard
s
•a c
am
era
board
with m
ass m
em
ory
Arc
hitectu
ral overv
iew
LEO
NP
rocessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Cam
era
&m
em
ory
Module
Data
-Acquis
itio
nM
odule
1
LE
ON
Pro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Cam
era
&m
em
ory
Module
LEO
NPro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Data
-Acquis
itio
nM
odule
1D
ata
-Acquis
itio
nM
odule
1
Cam
era
&m
em
ory
Module
LE
ON
Pro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Cam
era
&m
em
ory
Module
Em
erg
ency
Reconfigura
tion
Module
LEO
NPro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Data
-Acquis
itio
nM
odule
1D
ata
-Acquis
itio
nM
odule
1
Cam
era
&m
em
ory
Module
LEO
NPro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Cam
era
&m
em
ory
Module
Em
erg
ency
Reconfigura
tion
Module
LEO
NPro
cessor
Module
CC
SD
STM
/TC
Module
Spacecra
ftIn
terf
ace
Module
Data
-Acquis
itio
nM
odule
2
Com
pact P
CI
Pow
er Supply
Module
Pow
er C
onditio
nin
gM
odule
Data
-Acquis
itio
nM
odule
1D
ata
-Acquis
itio
nM
odule
1
Pow
er
Dis
trib
ution
Module
1
Pow
er
Dis
trib
ution
Module
2
Pow
er
Dis
trib
ution
Module
3
Pow
er
Dis
trib
ution
Module
5
Pow
er
Dis
trib
ution
Module
4
Cam
era
&m
em
ory
Module
Pow
er
Dis
trib
ution
Module
6
•a r
econfigura
tion b
oard
.
The integrated power system consists of:
•a p
ow
er conditio
nin
g m
odule
•severa
l pow
er dis
trib
ution m
odule
s
•a C
om
pact-PC
I pow
er supply
module
.
It’s
a p
lug a
nd p
lay s
yste
m, easily a
llow
ing
inte
gra
tion o
f oth
er
thir
th-p
art
y c
ard
s
20-23 November 2007
Slide11
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (3
)A
DPM
S A
rchitectu
ral (3
)
In m
any e
xis
ting s
yste
ms, com
munic
ation b
etw
een m
odule
s w
ith u
nequal data
rate
s o
r la
rge d
ata
la
tencie
s c
reate
blo
ckin
g o
f th
e s
hare
d b
uses, such a
s the P
CI bus o
r on-c
hip
AM
BA
buses.
Periphera
l D
MA
engin
es
PC
I B
US
DA
TA
AC
QU
ISIT
ION
MO
DU
LE
TE
LEM
ETR
Y &
TELEC
OM
MA
ND
MO
DU
LE
SPA
CEC
RA
FT
INTER
FA
CE
MO
DU
LE
MA
IN
PR
OC
ESSO
R
MO
DU
LE
CA
MER
A &
MA
SS M
EM
OR
Y
MO
DU
LE
PC
I
AR
BIT
ER
Fast processor and high speed bus
��slow peripherals
�Data bottlenecks
�waitstates
�retry cycles
�processor DMA
�interrupts
�Peripheral DMA engines
�know when data can be
transferred
�no local FIFO buffers
�lower power consumption
�no processor time
�full bandwidth usage
�growth potential
20-23 November 2007
Slide12
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (4
)A
DPM
S A
rchitectu
ral (4
)
The
AD
PM
S
arc
hitectu
re
defines
a
sta
ndard
tw
o-lane
syste
m
with
a
sw
itch-o
ver
redundancy s
chem
e. The
nom
inal
lane
is
fully
pow
ere
d
and
contr
ols
th
e
pla
tform
.while
the
redundant la
ne is p
ow
ere
d o
ff.
Redundancy a
ppro
ach
Nom
inal P
CI B
US
DA
TA
AC
QU
ISIT
ION
MO
DU
LE
TE
LE
ME
TR
Y &
TE
LE
CO
MM
AN
D
MO
DU
LE
SP
AC
EC
RA
FT
INTE
RFA
CE
MO
DU
LE
MA
IN
PR
OC
ES
SO
R
MO
DU
LE
CA
ME
RA
&
MA
SS
ME
MO
RY
MO
DU
LE
PC
I
AR
BIT
ER
Redundant P
CI B
US
DA
TA
AC
QU
ISIT
ION
MO
DU
LE
TE
LE
ME
TR
Y &
TE
LE
CO
MM
AN
D
MO
DU
LE
SP
AC
EC
RA
FT
INTE
RFA
CE
MO
DU
LE
MA
IN
PR
OC
ES
SO
R
MO
DU
LE
CA
ME
RA
&
MA
SS
ME
MO
RY
MO
DU
LE
PC
I
AR
BIT
ER
I/O
BU
S
�separate power-switch relays for the TM/TC module
�back-biasing protection required
�difficult with (unbuffered) PCI bus
�future integration of the complete lane into one
System-On-A-Chipimpossible
�.TM/TC module has an increased failure rate
�highpower consumption
Nom
inal PC
I B
US
DA
TA
AC
QU
ISIT
ION
MO
DU
LE
TE
LE
ME
TR
Y &
TE
LE
CO
MM
AN
D
MO
DU
LE
SP
AC
EC
RA
FT
INTE
RFA
CE
MO
DU
LE
MA
IN
PR
OC
ES
SO
R
MO
DU
LE
CA
ME
RA
&
MA
SS
ME
MO
RY
MO
DU
LE
PC
I
AR
BIT
ER
Redundant PC
I B
US
DA
TA
AC
QU
ISIT
ION
MO
DU
LE
TE
LE
ME
TR
Y &
TE
LE
CO
MM
AN
D
MO
DU
LE
SP
AC
EC
RA
FT
INTE
RFA
CE
MO
DU
LE
MA
IN
PR
OC
ES
SO
R
MO
DU
LE
CA
ME
RA
&
MA
SS
ME
MO
RY
MO
DU
LE
PC
I
AR
BIT
ER
I/O
BU
S
EM
ER
GE
NC
Y
TE
LE
CO
MM
AN
D
MO
DU
LE
20-23 November 2007
Slide13
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (5
)A
DPM
S A
rchitectu
ral (5
)
Sin
ce th
ere
is
now
th
is additio
nal
‘hot’
em
erg
ency
TC
decoder
as part
of
the re
configura
tion
module
and
sin
ce
the
nom
inal
and
redundant
lanes
als
o
have
an
em
erg
ency
TC
-decoder
imple
mente
d
in
hard
ware
. This
m
eans
that
the
nom
inal
“fu
ll
blo
wn”
TC
decoder
can
be
imple
mente
d in s
oftw
are
.
Softw
are
packet te
lecom
mand d
ecoder
RE
DU
ND
AN
TP
RIM
AR
Y
REM
HPTD
(hard
PTD
)
VC
4
CH 0
CH 2
CH 1
REM
CP
DU
[56:0
]
TTL
DR
IVER
S
OR
CPDUWIRE
TTM
EPTD
(em
erg
. PTD
)
VC
3
CH 0
CH 2
CH 1
TTM
SPTD
(soft
PTD
)
VC
1&
2
CH 0
CH 2
CH 1
DM
A
Engin
e
TTL /
RS
-422
DR
IVER
S
TTL /
RS
-422
DR
IVER
S
TTL /
RS-4
22
DR
IVE
RS
DA
M0
PD
U
[68:5
7]
DA
M1
PD
U
[80:6
9]
MPM
PD
U
[56:0
]
MPM
CPD
U
[56:0
]
SO
FTW
AR
E
OR
TTL
DR
IVER
S
TTL
DR
IVER
S
TTL
DR
IVE
RS
CPDUWIRE
TTM
EP
TD
(em
erg
. PTD
)
VC
3
CH 2
CH 0
CH 1
TTM
SPTD
(soft P
TD
)
VC
1&
2
CH 2
CH 0
CH 1
DM
A
Engin
e
TTL /
RS-4
22
DR
IVE
RS
TTL /
RS-4
22
DR
IVE
RS
TTL /
RS
-422
DR
IVER
S
DA
M0
PD
U
[68:5
7]
DA
M1
PD
U
[80:6
9]
MPM
PD
U
[56:0
]
MP
M
CPD
U
[56:0
]
SO
FTW
AR
E
OR
TTL
DR
IVE
RS
TTL
DR
IVE
RS
TTL
DR
IVER
S
mary receiver) .
undant receiver) .
SE) .
er)
eiver)
TTL /
RS-4
22
DR
IVE
RS
TTL /
RS-4
22
DR
IVE
RS
TTL /
RS
-422
DR
IVE
RS
The benefits:
�the protocol can be changed to future versions
without hardware redesign
�Authentication can be added in software
�Additional VC-ID’s can be easily added
�Additional M
AP-ID’s can be easily added
�the (hardware) failure rate decreases since less logic
is needed
�nolarge FPGAneeded anymore
�noPROM needed anymore
�noradiation-hard static RAM
needed anymore
�the power consumption is reduced
�virtually no extra power required since
the
processor perform
ance needed is less than 10 KIPS
20-23 November 2007
Slide14
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (6
)A
DPM
S A
rchitectu
ral (6
)
A tra
de-o
ff w
as m
ade b
etw
een L
EO
N2 a
nd L
EO
N3 in b
oth
FPG
A a
nd A
SIC
im
ple
menta
tion.
Where
the L
EO
N3 (
imple
mente
d i
n a
n A
CTEL R
TA
X2000 F
PG
A)
giv
es s
lightly b
etter
perf
orm
ance
than th
e fo
rmer
ER
C-3
2.
For
this
pro
ject
there
w
as a need to
dem
onstr
ate
hig
h com
puting
perf
orm
ance.
There
fore
the L
EO
N2-F
T (
AT697 f
rom
ATM
EL)
has b
een s
ele
cte
d.
It
has a
superior
perf
orm
ance w
ith r
espect to
its
successor
the E
RC
-32
not
only
because it
can r
un a
t a h
igher
clo
ck
frequency b
ut especia
lly b
ecause o
f th
e follow
ing k
ey-f
eatu
res:
�The
on-c
hip
PC
I hostbridgemakes theconnectionto a high throughput PCI backplane straightforward
�Theavailability of a p
ow
erf
ul debug s
upport
unitmade it very suitable for this application
�The LEON s
upport
svia its PCI-target interface
direct m
em
ory
accesswhich
allows the onboard software toconcentrate on its processing tasks while all
datamovement is done with a m
inim
alsoftw
are
inte
raction
�the h
igh c
lock fre
quency
�the 7
-sta
ge p
ipeline
�the d
ata
-and instr
uction c
ache
�less sensitive to slow memories
�the little p
ow
er consum
ption.
�the SDRAM memorycontroller
�la
rge
mem
ory
footp
rintfor minimalboard space and little power consumption
A n
ew
pro
cessor
20-23 November 2007
Slide15
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (8
)A
DPM
S A
rchitectu
ral (8
)
The p
ow
er-
bus topolo
gy that has b
een s
ele
cte
d for th
e A
DPM
S is a
battery
regula
ted b
us b
uilt aro
und the e
ffective u
tilisation o
f a L
i-Io
n b
attery
.
•C
om
pare
d w
ith tra
ditio
nally u
sed N
i-C
d c
ells, th
e n
ew
Li-Io
n c
ell is
reducin
g c
onsid
era
bly
the d
iffe
rence b
etw
een the m
axim
um
EO
C
and the m
inim
um
battery
voltage for th
e s
am
e D
OD
.
•Typic
ally s
mall s
ate
llite b
us-u
nits a
nd p
aylo
ad r
equirem
ents
in term
s o
f supply
bus r
egula
tion
are
not very
str
ingent, the a
ctu
al re
gula
tion is locally r
ealised b
y their m
anufa
ctu
rers
with
built-in
DC
/DC
convert
ers
.
These f
acts
reduce o
r elim
inate
the n
eed f
or
a c
om
ple
x a
nd b
ulk
yPC
S. The a
dvanta
ges b
ein
gth
at
the c
om
ple
xity o
f th
e e
lectr
onic
s a
nd the n
um
ber
of com
ponents
decre
ase. W
hic
h h
as a
n im
media
te
effect on the a
mount of te
sting involv
ed a
nd incre
ases the r
eliability s
ignific
antly.
The P
ow
er
Conditio
nin
g M
odule
desig
ned for
AD
PM
S takes a
dvanta
ge
of th
e a
bove e
lem
ents
and is
there
fore
more
suited for sm
all s
ate
llite a
pplication in term
s o
f m
ass, volu
me a
nd c
ost.
A b
attery
regula
ted b
us
20-23 November 2007
Slide16
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S A
rchitectu
ral (9
)A
DPM
S A
rchitectu
ral (9
)
Mechanic
al im
pro
vem
ents
Sm
all form
facto
r of th
e e
lectr
onic
board
s
�Limited height for the housing
�Housing can growin the length for the same height
Test connecto
rs o
n the o
pposite s
ide
of th
e b
ox
�easy test access guarantied even after S/C integration
Vib
ration levels
com
pliant w
ith a
wid
e r
ange o
f la
unchers
�facilitating a piggy back launch. selection
Deta
iled 3
D m
odellin
g a
nd m
ultip
le d
esig
n ite
rations
�optimal highly integrated
housing design.
Therm
al contr
ol fu
lly p
assiv
e
The h
ousin
g d
esig
n is v
ery
suitable
for
sm
all s
ate
llites
with a
hig
h l
evel
of
inte
gra
tion o
r a l
arg
e p
aylo
ad t
o
accom
modate
, because o
f th
e follow
ing k
ey-f
eatu
res:
20-23 November 2007
Slide17
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S N
ew
technolo
gie
sA
DPM
S N
ew
technolo
gie
s
•the usage of low power, low voltage
components (3,3V & 1,5V).
•the availability of high pin-count packages
•the selection of lightweight connectors
•the extensive utilisation of surface mount
technology
•the recent availability of large radiation
tolerant FPGA
The A
DPM
S h
as b
enefite
d fro
m today rapid
evolu
tion o
f ele
ctr
onic
s
20-23 November 2007
Slide18
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S Q
uality
appro
ach
AD
PM
S Q
uality
appro
ach
The A
DPM
S is a
hig
h reliable
com
pute
r…
All parts, materials and processes used in this programme are ofknown or recognised
standard o
rhave been approved by ESA after testing/qualification.
Com
ponents
sele
ction c
rite
ria:
Screening to SCC level C or:
·for microcircuits:
MIL-PRF-38535 class Q
or MIL-M-38510 class B
·for passive circuits:
ER-MIL failure rate P
·for transistors and diodes:MIL-PRF-19500 JANTXV
·for hybrid circuits:
MIL-PRF-38534 class H
·for switches:
MIL-STD-1132
·for relays:
MIL-PRF-39016
ECSS-Q-60-01, SCC QPL, NASA PPL, GSFC-PPL-21 and
COL PPL have been used as a source information during
initial components selection.
Com
ponent accepta
nce c
rite
ria:
For all flight components not meeting the selection criteria
a Parts Approval Document (PAD)has been initiated and
approved by ESA.
Listing all actions to be performed to accept the
components:
-Lot acceptance testing (LAT)
-material analysis
-outgassing testing
-Destructive parts analysis (DPA)
-Burn-in testing
-Total dose testing
-Single event upset testing
-…
Radia
tion s
pecific
ation:
Compatible with LEO orbit
* Total dose of 20KRad at component level
* Single event upset are limited to10-4 per day.
•Latch-up immunity is better than 100Mev-cm²/mg
The design has however taken into account more stringent
radiation environments.
20-23 November 2007
Slide19
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S T
he R
esult
AD
PM
S T
he R
esult
The
AD
PM
S c
onfigure
d for th
e Pro
ba-I
I sa
tellite
offer
s th
e fo
llowin
g
funct
ionality
for th
e fo
llowin
g b
udget
s:
Backplane
data throughput
up to 1 GBps
Multi
processor
support
Processor board
-100MIPS
-64 M
byte SDRAM
-4 M
byte SRAM
-4 M
byte Flash
-256 kByte Prom
Telecommand
-2 M
bps uplink capability
-4 virtual channels or more
-configurable N°of MAP-ID
-56 CPDU channels
Telemetry
-100 M
bps downlink
-5 virtual channels
-2 packetwire inputs
-full encoding
Mass memory
-4 Gbit
-with EDAC
Context memory
-128 kbyte
-with EDAC
Communication Interfaces
-Up to 25 UART channels
-Up to 6 TTC-B-01 channels
-a camera interface
with frame grabber
-2 packetwires
Analogue Interfaces
-Up to 80 analogue inputs
-Up to 32 tem
perature inputs
Time interfaces
-8 programmable clock outputs
-3 clock datation inputs
Power conditioning
-Up to 300W satellite peak power
-Up to 6 solar sections
Power distribution
-24 outputs of 28V / 50W
-current protected with auto restart
-sw
itchable or non-switchable
-battery undervoltage protected
with auto switch off
H/W
generated
emergency
telemetry
Centralised
time
synchronisation
H/W
recovery
TC decoder
Budgets
----------
Mass 13 kg
Volume 455x160x267mm
Power 17 W
1 failure
tolerant
system
20-23 November 2007
Slide20
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S O
ther
configura
tions
AD
PM
S O
ther
configura
tions
Thanks to
its m
odula
rity
, th
e AD
PM
S c
an b
e ea
sily
configure
d foroth
er
applica
tions:
Proba-II configuration
Mass 13 kg
Volume 19,4 dm3
Power 17 W
120 Gbit Mass Memory
Mass 4,3 kg
Volume 5,3 dm3
Power 30 W
Custom configuration
Mass ? kg
Volume ? dm3
Power ? W
800MIPS Processing Unit
Mass 4,3 kg
Volume 5,3 dm3
Power 25 W
Data-Handling System
Mass 3,3 kg
Volume 4,2 dm3
Power 16 W
300W Power System
Mass 3,9 kg
Volume 4,9 dm3
Efficiency 98%
Payload Processing Unit
Mass 2,4 kg
Volume 3,0 dm3
Power 12 W
20-23 November 2007
Slide21
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S K
ey featu
res
AD
PM
S K
ey featu
res
Min
iatu
rised a
vio
nic
s (m
ass &
volu
me)
�Optimal highly integrated housing design
�Qualification of new high pin-count packages (CGA)
�99%surface mount technology (SMD)
Low
pow
er
consum
ption
�low power, low voltage components (3,3V & 1,5V)
�utilisation of large radiation tolerant FPGA’s
Easy s
ate
llite inte
gra
tion
�Easy test access guarantied after S/C integration
�Open architecture (↔black box design)
�Improved testability
�Thermal control fully passive
Gro
wth
pote
ntial –
Hig
h r
e-u
se facto
r
�High throughput backplane
�Multiprocessor support
�Modular & scalable design
Hig
h p
erf
orm
ance
�100MIPS LEON processor
�1GBit/s high throughput backplane
�4Gbit mass memory (easily expandible)
�100MBit/s downlink capability
20-23 November 2007
Slide22
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S P
ictu
res
AD
PM
S P
ictu
res
The L
EO
N p
rocessor board
(fo
lded o
pen)…
The A
DPM
S u
nder te
st...
1,5
Watt
300 g
ram
20-23 November 2007
Slide23
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
AD
PM
S P
ictu
res (2)
AD
PM
S P
ictu
res (2)
Environm
enta
l te
sting…
20-23 November 2007
Slide24
EO
SS 2
007 –
Kuala
Lum
pur / M
ala
ysia
Authors:
Koen Puim
ege –Verhaert Space –koen.puim
ege@
verhaert.com
Hogenakkerhoekstraat 9, 9150 Kruibeke, Belgium
www.verhaert.com
Sven Landstroem
-ESA/ESTEC –sven.landstroem
@esa.int
David Hardy -ESA/ESTEC –
Keplerlaan 1, 2201 AZ Noordwijk, the Netherlands
www.esa.int
Thank y
ou for yo
ur atten
tion