Stress Analyses and Mechanical Reliability ofStress Analyses and Mechanical Reliability of 3D Interconnects with Through‐Silicon Vias

Kuan (Gary) Lu1, Suk‐Kyu Ryu2, Xuefeng Zhang1, Jay Im1 Paul S Ho1 Rui Huang2Im , Paul S. Ho , Rui Huang

1Mi l i R h C1Microelectronics Research Center2Department of Aerospace Engineering and Engineering Mechanics

U i it f T t A tiUniversity of Texas at Austin

June 15, 2009

Wafer Level 3D Integration

Memory stacks (Samsung)

Mechanical effects:Through silicon vias (TSVs)Wafer thinninga e t gWafer (die) bonding

Philip Garrou, Microelectronic Consultants of NCIntel 300 mm multicore processors

Through Silicon Vias

Via first processes

TSV materials:• Conductors: Cu W• Conductors: Cu, W• Insulators: TEOS, polymers • Barrier/adhesion: TiN, TaN

Geometric aspects:• High aspect ratio• Thin Si wafer (~ 10-300 μm)• Diameter (~1 50 μm)• Diameter (~1-50 μm)• Pitch (~3-100 μm)

Bower et al. (RTI), ECTC 2006

Eric Beyne (IMEC), IITC 2006

TSV Mechanical Reliability Stresses around TSVs:Stresses around TSVs:• Cracking of silicon• Strain-induced mobility changes in transistors (piezoresistance

effect)effect)• Keep-away zone for FEOL

Stresses inside TSVs:Stresses inside TSVs:• Plastic deformation• Stress-induced voiding• Stress migration• Stress migration

Stresses at the interfaces:Debonding via pop up• Debonding, via pop-up

Possible origins of stresses:Th l i i h b Si d i i l• Thermal expansion mismatch between Si and via materials

• Packaging induced deformation (warping)• Electromigration

Thermal Stress: Method of SuperpositionTσ

Si SiCu

zσ

Problem A: 

uniform thermal 

x

yrθ

Cu

Tzσ

Tp σ=

stress in Cu

TSV radius = a

Cu

SiCu

zp σProblem B:

3D Stress redistribution near surface

For a high aspect ratio TSV the stress field away from the surfaces can be

Tzp σ=

near surface

For a high aspect‐ratio TSV, the stress field away from the surfaces can be obtained from a 2D plane‐strain solution (Problem A).

The stress field near surface is 3D, which can be determined by superimposing an opposite surface loading (Problem B) onto the 2D field (Problem A) to satisfy the boundary conditions at the surface. 

2D Plane‐Strain Solution (Problem A)

( ) TSiCuT Δ−−= ααεSi

yr

Thermal Strain:

Uniform thermal stress in Cu via (triaxial):

EE

( )SiCuT

TSV radius = a

xθ

Cu

νεσ

νεσσ θ −

=−

==1

,)1(2

Tz

Tr

EE TSV radius = a

Tzσ

0,2

2==−= T aE σεσσ θ

Stress distribution in Si (biaxial):SiCu

0,)1(2 2− zr r

σν

σσ θ

The magnitude of the stresses in the via is independent of the via size.

Tzσ

The stresses in Si decay with the distance (r), with the decay length proportional to the via size (a).

Effect of elastic mismatchSi

yr

Elastic Modulus (GPa) CTE (ppm/C)

TSV radius = a

xθ Si 130.2 2.3

Cu 104.2 17.0Cu

ΔT= -380 oC

2

2

ra

r ∝σ2

2a−∝θσ r

Effect of liner layerElastic Modulus

(GPa)CTE

(ppm/C)

Si 130.2 2.3

A soft liner layer between the Cu via and Si dramatically reduces th t i b th th i dSiCOH 9.5 20

Cu 104.2 17.0

the stresses in both the via and Si.

ΔT 380 oC

InterlayerT

SV

Si

ΔT= -380 oC

2D Stress Field of Single Via

Normal stress σx Shear stress σxy

(TSV diameter: 20 um)

yx

yx (MPa)

• Assume stress free at high temperature (reference)

• Cooling from the reference temperature (ΔT = ‐175oC) leads to tensile stresses in the via.the via.

• Around the via, the stress is tensile in the radial direction and compressive in the circumferential direction, both concentrated near the via.

Stress Interaction between Two Vias (σx)

yx

y

x (MPa)

• Elastic interaction between TSVs depends on the via size and pitch

(TSV diameter: 20 um)

• Distribution of specific stress component depends on the relative arrangement of the vias.

TSV Arrays and Keep‐Away Zone

σx σxChannel direction Channel direction

yx

yx

• Assume devices sensitive to normal stress σx.• The keep-away zone can be optimized by properly arranging the

(MPa)

The keep-away zone can be optimized by properly arranging the TSVs with the same via density.

3D Stress Analyses of TSVs

Analytical solution• Near-surface stress

distribution by the method f itiof superposition

Finite element analysisFinite element analysis• Effect of wafer thickness• Effect of liner interlayer

a FEA Modely

3D Stress Field near Surface (Problem B)p

Uniform surface pressure over a circular area

SiCu

p

εTT ECu

pν

σ−

==1

TTzp

• Stress decays with the distance from the surface.

• Triaxial stress in the via center (r = 0).

• Radial and circumferential stresses on the surface (z = 0)• Radial and circumferential stresses on the surface (z = 0).

• Shear stress at the interface.

⎞⎛⎤⎡ zEzE εε 3

⎤⎡ 2

⎟⎠⎞

⎜⎝⎛

−=⎥

⎦

⎤⎢⎣

⎡−

+−==

azfE

zazEr TT

z νε

νεσ

11

)(1)0( 2/322

⎥⎥⎦

⎤

⎢⎢⎣

⎡

++

+

++−

−==== 2/322

2

22 )()21(2

)1(2)0()0(

zaza

za

zErr Tr

ννν

εσσ θ

3D Stress Fields near Wafer Surfacezσ

zrσ

∫ ∫π θρρσ

2 33)(a ddpzr ( )∫ ∫ +−+

−=θρρπ

ρρσ0 0 2/5222 cos22

),(zzrr

pzr

( ) θθ23 dd( )( )∫ ∫ +−+

−−=

π

θρρπθρρθρσ

2

0 0 2/5222

2

cos22cos3),(

a

zrzrrddrpzzr

3D Stress Fields near Wafer Surfacerσ θσ

∫ ∫⎥⎥⎦

⎤

⎢⎢⎣

⎡

⎭⎬⎫

⎩⎨⎧

+++

−−

+−

+⎭⎬⎫

⎩⎨⎧

+−

+++

−=

a

r ddzrzzr

vzr

zzr

zrzrzzr

vp0

2

0

2

22222/3222

2/522

2

2222sin

''21

)'()21(cos

)'('3

''21

2π

θρρβνβπ

σ

⎤⎡ ⎫⎧⎫⎧∫ ∫

⎥⎥⎦

⎤

⎢⎢⎣

⎡

⎭⎬⎫

⎩⎨⎧

+++

−−

+−

+⎭⎬⎫

⎩⎨⎧

+−

+++

−=

add

zrzzrv

zrz

zrzr

zrzzrvp

0

2

0

2

22222/3222

2/522

2

2222cos

''21

)'()21(sin

)'('3

''21

2π

θ θρρβνβπ

σ

Comparisons between 3D and 2D solutions

Effect of Wafer Thickness

σzσrz σr

H/D=10H/D=2

Effect of Wafer ThicknessStresses at the center of TSV:

The stresses in the TSV decrease as the aspect ratio H/D decreases.

Effect of Wafer ThicknessStresses acting at the via/Si interface:

The opening stress (σr) at the interface decreases as the aspect ratio H/D decreases.the aspect ratio H/D decreases.The shear stress (σrz) at the interface increases as the aspect ratio H/D decreases.

Effect of Liner Interlayer

σr

σσθ

Without liner With liner

Effect of Liner Interlayer

σz

σrz

Without liner With liner

Potential Fracture Modes of TSVs

Si Si

SiCuCuCu

R-crack C-crack Interfacial crack

R-crack grows in Si when the circumferential stress is tensile (σθ > 0, ΔT > 0).C k i Si h h di l i il ( 0C-crack grows in Si when the radial stress is tensile (σr > 0, ΔT < 0). Interfacial crack grows under mixed mode with the normal gstress σr > 0 (ΔT < 0) and shear stress σrz (ΔT > 0 or ΔT < 0).

TSV‐induced R‐crack in SiSi Stress intensity factor: ( ) 3)/1(81 ac

cTEcKI +−ΔΔ

=π

να

Cu Energy release rate:c

TSV radius = a

( )( ) 32

22

)/1(18)(

accTE

EKcG I

+−ΔΔ

==ναπ

The energy release rate for a R-crack increases as the via ΔT = 175 K

a = 50 μm

a = 30 μm

c ac c eases as t e adiameter increases.

The maximum energy release a 30 μm

a = 10 μm

rate occurs at the crack length c = 0.5a:

( )T 2απ ΔΔa 10 μm ( )( )

EaTaG 2max 154)(

ναπ−ΔΔ

=

SummaryAnalysis of thermal stresses in and around TSVs• 2D analysis: interactions of TSV arraysy y• 3D analysis: near-surface field• FEA models: effects of wafer thickness and liner

interlayerinterlayer

Fracture modes of TSVs• R-crack in Si: energy release rate increases with via

diameter.• C-crack in Si: study in progressC crack in Si: study in progress• Interfacial crack: study in progress

Support by SRC is gratefully acknowledged.