shashi sdh
TRANSCRIPT
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1
Confidential Information of Huawei. No Spreading without Permission.
OTA000004 SDH Principle
Issue 2.1
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Internal Use
ObjectivesObjectives
Upon completion of this course, you will be able to:
Understand the basic of SDH multiplexing standard
Know the features, applications and advantages of SDH based equipment
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Internal Use
Chapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing
Methods
Chapter3 Overhead & Pointers
Chapter4 Logical Functional Blocks
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Internal Use
ReferencesReferences
SDH Principle Manual
ITU-T G.701, G.702, G.707
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Internal Use
What is SDH?---- Synchronous Digital Hierarchy---- It defines frame structure, multiplexing method, digital rates hierarchy and interface code pattern.
Emergence of SDHEmergence of SDH
Why did SDH emerge?---- Need for a system to process increasing amounts of information.---- New standard that allows mixing equipment from different suppliers.
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Internal Use
Disadvantages of PDHDisadvantages of PDH
1. Interfaces
Electrical interfaces--- Only regional standards. 3 PDH rate hierarchies for PDH: European (2.048 Mb/s), Japanese, North American (1.544 Mb/s).
Optical interfaces--- No standards for optical line equipments, manufacturers develop at their will.
Plesiochronous Digital Hierarchy
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Internal Use
Disadvantages of PDHDisadvantages of PDH
2. Multiplexing methods
Asynchronous Multiplexing for PDH
The location of low-rate signals in high-rate signals is not regular nor predictable.
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Internal Use
Disadvantages of PDHDisadvantages of PDH
140 Mb/s34 Mb/s 34 Mb/s
8 Mb/s 8 Mb/s
2 Mb/s
140 Mb/s
de-multiplexer
de-multiplexer
de-multiplexer multiplexer
multiplexer
multiplexer
level by levelNot suitable for huge-volume transmission
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Internal Use
Disadvantages of PDHDisadvantages of PDH
3. OAM function--- Weak Operation, Administration & Maintenance function.
4. No universal network management interface--- Capabilities to setup a TMN is limited.
Telecommunications Management Network
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Internal Use
Advantages of SDHAdvantages of SDH
1. Interfaces
Electrical interfaces--- Can be connected to all existing PDH signals.
Optical interfaces--- Can be connected to multiple vendors’ optical transmission equipments.
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Internal Use
Advantages of SDHAdvantages of SDH
---Basic rate is STM-1, other rates are multiples of the basic rate
---PDH signal to/from SDH signal---Low level SDH to/from high level SDH
2. Multiplexing method
STM-1
STM-1
STM-1
STM-4STM-1
Low rate SDH High rate SDH
622 Mbit/s 622 Mbit/s
2 Mbit/s
De-m
ultiplexing
Multiplexing
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Internal Use
Advantages of SDHAdvantages of SDH
×4STM-1 155 Mb/s
STM-4 622 Mb/s
STM-16 2.5 Gb/s
×4 ×4STM-64 10 Gb/s
Low rate SDH to higher rate SDH
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Internal Use
Advantages of SDHAdvantages of SDH
byte interleaved multiplexing method
4:1
STM-1A
STM-1B
STM-1C
STM-1D
A BDCBADCBA …STM-4
One Byte from STM-1 B
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Internal Use
Advantages of SDHAdvantages of SDH
--- Synchronous multiplexing method and flexible mapping structure
--- Use multistage pointer to align PDH loads in SDH frame, thus, dynamic drop-and-insert capabilities
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Internal Use
Advantages of SDHAdvantages of SDH
3. OAM function
--- Abundant overheads bytes for operation, administration and maintenance.
--- About 5% of the total bytes are being used
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Internal Use
Advantages of SDHAdvantages of SDH
4. Compatibility
package
transmit
SDHnetwork
unpacking
PDH, SDH, ATM, FDDI Signals
packing
STM-N STM-N package
receive ProcessingProcessing
PDH, SDH, ATM, FDDI Signals
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Internal Use
Disadvantages of SDHDisadvantages of SDH
Low bandwidth utilization ratio.
64 E1139.264 Mbit/sE416 E134.368 Mbit/sE3128 E08.448 Mbit/sE232 E02.048 Mbit/sE1
One 64 kbit/s64 kbit/sE0ChannelsDigital Bit RateSignal
4032 E1, 192 E3, 64 E4STM-6410 Gbit/s9953.28Mbit/s1008 E1, 48 E3 or 16 E4STM-162.5 Gbit/s2488.32Mbit/s252 E1, 12 E3 or 4 E4STM-4622 Mbit/s622.08 Mbit/s
63 E1, 3 E3 or 1 E4STM-1155 Mbit/s155.52 Mbit/sSDH CapacitySDHAbbreviatedBit Rate
PDH Hierarchy
SDH Hierarchy
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Internal Use
QuestionsQuestions
1. Why did SDH emerge?2. What are the advantages & disadvantages of
SDH?3. What is the basic transmission rate in SDH
and what are the other common ones?
Time to thinkSoon Coffee Time!
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Internal Use
Chapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing
Methods
Chapter3 Overhead & Pointers
Chapter4 Logical Functional Blocks
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Internal Use
Part 2 SDH Frame Structure Part 2 SDH Frame Structure
From ITU-T G.707:
1. One frame lasts for 125 microseconds (8000 frames/s)
2. Rectangular block structure 9 rows and 270 columns(STM-1)
3. Each unit is one byte (8 bits)4. Transmission mode: Byte
by byte, row by row, from left to right, from top to bottom
Frame = 125 us
Bit rate of STM-1= 9*270*8*8000
123456789
270 Columns
9 rows
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Internal Use
SDH Frame StructureSDH Frame Structure
Three parts:1. Information
Payload2. Section
Overhead3. AU-PTR
Frame = 125 us
9
MSOH
AU-PTR Information Payload
RSOH123456789
270 Columns
9 rows
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Internal Use
Information PayloadInformation Payload
Information Payload
√ Also known as Virtual Container level 4 (VC-4)√ Used to transport low speed tributary signals√ Contains low rate signals and Path Overhead (POH)√ Location: rows #1 ~ #9, columns #10 ~ #270
9
MSOH
AU-PTRPayload
RSOH
270 Columns
HP
OH
1
package
package
low rate signal
LPOH, TU-PTR
LPOH, TU-PTR
9 rows
Data package
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Internal Use
Section OverheadSection Overhead
Fulfills the section layer OAM functions
9
270 Columns
9 rows
Types of Section Overhead
1. RSOH monitor the regenerator section
2. MSOH monitor the multiplexing section
Location:1. RSOH: rows #1 ~ #3,
columns #1 ~ #92. MSOH: rows #5 ~ #9, columns
#1 ~ #9
123
56789
MSOH
AU-PTR Information Payload
RSOH
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Internal Use
AUAU--PTRPTR
9
MSOH
AU-PTR Information Payload
RSOH
270 Columns
9 rows4
Indicates the first byte of VC4
► Location: row #4, columns #1 ~ #9
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Internal Use
SDH MultiplexingSDH Multiplexing
SDH Multiplexing includes:
√ Low to high rate SDH signals (STM-1 STM-N)√ PDH to SDH signals (2M, 34M & 140M STM-N)√ Other hierarchy signals to SDH Signals (ATM STM-N)
Some terms and definitions:► Mapping► Aligning► Multiplexing
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Internal Use
SDH Multiplexing StructureSDH Multiplexing Structure
STM-1 AU-4
TU-3
AUG-1
TUG-3 VC-3 C-3
VC-4 C-4
TU-12 VC-12 C-12
TUG-2
×1 ×1
×3
×1
×7
×3
139264 kbit/s
34368 kbit/s
2048 kbit/s
Pointer processing
Multiplexing
MappingAligning
AUG-4
AUG-16
AUG-64
STM-4
STM-16
STM-64
×1
×1
×1
×4
×4
×4
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Internal Use
SDH Tributary Multiplexing (140M)SDH Tributary Multiplexing (140M)
140 Mbit/s to STM-N
140M Rate adaptation
Add HPOH
C4
9
1 260125 μs
1
Next page
Mapping
VC4
1
9
125μs1 261
HPOH
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Internal Use
SDH Tributary Multiplexing (140M)SDH Tributary Multiplexing (140M)
AddAU-PTR
AddSOH
Aligning
AU-PTR
AU-4
10 270
×1
AUG-1
MultiplexingAUG-N
1 270
RSOH
MSOH
InfoPayloadAU-PTR
9
STM-1
1 270X N
9
STM-N
AddSOH
One STM-1 frame can load only one 140Mbit/s Signal
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Internal Use
SDH Tributary Multiplexing (34M)SDH Tributary Multiplexing (34M)
34 Mbit/s to STM-N
34M Rate Adaptation
Add LPOH
C3
1 849
125μs
1 1
9
VC3
LPOH
125μs1 85
Next page
Mapping
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Internal Use
SDH Tributary Multiplexing (34M)SDH Tributary Multiplexing (34M)
1st align
Fillgap
×3
86
TU-3
1
H1H2H3
1
9
Aligning
1 861
9
H1H2H3
R
TUG-3
Multiplexing
POH
R R
VC-4
9
11 2613
Same procedureas 140M
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Internal Use
SDH Tributary Multiplexing (2M)SDH Tributary Multiplexing (2M)
2 Mbit/s to STM-N
2M Nextpage
125μs
1 4
C12
1
9
LPOH
VC121 4
1
9
RateAdaptation
Add LPOH
Add TU-PTR
Mapping Aligning
TU12
1 41
9
TU-PTR
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Internal Use
SDH Tributary Multiplexing (2M)SDH Tributary Multiplexing (2M)
×3
1 12
TUG-2
1
9
×7
Multiplexing
R R
TUG-3
1 86
1
9
Multiplexing Same procedureas 34M
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Internal Use
QuestionsQuestions
1. What are the main parts of the SDH Frame structure?
2. What is the transmission speed of STM-4? How to calculate it?
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Internal Use
GlossaryGlossary
► Mapping - A process used when tributaries are adapted into VCs by adding POH information
► Aligning - This process takes place when a pointer is included in a Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of the VC to be located
► Multiplexing - This process is used when multiple low-order path signals are adapted into a higher-order path signal, or when high-order path signals are adapted into a Multiplexing Section
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Internal Use
GlossaryGlossary
C = ContainerVC = Virtual ContainerTU = Tributary UnitAU = Administrative UnitTUG = Tributary Unit GroupAUG = Administrative Unit GroupSTM = Synchronous Transfer Module
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Internal Use
Chapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing
Methods
Chapter3 Overhead & Pointers
Chapter4 Logical Functional Blocks
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Internal Use
Part 3 Section Overheads Part 3 Section Overheads
D3∆D2∆∆D1
F1∆E1∆∆B1
J0A2A2A2A1A1A1
AU-PTR
E2M1S1D12D11D10D9D8D7D6D5D4
K2K1B2B2B2
RSOH
MSOH
∆ = Media dependent bytesSTM-1
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Internal Use
A1 and A2 BytesA1 and A2 Bytes
Framing Bytes – Indicate the beginning of the STM-N frame
The A1, A2 bytes are unscrambled
A1 = f6H (11110110), A2 = 28H (00101000)
In STM-N: (3XN) A1 bytes, (3XN) A2 bytes
STM-N STM-N STM-N STM-N STM-N STM-N
Finding frame head
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Internal Use
A1 and A2 BytesA1 and A2 Bytes
Framing
Nextprocess
FindA1,A2
OOF
LOF
N
Y
AIS
over 3ms
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Internal Use
D1 ~ D12 BytesD1 ~ D12 Bytes
Data Communications Channels (DCC) Bytes
RS-DCC – D1 ~ D3 – 192 kbit/s (3X64 kbit/s)
MS-DCC – D4 ~ D12 – 576 kbit/s (9X64kbit/s)
TMNDCC channel
NE NE NENE
OAM Information: Operation, Administration and maintenance
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Internal Use
E1 and E2 BytesE1 and E2 Bytes
Digital telephone channelE1-RS, E2-MS
E1 and E2
NE NE NENE
Orderwire Bytes
E1 – RS Orderwire Byte – RSOH orderwire message
E2 – MS Orderwire Byte – MSOH orderwire message
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Internal Use
B1 ByteB1 Byte
Bit interleaved Parity Code (BIP-8) Byte –A parity code (even parity), used to check the
transmission errors over the RSB1 BBE is represented by RS-BBE( performance event)
Tx
2#STM-N
Rx
1#STM-NCalculateB1, B2
1#STM-N
2#STM-N
Verify B1 B2
STM-NA1 00110011A2 11001100A3 10101010A4 00001111
B 01011010
BIP-8
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Internal Use
B2 ByteB2 Byte
Bit interleaved Parity Code (MS BIP-24) Byte
This bit interleave parity NX24 code is used to check the bit errors over the MS
B2 BBE is represented by MS-BBE( performance event)
The mechanism of B2 is same like B1
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Internal Use
M1 ByteM1 Byte
Tx Rx
Traffic
GenerateMS-FEBBE
Find B2 bit errorsGenerate MS-BBE
Return M1
Multiplexing Section Remote Error Indication Byte A return message from Rx to Tx ,when Rx find B2 bit errorsA count of BIP-24xN (B2) bit errorsTx generate corresponding performance event MS-FEBBE
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Internal Use
K1 and K2( b1K1 and K2( b1--b5) b5)
Automatic Protection Switching (APS ) bytes
Transmitting APS protocol
Used for network multiplexing protection switch function
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Internal Use
K2 (b6 ~ b8)K2 (b6 ~ b8)
Rx detects K2 (b6-b8)="111" generate MS-AIS alarm
Rx detects K2 (b6-b8)="110" generate MS-RDI alarm
GenerateMS-AIS
Start
DetectK2(b6-
b8)
Return MS-RDI
GenerateMS-RDI
111
110
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Internal Use
S1 ByteS1 Byte
Synchronization Status Message Byte (SSMB): S1 (b5~ Synchronization Status Message Byte (SSMB): S1 (b5~ b8)b8)Value indicates the sync. levelValue indicates the sync. level
G.813 (Sync. Equipment Timing Clock)G.813 (Sync. Equipment Timing Clock)1011
Do not use for sync.Do not use for sync.1111
SSUSSU--B (G.812 local)B (G.812 local)1000SSUSSU--A (G.812 transit)A (G.812 transit)0100
G.811 PRCG.811 PRC0010
Quality unknown (existing sync. Network)Quality unknown (existing sync. Network)0000
Meaningbits 5 ~ 8
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Internal Use
Path OverheadsPath Overheads
N1
K3
F3
H4
F2
G1
C2
B3
J1 VC-n Path Trace Byte
Path BIP-8
Path Signal Label
Path Status
Path User Channel
TU Multiframe Indi
Path User Channel
AP Switching
Network Operator
Higher Order Path OverheadHigher Order Path Overhead
1 2 3 4 5 6 7 8 9 10
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Internal Use
Path trace byte: J1Path trace byte: J1
Next process
Detect J1
Match
HP-TIM
YN
> The first byte of VC-4> User-programmable> The received J1 should
match with the expected J1
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Internal Use
B3 ByteB3 Byte
Next process
Verify B3
correct
HP-BBE
YN
> Path bit paritycode byte (even parity code)
> Used to detect bit errors
Mechanism is same like B1and B2
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Internal Use
Signal label byte: C2Signal label byte: C2
> Specifies the mapping type in the VC-N
> 00 H Unequipped02 H TUG structure13 H ATM mapping
The received C2 should match with the expected C2
Detect C2
00H
HP-UNEQMatch
HP-SLMNext process
Insert AIS downward
N Y
NY
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Internal Use
Path Status Byte: G1Path Status Byte: G1
Detect receiving VC4
HP-UNEQHP-TIMHP-SLM
Return HP-RDI
HP-BBE
ReturnHP-REI
Next process
N Y
N Y
Return performance message from Rx to Tx
> HP-REI b1 ~ b4
> HP-RDI b5
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Internal Use
Path OverheadsPath Overheads
VC-12VC-12VC-12VC-12
K4N2J2V51
9
1 4
500μs VC-12 multiframe
Low Order Path OverheadLow Order Path Overhead
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Internal Use
Path Overhead BytesPath Overhead Bytes
V5> First byte of the multiframe> Indicated by TU-PTR> Functions: Error checking, Signal Label and Path Status of VC-12
b1 ~ b2 Error Performance Monitoring (BIP-2)b3 Return Error detected in VC-12 (LP-REI)b4 Return Failure declared in VC-12 (LP-
RFI)b5 ~ b7 Signal Label for VC-12b8 Indicate Defect in VC-12 path (LP-RDI)
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Internal Use
Path Overhead BytesPath Overhead Bytes
Next process
Verify b1 b2
match
LP-BBE
YN
Detect V5
Return LP-REI (b3)
Detect b5-b7
000
LP-UNEQMatch
LP-SLMNext
process
N Y
NY
Return LP-RDI (b8)
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Internal Use
PointersPointers
Pointers
AU-PTR TU-PTR
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Internal Use
AUAU--PTRPTR
RSOH
H1YYH2FF H3H3H3
H1YYH2FFH3H3H3
MSOH
RSOH
MSOH
0— — 1— — ------ 86— —
696— — 697— — ------782— —
0— — 1— — ------ 86— —
1 9 270
1
4
91
4
9
125us
250us
522— —435— — 436— — ------ 521— —
523— — -----608— —
Negativejustification
Positivejustification
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Internal Use
TUTU--PTRPTR
V4V3V2V1
VC-12VC-12VC-12VC-12
1
9
500μs VC-12 multiframe
TU POINTERSTU POINTERS
11 44
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Internal Use
QuestionsQuestions
Which byte is used to monitor the MS-AIS and MS-RDI?
What is the mechanism for R-LOF generation?
Which bytes implement the RS(MS/HP) error monitoring?
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Internal Use
Chapter1 SDH Overview
Chapter2 Frame Structure & Multiplexing
Methods
Chapter3 Overhead & Pointers
Chapter4 Logical Functional Blocks
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Internal Use
Part 4 Common SDH NE Part 4 Common SDH NE
TM (Terminal Multiplexer)Two ports device: Line Port (Optical Port), Tributary PortUsed in the terminal station of a networkCross-connect function: TU LU
TMTM
E1E1
E3E3
E4E4
STMSTM--MM
STMSTM--NN WW
Note: M<NNote: M<NHuaHua WeiWeiDefaultDefault
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Internal Use
Common SDH NECommon SDH NE
ADM (Add and Drop Multiplexer)Three ports device: Tributary Port, Line Port West (Left), Line Unit
East (Right)Used as an intermediate station, the most important NE typeCross-connect function: TU LU (W/E), LU (W) LU (E)
ADMADM
E1E1
E3E3
E4E4
STMSTM--MM
STMSTM--NNEE
Note: M<NNote: M<N
STMSTM--NN WW
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Internal Use
Common SDH NECommon SDH NE
Applications of TM & ADMApplications of TM & ADM
ADMADM
E1E1
E3E3
E4E4
STMSTM--MM
STMSTM--NNEE
Note: M<NNote: M<N
STMSTM--NNWW
TM ADM ADM TM
chain
ADM
ADM
ADM ADM
ring
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Internal Use
Common SDH NECommon SDH NE
REGTwo ports device: LU (W) & LU (E)
Used due to the long distance between MultiplexersO/E, Signal regenerating
REGREGWW EE
STMSTM--NN STMSTM--NN
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Internal Use
Common SDH NECommon SDH NE
DXCMulti-port deviceUsed to interconnect larger number of STM-N signalsCan be used for the grooming (consolidating & segregating)
of STM-NsUsed in complex & backbone networkDXC m/n (m ≥ n) m represent highest cross-connect raten represent lowest cross-connect rate
140Mb/s155Mb/s
42.5Gb/s622Mb/s34Mb/s8Mb/s2Mb/s64kb/srate653210m or n
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Internal Use
SDH Logical Functional BlocksSDH Logical Functional Blocks
ITU-T recommends a unified basic functional block standard
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Internal Use
Logical Functional Block for SDH Logical Functional Block for SDH EquipmentEquipment
STM A B C D E F
F
FG
GH HI
NP
G.703
G.703
140Mb/s
2Mb/s34Mb/s
Note: Taking 2Mb/sas example
SPI RST
TTF
MSPMST MSA
HPCPPI
PPI
LPA
LPA
HPT
HPTLPT LPC HPA
OHA OHA InterfaceSEMF MCF
Q InterfaceF Interface
D4—D12 D1—D3
External SynchronousSignal Interface
HOA
HOI
LOI
w
L
JK
M
SETS SETPI
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Internal Use
SPI Functional BlockSPI Functional Block
SPI: Synchronous Physical InterfaceImplements interface functionO/E, extracts timing signal from
STM-NMonitors corresponding alarm
SPI
ReceivingA B
O/EExtractTimingSignal
Receive FailR-LOS
TransmittingB A
E/O
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Internal Use
RST Functional BlockRST Functional Block
RST: Regenerator Section Termination
Processes RS overheadsProcesses RSOH in Rx
directionWrites RSOH in Tx direction
Receiving
B C
R-LOSPut all “1” at C
FramingA1, A2
FailR-OOF, R-LOFAll “1” at C
NormalUnscramble
Process E1, D1~D3
Verify B1RS-BBE
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Internal Use
RST Functional BlockRST Functional Block
TransmittingC B
WritesRSOH
Calculates B1
Add E1D1-D3
ScramblesSTM-N frame
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Internal Use
MST Functional BlockMST Functional Block
MST: Multiplex SectionTermination
Processes MSOHReceiving
C D
Extract APS
K1, K2 (b1-b5)Detect
K2 (b6-b8)
110MS-RDI
111MS-AIS
All “1” at D
DetectB2
AbnormalMS-BBE
OverflowMS-EXC (B2)All “1” at D
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Internal Use
MST Functional BlockMST Functional Block
TransmittingD→C
Write MSOH
Receiving MS-BBEReturn M1 MS-REI
Receiving MS-AISReturn K2 110 MS-RDI
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Internal Use
MST Functional BlockMST Functional Block
MST RST SPI MSTRSTSPI
RS (regenerator section)MS (multiplex section)
Concept of RS, MS
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Internal Use
MSP Functional BlockMSP Functional Block
MSP: Multiplex Section Protection Implements MS layer protection switchSwitch conditions: R-LOS, R-LOF, MS-AIS alarm
Main
Stand-by
TM TM
Network topology Functional Block
MSA
MSA
MSP
MSP
MST MST
MST MST
Main Signal Path
Stand-by Signal Path
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Internal Use
MSA Functional BlockMSA Functional Block
MSA: Multiplexing Section Adaptation
Implements AUG to VC-4 or VC-4 to AUG conversion
ReceivingE F
De-interleavedAUG N×AU-4
ReadAU-PTR
H1H2H3 are all “1”AU-AIS
All “1” at F
Invalid pointer or 8 NDFAU-LOP
All “1” at F
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Internal Use
MSA Functional BlockMSA Functional Block
TransmittingF E
WritesAU-PTR
Byte interleavedN×AU- 4 AUG
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Internal Use
Functional BlocksFunctional Blocks
HPC: High-Order Path Cross-connection
HPT: High-Order Path TerminationProcesses HPOH in VC-4
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Internal Use
Verify B3Invalid HP-BBE
HPT Functional BlockHPT Functional Block
ReceivingF G
Detect J1Mismatch
HP-TIM
Detect C2Mismatch
HP-SLM00H: HP-UNEQ
All “1” at G
Transmit H4to HPA
All “1” at G
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Internal Use
HPT Functional BlockHPT Functional Block
TransmittingG F
Write HO-POH Receiving HP-BBEReturn HP-REI (G1)
Receiving HP-TIM, HP-SLM, HP-UNEQReturn HP-RDI (G1)
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Internal Use
Functional BlockFunctional Block
HOI: High-Order Interface (HPT, LPA, PPI)140 M --- VC-4
HOA: High-Order Assemble (HPT, HPA)VC-12 --- VC-4
LPC: Low-Order Path ConnectionFor VC-12 & VC-3 Cross-connect MatrixOnly chooses route, does not process signals
LPT: Low-Order Path AdaptationReal-Time Monitoring of Low-Order VC-12
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Internal Use
Functional BlockFunctional Block
LPA: Low-Order Path AdaptationImplements pack/unpack and restores original signalPDH <---> C
PPI: PDH Physical InterfaceExtract PDH tributary signal timingCode pattern conversionInterface between device and PDH line
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Internal Use
PPI Functional BlockPPI Functional Block
PPI
ReceivingL MJ K
Code patternconversion
TransmittingM LK J
Code patternconversion
Extract timing
No input signalT-ALOS,EX-TLOS
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Internal Use
HPA Functional BlockHPA Functional Block
ReceivingG H
De-interleavedC4 63XTU-12
ReadTU-PTR
V1V2V3 are all “1”TU-AIS
All “1” at H
Invalid pointer or 8 NDFTU-LOP
All “1” at H
HPA: High order Path Adaptation
Implements C4 to VC-12 conversion
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Internal Use
HPA Functional BlockHPA Functional Block
TransmittingH G
TransmittingH G
Write PointerTU-PTR, VC-12 TU12
Write PointerTU-PTR, VC-12 TU12
Byte InterleaveTU12 C-4
Byte InterleaveTU12 C-4
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Internal Use
LPT Functional BlockLPT Functional Block
LPT
ReceivingH I
Detect V5LP-BBE
LP-SLM, LP-UNEQ
TransmittingI H
Write LO-POHReceive LP-BBE, Return LP-REI
Receive LP-SLM, UNEQ, Return LP-RDI
LPT: Low-Order Path TerminationProcess LO-POH
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Internal Use
Auxiliary Functional BlocksAuxiliary Functional Blocks
SEMF: Synchronous Equipment Management FunctionMonitoring center of the whole equipmentImplements OAM of local equipment and other equipment
MCF: Message Communication FunctionProvides D1~D3 Interface for communication
Implements network management termination interface to equipment: f/Qx
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Internal Use
Auxiliary Functional BlocksAuxiliary Functional Blocks
SETS: Synchronous Equipment Timing SourceProvides local timing clock signal to other functional
blocksProvides timing clock signal to other equipment
SETPI: Synchronous Equipment Timing Physical InterfaceProvides external interface of SETSExternal timing clock signal and output timing clock
signalOHA: Overhead Access
Processes order wire messages E1, E2, F1
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Internal Use
Alarm Flow ChartAlarm Flow Chart
TU-AIS
AU-AIS HPHP--UNEQUNEQ HP-TIM HP-SLMAU-LOP
R-LOS R-LOF
MSMS--AISAISMSMS--EXCEXC
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Internal Use