serial i/o and the hc11. overview general discussion of serial i/o operations osynchronous vs....

Serial I/O and the HC11

OverviewOverview

• General discussion of serial I/O operationso Synchronous vs. asynchronous operations

o Baud rate vs. bit rate

o Transmission standards

• 68HC11 capabilitieso General description

o Programming and operation

• Readings: Text, Chapter 10

Serial Input and Output OperationsSerial Input and Output Operations

• A serial data transfer moves one bit at a time between the processor and a peripheral deviceo A parallel data transfer moves one word at a time (often, 1

word = 1 byte)

• Why use serial I/O?o Some I/O operations are inherently serial

o If transmission distance is large, parallel data transmission may prove to be too expensive to implement

o If using the phone system, only have the serial option!

Cont..


• Interfaceso Logical: performs the

parallel-to-serial and serial-to-parallel data conversions

o Electrical: Transforms TTL voltage and signal levels to that of the transmission medium

Cont..


• Direction of transmissiono Simplex: data transfer in one direction onlyo Half duplex: transfer is bi-directional, but in only one direction at a

timeo Full duplex: transfer is bi-directional and can take place in both

directions at the same time

• Transmission timingo For serial I/O, often speak of each data packet as being a

character (often ASCII)o Asynchronous:

Transmitter and receiver are not synchronized with respect to the time at which a character is transmitted

Cont..


Each transmitted character is composed of data bits and framing bits

1. First, transmit start bit(s)2. Next, transmit data bits sequentially3. Finally, transmit stop bit(s)The transmitter may separate characters by random

amounts of timeThe bit stream for data and framing bits are transmitted at a

known rateA start bit is used to synchronize the receiver to the

transmitter for the reception of one characterWhen no data is being transmitted, transmitter output is

idle (active low levels)

Cont..


o Synchronous:Transmitter and receiver stay in sync at all times through

the use of synchronization charactersStart and stop bits are eliminated Data is transmitted as a continuous stream, with no

indication of character boundaries

• Transmission rates(This is a little confusing, and the book (p. 339)mainly adds to the confusion)o baud = “symbols per second,” named after the inventor of the

Baudot telegraph codeo symbol = 1 or more bits, encoded for transmission

Cont..


o Here's a frequency-shift-keying (FSK) example; in this case, the frequency determines 1 of 4 possible symbols (2 bits each)

o bit rate: number of bits transmitted per unit time, usually stated in units of bits per second (bps)

o The baud rate is not necessarily the same as the bit rate, although the terms are sometimes (incorrectly) used interchangeably

o Sometimes you may need to distinguish between the bit rate for data alone, vs. bit rate including framing bits or sync characters

Cont..


• Electrical interface and transmission standardso Problems with transmission

NoiseDifferent ground connectionsTransmission line effects (reflections)

o SolutionsLine drivers not at TTL levelsEIA standard transmission circuitsSingle-ended, balanced differential, unbalanced

differential

Line driver configurations [Sho87]

Cont..


Cont.


o EIA standards include RS232, RS423, RS422, and RS485

o Differences in the standards includeMode of transmission

(single vs. differential)Data transmission

ratesType of transmission

line and its length

68HC11 serial communications68HC11 serial communications

• The 68HC11 supports both asynchronous and synchronous serial communicationso SCI (serial communications interface) system provides

asynchronous transferso SPI (serial peripheral interface) system provides synchronous

transferso Both the SCI and the SPI use pins on port D to perform their

transfersSCI uses pins 0 and 1SPI uses pins 2-5

o Prior to performing either type of serial transfer, the interface must be configured / initialized

Cont.


• Asynchronous communicationo Framing bits

Each data byte is framed with a start bit and one or more stop bits

• Start bit is always 0 (idle line is always 1)• Stop bit is always 1• Different protocols may use 1, 1.5, or 2 stop bits

o HC11 always uses 1 stop bit Data byte is transmitted LSB first

o Parity Can be used to detect single-bit errors in the data (do not consider

start/stop bits)

Cont.


Usual implementation: append 1 extra bit to the end of the data (parity bit sent after MSB)

Even parity: select the value of the parity bit to cause an even number of 1s

Odd parity: select the value of the parity bit to cause an odd number of 1s

Not directly supported by HC11

• Must be implemented in software

• Peripheral chips (e.g. 8251 UART) do support it

Cont.


Cont.


• Asynchronous transfers using the SCIo Ports and pins used

Port pin PD1 is the transmit line TxDPort pin PD0 is the receive line RxDData is written and read from SCI data register, SCDR, at

address $102FPort is initialized by setting SCI Control Registers 1 and 2,

at addresses $102C and $102DDesired baud rate based on division factors in the Baud

Rate Control Register, address $102BPort status is reported in register SCSR, at address $102E

(not $102F as in Figure 10.5!)

Cont..


o Nominally transmits 8-bit data wordsCan transmit a 9th bit

if desiredSoftware can use 9th

bit for parity (parity not automatically generated or checked)

Cont..


o ConfigurationSelect desired baud rate -- write to baud rate register (bits

SCP0-1, SCR0-2)Select word length and wake up -- write to SCCR1Select interrupt operations, TxD and RxD operations, etc. --

write to SCCR2o Transmission procedure

Poll status register or respond to interrupt (read the SCSR) If using 9-bit data, write 9th bit (bit 8) to T8 in SCCR1 If TDRE=1, write lower 8 bits of data to the SCDR

o Receiving procedurePoll status register or respond to interrupt (read the SCSR) If RDRF=1, read SCDR If 9-bit data, read bit 8 from SCCR1

Cont..


Cont..

HC11 serial communicationsHC11 serial communications

o Baud rate selection Desired baud rate is

specified by the combination of baud-rate preselects and baud-rate selects, in the baud rate control register

See HC 11 manual for detailed information (text only presents settings for 8 MHz clock in Figure 10.5):


• Receive errorso Overrun Error

Occurs when new character is received before previous character is read from SCDR

New character is lostSets OR flag in SCSR

o Noise ErrorReceiver samples data line at 16 times the bit rate If samples in middle don’t match, there may be noise on

the lineSets NF flag in SCSR


o Framing Error Occurs when an invalid stop bit is detected May be due to baud rate mismatch, framing protocol mismatch,

or noise Sets FE flag in SCSR

• SCISUBS.H************************************************ Subroutine to initialize(INIT) SCI for serial* communications at 8 data, no parity, 1 stop* bit. Directly compatible with TERM in* PCbug11 and F7 comm in Iasm11.* All registers returned to calling conditions.

Cont..


* CEN 9/22/93 Initial release**********************************************

INIT PSHX ; Save registersPSHALDX #REGBASLDAA #$30 ; 9600 baud, assuming 8 MHz

; clockSTAA BAUD,X ; BAUD REGISTERLDAA #$00 ; 8 data bitsSTAA SCCR1,X ;LDAA #$0C ; No interrupts, enable TX,

; RX, no wakeup

Cont..


STAA SCCR2,X ;LDAA SCSR ; Clear RDRF, Error flagsLDAA SCDR ; Clear receive bufferPULA ; Restore registersPULXRTS

************************************************ Subroutine to receive(REC) a single character* from an initialized SCI serial device. No* echo to screen takes place.* Received character returned in ACCA. No other* registers modified.

Cont..


* CEN 9/23/93***********************************************

REC PSHX ; Save X registerLDX #REGBAS ; Point to register bankNOCH BRCLR SCSR,X,$20,NOCH ; Wait for RDRFLDAA SCDR,X ; Get received characterPULX ;Restore X registerRTS

************************************************ Subroutine to transmit(TRS) character from* SCI to serial connected terminal Expects* character to be displayed to be in ACCA upon

Cont..


* entry.* No other registers modified.* CEN 9/23/93***********************************************

TRS PSHX ; Save X registerLDX #REGBAS ; Point to register bankTBNMTBRCLR SCSR,X,$80,TBNMT ; Loop until xmit output

buffer empty; Empty if TDRE flag in SCSR register = 1STAA SCDR,X ; Write char to output bufferPULX ;Restore incoming X registerRTS

Cont..


• Synchronous transfers using the SPIo Two (or more) devices communicate via a serial bus with one device being the "bus master" and the others being "slaves"For SPI, both devices transmit and receive one byte during each transfer

o Master controls transfers by providing the clocking signals required

o Advantages of synchronous communicationFaster transfers• Higher clock rates• No start/stop bits

Cont..


o DisadvantagesMust provide clock signal to slaves

o Useful for:Communicating with local peripherals

• Can use built-in SPI interfaceCommunicating with other computers or remote peripherals (network)• Usually requires special-purpose ICs

Cont..


o Basic SPI operation

Cont..


o SPI serial system (bus topology)

Cont..


• SPI RegistersSPIE SPI Interrupt

EnableSPE SPI System

enableDWOM Port D Wire-Or

Mode (0=normal, 1=open-drain)

MSTR Master/Slave Select (0=slave, 1=master)

CPOL Clock Polarity0=active-high,

Cont..

1=active-low)CPHA Clock Phase

SelectSPR1,0 SPI Clock Rate Select Bits


• SPI RegistersSPIF SPI Interrupt RequestWCOL Write Collision Status FlagMODF SPI Mode Error Interrupt Status

Flag

DDRD5(Mater) 0 = SS input to detect mode fault

1 = SS is general purpose output

Slave = always inputDDRD4(Master)0 = SCK output disabled

Cont..


o Master SPI operation

Cont..


o Slave SPI operation

Cont..


• SPI Error Handlingo Mode Fault

Occurs when more than one device tries to be a masterDetected when the master’s SS input is driven low (by

another node trying to be a master)Sets the MODF flag in the SPSR registerGenerates an interrupt if SPIE is set

o Write CollisionOccurs when MCU attempts to write to SPDR while a

transfer is taking place

• Previous data is not overwrittenSets the WCOL flag in SPSR

Cont..


Master can prevent this by checking the SPIF flag before writing to SPDR

Slave should check WCOL flag after writing to see if collision occurred

• Overviewed serial communicationso Interfaceso Transmission “standards”

• 68HC11 implementationso SCI

8 or 9 bit data Rx/Tx• Automatically adds start/stop bitsUses PD0 and PD1 for receive/transmit

Cont..


Wide range of baud rate supportUse available routines in scisubs.h for “typical” interface

o SPI

8 bit data

• Devices receive and transmit simultaneouslyUses PD2-PD5

serial i/o and the hc11. overview general discussion of serial i/o operations osynchronous vs....

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