SEMI M1-0600 © SEMI 1978, 20001

SEMI M1-0600SPECIFICATIONS FOR POLISHED MONOCRYSTALLINE SILICONWAFERS

These specifications were technically approved by the Global Silicon Wafer Committee and are the directresponsibility of the North American Silicon Wafer Committee. Current edition approved by the NorthAmerican Regional Standards Committee on March 2, 2000. Initially available on SEMI OnLine April 2000;to be published June 2000. Originally published in 1978; previously published February 2000.

1 Purpose1.1 These specifications cover req uirements formonocrystalline high-purity silicon wafers used insemiconductor device manufacturing. Dimensional andcrystallographic orientation characteristics and limits onsurface defects are the only standardized properties setforth below.

1.2 A complete purchase specifica tion requires thatadditional physical properties be specified along withtest methods suitable for determining their magnitude.SEMI M18 provides a comprehensive listing of suchproperties and associated test methods and may be usedfor this purpose (see also Section 4).

1.3 These specifications apply specifically to siliconwafers with one chem-mechanically polished surface.Wafers polished on both sides, or unpolished, or withepitaxial deposits are not covered. Values given forthickness, TTV, bow, and warp apply only to waferswithout back surface films or extrinsic getteringtreatments. However, purchasers of such wafers mayfind these specifications to be a useful guide in definingtheir requirements.

1.4 For referee purposes, U.S. cus tomary units shall beused for wafers of 2- and 3-inch nominal diameters, andSI (system international, commonly called metric) unitsfor 80 mm and larger diameter wafers.

1.5 This standard does not purport to address safetyissues, if any, associated with its use. It is theresponsibility of the users of this standard to establishappropriate safety and health practices and determinethe applicability of regulatory practices prior to use.

2 Referenced Standards2.1 SEMI StandardsSEMI M12 — Specification for Serial AlphanumericMarking of the Front Surface of Wafers

SEMI M13 — Specification for Alphanumeric Markingof Silicon Wafers

SEMI M18 — Format for Silicon Wafer SpecificationForm for Order Entry

SEMI M20 — Specification for Establishing a WaferCoordinate System

SEMI T1 — Specification for Back Surface Bar CodeMarking of Silicon Wafers

SEMI T2 — Specification for Marking of Wafers witha Two-Dimensional Matrix Code Symbol

NOTE 1: A revision to SEMI T2 to extend it to includerectangular code symbols is currently being balloted in acompanion document.

2.2 ASTM Standards1 E 122 — Practice for Choice of Sample Size toEstimate Average Quality of a Lot or Process

F 21 — Test Method for Hydrophobic Surface Films bythe Atomizer Test

F 22 — Test Method for Hydrophobic Surface Films bythe Water-Break Test

F 26 — Test Methods for Determining the Orientationof a Semiconductive Single Crystal

F 28 — Method for Measuring the Minority-CarrierLifetime in Bulk Germanium and Silicon

F 42 — Test Methods for Conductivity Type ofExtrinsic Semiconducting Materials

F 43 — Test Methods for Resistivity of SemiconductorMaterials

F 47 — Test Method for Crystallographic Perfection ofSilicon by Preferential Etch Techniques

F 76 — Test Methods for Measuring Hall Mobility andHall Coefficient in Extrinsic Semiconductor SingleCrystals

F 81 — Method for Measuring Radial ResistivityVariation on Silicon Slices

F 84 — Method for Measuring Resistivity of SiliconSlices with a Collinear Four-Probe Array

1 American Society for Testing and Materials, 100 Barr HarborDrive, West Conshohoken, PA 19428-2959

SEMI M1-0600 © SEMI 1978, 2000 2

F 154 — Practices and Nomenclature for Identificationof Structures and Contaminants Seen on SpecularSilicon Surfaces

F 391 — Test Method for Minority Carrier DiffusionLength in Silicon by Measurement of Steady-StateSurface Photovoltage

F 398 — Test Method for Majority CarrierConcentration in Semiconductors by Measurement ofWave Number or Wavelength of the Plasma ResonanceMinimum

F 416 — Test Method for Detection of OxidationInduced Defects in Polished Silicon Wafers

F 419 — Test Method for Net Carrier Density inSilicon Epitaxial Layers by Voltage-Capacitance ofGated and Ungated Diodes

F 523 — Practice for Unaided Visual Inspection ofPolished Silicon Slices

F 533 — Test Method for Thickness and ThicknessVariation of Silicon Slices

F 534 — Test Method for Bow of Silicon Slices

F 613 — Test Method for Measuring Diameter ofSilicon Slices and Wafers

F 657 — Test Method for Measuring Warp and TotalThickness Variation on Silicon Slices and Wafers by aNoncontact Scanning Method

F 671 — Test Method for Measuring Flat Length onSlices of Electronic Materials

F 673 — Test Method for Measuring Resistivity ofSemiconductor Slices or Sheet Resistance ofSemiconductor Films with a Noncontact Eddy-CurrentGage

F 847 — Test Methods for Crystallographic Orientationof Flats on Single Crystal Silicon Slices and Wafers byX-Ray Techniques

F 928 — Test Methods for Edge Contour of SiliconWafers

F 951 — Test Method for Radial Interstitial OxygenVariation

F 1188 — Test Method for Interstitial Atomic OxygenContent of Silicon by Infrared Absorption

F 1241 — Terminology of Silicon Technology

F 1366 — Test Method for Measuring OxygenConcentration in Heavily Doped Silicon Substrates bySecondary Ion Mass Spectroscopy

F 1388 — Test Method for Generation Lifetime andGeneration Velocity of Silicon Material by

Capacitance-Time Measurements of MOS (Metal-Oxide-Silicon) Capacitors

F 1390 — Test Method for Measuring Warp on SiliconWafers by Automated Noncontact Scanning

F 1391 — Test Method for Substitutional AtomicCarbon Content of Silicon by Infrared Absorption

F 1451 — Test Method for Measuring Sori on SiliconWafers by Automated Noncontact Scanning

F 1526 — Standard Test Method for Measuring SurfaceMetal Contamination on Silicon Wafers by TotalReflection X-Ray Fluorescence Spectroscopy

F 1528 — Standard Test Method for Measuring BoronContamination in Heavily Doped N-Type SiliconSubstrates by Secondary Ion Mass Spectrometry

F 1530 — Test Method for Measuring Flatness,Thickness, and Thickness Variation on Silicon Wafersby Automated Noncontact Scanning

F 1535 — Test Method for Carrier RecombinationLifetime is Silicon Wafers by Noncontact Measurementof Photoconductivity Decay by Microwave Reflectance

F 1617 — Standard Test Method for Measuring SurfaceSodium, Aluminum, and Potassium on Silicon and EpiSubstrates by Secondary Ion Mass Spectrometry

F 1619 — Standard Test Method for Measurement ofInterstitial Oxygen Content of Silicon Wafers byInfrared Absorption Spectroscopy with P-PolarizedRadiation Incident at the Brewster Angle

2.3 DIN Standards2 50430 — Messung des spezifischen elektrischenWiderstandes von stabformigen Einkristallen ausSilicium oder Germanium mit dem Zwei-Sonden-Gleichstrom-Verfahren (Measurement of the ElectricalResistivity of Silicon or Germanium Single Crystals inBars by Means of the Two Point-Probe Direct CurrentMethod)

50431 — Messung des spezifischen elektrischenWiderstandes von Einkristallen aus Silicium oderGermanium mit dem Vier-Sonden Gleichstrom-Verfahren bei linearer Anordnung der Sonden(Measurement of the Electrical Resistivity of Silicon orGermanium Single Crystals by Means of the Four-Point-Probe Direct Current Method with Collinear FourProbe Array)

50432 — Bestimmung des Leitungstyps von Siliciumoder Germanium mittels Richttest oder Thermosonde

2 DIN Standards, Deutsches Institut fur Normung e.v., available fromBeuth Verlag GmbH, Burggrafenstrasse 4-10, D-1000 Berlin 30,Germany

SEMI M1-0600 © SEMI 1978, 20003

(Determination of the Conductivity Type of Silicon orGermanium by Means of Rectification Test or Hot-Probe)

50433/1 — Bestimmung der Orientierung vonEinkristallen mit einem Roentgengoniometer(Determination of the Orientation of Single Crystals byMeans of X-Ray Diffraction)

50433/2 — Bestimmung der Orientierung vonEinkristallen nach der Lichtfiguren-methode(Determination of the Orientation of Single Crystals byMeans of Optical Reflection Figure)

50433/3 — Bestimmung der Orientierung vonEinkristallen mittels Laue-Ruckstrahl-verfahren(Determination of the Orientation of Single Crystals byMeans of Laue Back Scattering)

50434 — Nachweis von Kristalldefekten in Silizium-Einkristallen mittels Atztechnik an 111- und 100-Flachen (Detection of Crystal Defects in SiliconMonocrystals by Etching on 111 and 100 Surfaces)

50435 — Bestimmung der radialen Variation desspezifischen elektrischen Widerstandes an Siliciumoder Germanium-Scheibenmitdem Vier-Sonden-Gleichstromverfahren (Determination of the RadialResistivity Variation of Silicon or Germanium Slices byMeans of a Four-Point-DC-Probe)

50438/1 — Bestimmung des Verunreinigungs-gehaltesin Silicium mittels Infrarot Absorption; Sauerstoff(Determination of Impurity Content in Silicon byInfrared Absorption; Oxygen)

50438/2 — Bestimmung des Verunreinigungs-gehaltesin Silicium mittels Infrarot Absorption; Kohlenstoff(Determination of Impurity Content in Silicon byInfrared Absorption; Carbon)

50440/1 — Messung der Rekombinations-Tragerlebensdauer in Silicium-Einkristallen nach derPhotoleitfahigkeitsverfahren; Messung anquaderformigen Proben (Measurement ofRecombination Carrier Lifetime in Silicon SingleCrystals by Means of Photoconductive Decay Method;Measurement on Bar-Shaped Test Samples)

50441/1 — Messung der geometrischen Dimensionenvon Halbleiterscheiben; Messung der Dicke(Measurement of the Geometric Dimensions ofSemiconductor Slices; Measurement of Thickness)

50441/2 — Messung der geometrischen Dimensionenvon Helblaiterscheiben; Prufung der Kantenverrundung(Measurement of the Geometric Dimensions ofSemiconductor Slices; Testing of Edge Rounding)

50441/4 — Messung der geometrischen Dimensionenvon Halbleiterscheiben: Scheibendurchmesser und

Flattiefe (Measurement of the Geometrical Dimensionsof Semiconductor Slices: Diameter and Flat Depth ofSlices)

2.4 JIS Standards3 H 0609 — Test Methods of Crystalline Defects inSilicon by Preferential Etch Techniques

H 0611 — Methods of Measurement of ThicknessTaper and Bow for Silicon Wafers

2.5 Other StandardsANSI/ASME B46.1 — Surface Texture (SurfaceRoughness, Waviness, and Lay)4

ANSI/ASQC Z1.4 — Sampling Procedures and Tablesfor Inspection by Attributes5

ISO 4287/1 — Surface Roughness – Terminology –Part 1: Surface and its Parameters6

NOTE 2: As listed or revised, all documents cited shall be thelatest publications of adopted standards.

3 Terminology3.1 Many terms relating to silicon technology aredefined in ASTM Terminology F 1241.

3.2 Definitions for many of the po lished wafer defectterms in Table 1 are given in ASTM Practices F 154and F 523 and in ASTM Test Method F 416.

3.3 Other terms are defined as follows:

3.3.1 acceptor — an impurity in a se miconductorwhich accepts electrons excited from the valence band,leading to hole conduction.

3.3.2 anisotropic, in semiconductor technology —exhibiting different physical properties in differingcrystallographic directions.

3 Japanese Standards Association, 1-24, Akasaka 4 Chome, Minato-ku, Tokyo 107, Japan4 This standard is currently being revised by a committee of TheAmerican Society of Mechanical Engineers, United EngineeringCenter, 345 E. 47th St., New York, NY 10017. In this draft revision,terminology is collected in a document designated B46.1.1; thisdocument should be referred to in connection with additional termsrelated to surface roughness. Note that the nomenclature and symbolsin ASME B46.1.1 may differ from those employed herein. Also notethat ASME B46.1.1 is still under development, and the terms anddefinitions therein may change prior to approval by ASME andANSI.5 American Society for Quality Control, 611 East Wisconsin Avenue,Milwaukee, WI 532026 ISO Central Secretariat, C.P. 56, CH-1211 Geneve 20 Switzerland;available in the U.S. from American National Standards Institute, 11West 42nd Street, 13th Floor, New York, NY 10036

SEMI M1-0600 © SEMI 1978, 2000 4

3.3.3 anisotropic etch — a selective etch whichexhibits an accelerated etch rate along specificcrystallographic directions.

3.3.3.1 Discussion: Anisotropic etches are used todetermine crystal orientation, to fabricatemicromechanical structures, and to facilitate dielectriccomponent isolation.

3.3.4 azimuth, in ellipsometry — the angle between themajor axis of the ellipse and the plane of incidence.

3.3.5 backside — not preferred, use back surface asdefined in ASTM Terminology F 1241.

3.3.6 bipolar — semiconductor device fabricationtechnology which produces transistors that use bothholes and electrons as charge carriers.

3.3.7 carrier, in semiconductor materials — an entitycapable of carrying electric charge through a solid, forexample, valence holes and conduction electrons insemiconductors; charge carrier.

3.3.8 chem-mechanical polish, in semiconductortechnology — a process for the removal of surfacematerial from the wafer which uses chemical andmechanical actions to achieve a mirror-like surface forsubsequent processing.

3.3.9 chuck mark — any physical mark on eithersurface of a wafer caused by a robotic end effector,chuck, or wand.

3.3.10 cleavage plane — a crystallographicallypreferred fracture plane.

3.3.11 conductivity (electrical) — a measure of theease with which charge carriers flow in a material; thereciprocal of resistivity.

3.3.11.1 Discussion: In a semiconductor, theconductivity is proportional to the product of freecarrier density, electron electrical, and carrier mobility.Most variant of all crystal properties, conductivity canrange over 13 orders of magnitude. Conductivity can belocally modified by temperature, carrier injection,irradiation, or magnetic field. Symbol is σ and units are(Ω•cm)-1.

3.3.12 conductivity type, of a semiconductor crystal orwafer — a property that identifies the majority chargecarrier in the semiconductor; see also n-type, p-type.

3.3.13 contaminant, particulate — see light pointdefect.

3.3.14 contamination, area — matter , unintentionallyadded to the surface of a wafer, of extent greater than asingle localized light scatterer.

3.3.14.1 Discussion: Area contamination may beforeign matter on the wafer surface resulting fromchuck marks, finger or glove prints, stains, wax orsolvent residues, etc.

3.3.15 contamination, particulate — a particle orparticles on the surface of a wafer.

3.3.16 crystal defect — departure from the idealarrangement of atoms in a crystal.

3.3.17 crystal indices — see Miller indices.

3.3.18 crystallographic notation — a symbolism basedon Miller indices used to label planes and directions ina crystal as follows:

plane (111)

family of planes 111

direction [111]

family of directions <111>

3.3.19 depletion layer — a region in which the mobilecarrier charge density is not sufficient to neutralize thenet fixed charge density of donors and acceptors;barrier layer; blocking layer; space-charge layer.

3.3.20 dimple — a shallow depression with gentlysloping sides that exhibits a concave, spheroidal shapeand is visible to the unaided eye under proper lightingconditions.

3.3.21 donor — an impurity or imper fection in asemiconductor which donates electrons to theconduction band, leading to electron conduction.

3.3.22 dopant — a chemical element, usually from thethird or fifth columns of the periodic table, incorporatedin trace amounts in a semiconductor crystal to establishits conductivity type and resistivity.

3.3.23 doping — addition of specific impurities to asemiconductor to control the electrical resistivity.

3.3.24 edge profile — on edge contoured wafers(whose edges have been shaped chemically ormechanically), a description of the contour of theboundary of the wafer that joins the front and backsurfaces.

3.3.25 etch — a solution, a mixture of solutions, or amixture of gases that attacks the surfaces of a film orsubstrate, removing material either selectively ornonselectively; see also anisotropic etch, preferentialetch.

3.3.26 fixed quality area (FQA) — the central area of awafer surface, defined by a nominal edge exclusion, X,over which the specified values of a parameter apply.

SEMI M1-0600 © SEMI 1978, 20005

3.3.26.1 Discussion: The boundary of t he FQA is at allpoints the distance X away from the periphery of awafer of nominal dimensions. (See Figure 1.) The sizeof the FQA is independent of wafer diameter and flatlength tolerances. For the purpose of defining the FQA,the wafer periphery at locations with notch fiducials isassumed to follow the circumference of a circle withdiameter equal to the nominal wafer diameter.

3.3.27 flat, on a semiconductor wafer — a portion ofthe periphery of a circular wafer that has been removedto a chord; see also primary orientation flat, secondaryflat.

3.3.28 flat diameter — the linear dimension across thesurface of a semiconductor wafer from the center of theflat through the wafer center to the circumference of thewafer on the opposite edge along the diameterperpendicular to the flat. (See Figure 3.)

3.3.28.1 Discussion: The flat diameter may beassociated with the primary orientation flat, with asecondary flat, if present, or with any other flat, ifpresent. In such cases, the term may be modified asprimary orientation flat diameter, secondary flatdiameter, etc. In the case of opposing primaryorientation and secondary flats, as occurs on [100] n-type wafers 125 mm and smaller in diameter, theconcept of flat diameter does not apply because thediameter perpendicular to the flats does not intersect thewafer circumference.

3.3.29 flatness — for wafer surfaces, the deviation ofthe front surface, expressed in TIR or maximum FPDrelative to a specified reference plane when the backsurface of the wafer is ideally flat, as when pulled downby a vacuum onto an ideally clean flat chuck.

3.3.29.1 Discussion: The flatness of a wafer may bedescribed as either:1. The global flatness, or

2. The maximum value of site flatness as measured onall sites, or

3. The percentage of sites which have a site flatnessequal to or less than a specified value.

3.3.30 focal plane — the plane perpendicular to theoptical axis of an imaging system which contains thefocal point of the imaging system.

3.3.30.1 Discussion: The reference plane used by animaging system is coincident with or parallel with thefocal plane. Full field imaging systems employcoincident global focal and reference planes. Partialfield imaging systems employ either coincident sitefocal and reference planes or displaced site focal andglobal reference planes. If the reference plane is not

coincident with the focal plane, it is displaced from thefocal plane so that the point on the front surface at a sitecenter lies in the focal plane.

3.3.31 focal plane deviation (FPD) — t he distanceparallel to the optical axis from a point on the wafersurface to the focal plane.

3.3.32 four-point probe — an electrical probearrangement for determining the resistivity of a materialin which separate pairs of contacts are used (1) forpassing current through the specimen and (2) measuringthe potential drop caused by the current.

3.3.33 front side — not preferred; use front surface asdefined in ASTM Terminology F 1241.

3.3.34 global flatness — the TIR or the maximumFPD relative to a specified reference plane within theFQA.

3.3.35 goniometer — an instrument to measure angles.

3.3.35.1 Discussion: Goniometers are f requently usedwith x-ray diffraction equipment to measure crystal axisangles or for optical angle measurement.

3.3.36 gradient, resistivity — not preferred; seeresistivity variation.

3.3.37 groove, in a semiconductor wafer — a shallowscratch with rounded edges that is usually the remnantof a scratch not completely removed by polishing.

3.3.38 haze — non-localized light-sca ttering resultingfrom surface topography (microroughness) or fromdense concentrations of surface or near-surfaceimperfections; see also laser light-scattering event.

3.3.38.1 Discussion: Haze due to the ex istence of acollection of imperfections is a mass effect; individualimperfections of the type which result in haze cannot bereadily distinguished by the eye or other opticaldetection system without magnification. In a particlecounter, haze results in a background signal; this signaland laser light-scattering events together comprise thesignal due to light-scattering from a wafer surface.

3.3.39 hole — a mobile vacancy in the electronicvalence structure of a semiconductor which acts like apositive electron charge with positive mass; themajority carrier in p-type material.

3.3.40 ingot, in silicon technology — a cylinder orrectangular solid of polycrystalline or single crystalsilicon, generally of slightly irregular dimensions.

3.3.40.1 Discussion: Silicon wafers are usually slicedfrom cylindrical single-crystal ingots that have beenground to a uniform diameter prior to slicing.

3.3.41 laser light-scattering event — a signal pulsethat exceeds a preset threshold, generated by the

SEMI M1-0600 © SEMI 1978, 2000 6

interaction of a laser beam with a discrete scatterer at awafer surface as sensed by a detector; see also haze.

3.3.41.1 Discussion: The amplitude of the signal, asmeasured by any combination of incidence orientationand collection orientation, does not convey topographicinformation (i.e., pit or particle). It does not allow theobserver to deduce the size or origin of the scattererwithout other detailed knowledge, such as its index ofrefraction and shape. In a particle counter, thebackground signal due to haze and laser light-scatteringevents together comprise the signal due to light-scattering from a wafer surface.

3.3.42 lay — the predominant directio n of the surfacetexture.

3.3.42.1 Discussion: Although the texture of polishedsilicon wafers is generally isotropic, some epitaxialwafers exhibit a pattern of steps and ledges whenexamined by atomic force microscopy at near atomicresolution. Contoured wafer edges may also exhibit layeven after polishing.

3.3.43 light point defect (LPD) — no t preferred, seelocalized light-scatterer (LLS).

3.3.43.1 Discussion: To some, the term light pointdefect implies a defective part; hence, a search wasundertaken for a more neutral term. Several were tried,and finally, despite some objection to the difficulty ofsaying the code, the term localized light scatterer wasapproved as a replacement. This term is general innature and can refer to features detected both visualinspection and by automated inspection using ascanning laser system.

3.3.44 localized light-scatterer (LLS) — AN isolatedfeature, such as a particle or a pit, on or in a wafersurface, resulting in increased light-scattering intensityrelative to that of the surrounding wafer surface;sometimes called light point defect.

3.3.44.1 Discussion: Localized light sca tterers ofsufficient size appear as points of light under highintensity optical illumination; these points of light canbe observed visually, but the observation is a qualitativeone. Localized light scatterers are observed byautomated inspection techniques as laser-lightscattering events. Automated inspection techniques arequantitative in the sense that scatterers with differentscattering intensities can be segregated. However, theamplitude of the scattered light intensity (laser light-scattering event), as measured by any combination ofincident beam direction and collection optics, does notby itself convey topographical information; particlesand pits cannot be distinguished solely on the basis ofamplitude data. Also, the observer cannot deduce thesize or shape of the LLS from the signal amplitude

alone. The presence of LLS’s does not necessarilydecrease the utility of the wafer.

3.3.45 lot — for the purposes of this document, (a) allof the wafers of nominally identical size andcharacteristics contained in a single shipment, or (b)subdivisions of large shipments consisting of wafers asabove which have been identified by the supplier asconstituting a lot.

3.3.46 majority carrier — type of cha rge carrierconstituting more than one half the total charge-carrierconcentration (e.g., holes in p-type material).

3.3.47 maximum FPD — the largest o f the absolutevalues of the focal plane deviations.

3.3.48 microroughness — surface roughness compo-nents with spacing between irregularities (spatial wave-length) less than about 100 µm.

3.3.49 Miller indices, of a crystallographic plane —the smallest integers proportional to the reciprocals ofthe intercepts of the plane on the three crystal axes ofunit length.

3.3.50 minority carrier — type of cha rge carrierconstituting less than one half the total charge-carrierconcentration (e.g., electrons in p-type material).

3.3.51 notch, on a semiconductor wafer — anintentionally fabricated indent of specified shape anddimensions oriented such that the diameter passingthrough the center of the notch is parallel with aspecified low index crystal direction.

3.3.52 orthogonal misorientation — in wafers cutintentionally “off orientation,” the angle between theprojection of the vector normal to the wafer surfaceonto a 111 plane and the projection on that plane ofthe nearest <100> direction. (See Figure 2.)

3.3.53 particle — a small, discrete piece of foreignmaterial or silicon not connected crystallographically tothe wafer.

3.3.53.1 Discussion: Particles may be p ieces of solidmaterial or condensate from liquids or gases. Particlesare observed by automated inspection as laser light-scattering events, but they may also be observedvisually under high intensity illumination as points oflight or studied by other methods, including scanningelectron microscopy. Particles on wafer surfaces canusually be removed by non-etching cleaning.

3.3.54 point defect — a localized crys tal defect such asa lattice vacancy, interstitial atom, or substitutionalimpurity. Contrast with light point defect.

3.3.55 preferential etch — a selective etch that etchesregions of different crystal strain or conductivity at

SEMI M1-0600 © SEMI 1978, 20007

different rates, used to delineate crystal defects orregions of differing conductivity on wafer surfaces.

3.3.56 primary orientation flat — the flat of longestlength on the wafer, oriented such that the chord isparallel with a specified low index crystal plane; majorflat.

3.3.57 profilometer — an instrument for measuring thetopographical profile of a surface.

3.3.58 rms microroughness (Rq) — the root meansquare of the surface profile height deviations Z(x)from the mean line taken within the evaluation LengthL.

3.3.58.1 Discussion: rms microroughness, Rq is one ofseveral statistical metrics which can be used to describea surface profile; definitions for other metrics and forsuch concepts as mean line, evaluation length, andpower spectral density function, may be found inANSI/ASME B46.1 and ISO 4287/1.

3.3.58.2 The function Rq is related to a one-dimen-sional measurement of the surface profile as follows:

Rq =1L 0

LZ (x)2 dx

1/ 2

3.3.58.3 The digital approximation of Rq for a profileconsisting of N equally spaced points is:

Rq =1N

Zi2

i =1

N

1/ 2

3.3.58.4 Experimentally, the profile is a lways limitedby the spatial bandwidth of the measurement. For aprofile of length L, consisting of N equally spacedpoints, the lower spatial frequency limit f1 can never beless than 1/L and the upper spatial frequency limit f2 cannever be greater than the Nyquist limit, N/2L. Inpractical cases, f1 ≈ 2/L; the achievable value of f2depends on instrumental parameters.

3.3.58.5 Rq can also be estimated by integrating theone-dimensional power spectral density (PSD) function,PSD(f), over the spatial frequency range between twospatial frequencies, f1 and f2, which lie within thebandwidth of the measurement:

Rq =f1

f 2 PSD( f )df

1/ 2

3.3.58.6 In all cases, Rq must be reported together withthe lower and upper limits, f1 and f2, respectively, of thespatial frequency bandwidth over which it has beendetermined. Alternatively, the spatial bandwidth may beexpressed in terms of the upper and lower spatialwavelengths, λ2=(=1/f2) and λ1=(=1/f1), respectively.

3.3.59 rms area microroughness, (Rq A) — the rootmean square of the topographic deviations of a surfaceZ(x,y) from the mean surface taken within theevaluation area Ae (=LxLy).

3.3.59.1 Discussion: The rms area microroughness isone of several statistical metrics which can be used todescribe surface topography; definitions for othermetrics and for such concepts as mean surface andevaluation area may be found in ANSI/ASME B46.1and ISO 4287/1.

3.3.59.2 The function RqA is related to a two-dimen-sional measurement of the surface profile as follows:

RqA =1Ae

Z(x, y)2 dxdy0

Ly

0

Lx

1 / 2

3.3.59.3 The digital approximation of Rq A for a surfaceprofile consisting of N by M data points equally spacedalong the x and y directions, respectively, is:

RqA =1

NMZij

2

j =l

N

i = l

M

1 / 2

3.3.59.4 Experimentally, the profile is a lways limitedby the spatial bandwidth of the measurement. In the xdirection, the profile length is Lx divided into N equallyspaced points; the lower spatial frequency limit for fxcan never be less than 1/Lx and the upper spatialfrequency limit can never be greater than the Nyquistlimit, N/2Lx. Similarly, in the y direction, the profilelength is Ly divided into M equally spaced points; thelower frequency limit for fy can never be less than 1/Lyand the upper spatial frequency limit can never begreater than the Nyquist limit, M/2Ly. Practical limits tothe spatial bandwidth are governed by considerationssimilar to those for the one-dimensional case (seeDiscussion under rms microroughness).

3.3.59.5 RqA can also be estimated by in tegrating thetwo-dimensional power spectral density (PSD)function, PSD(fx, fy), over the spatial frequency rangebetween spatial frequencies which lie within thebandwidth of the measurement:

RqA = PSDA ( fx , fy ) dfxdfyfy 1

fy 2

fx 1

fx 2

1 / 2

3.3.59.6 If the surface is assumed to be isotropic andthe instrument response function is neglected, the rmsmicroroughness over the spatial frequency rangebetween f1 and f2 can also be obtained by integratingthe isotropic PSD function:

SEMI M1-0600 © SEMI 1978, 2000 8

RqA =f1

f2PSDiso( f ) df=

===

==

1 / 2

where PSDiso( f ) = PSD

A0

2π( f

x , fy) f dβ = 2π f PSD

A( fx , f

y) and f = ( fx2 + f

y2 )1/ 2 .

3.3.60 radial gradient — not preferred; see resistivityvariation.

3.3.61 reference plane — a plane defined by one of thefollowing:1. Three points at specified locations on the front

surface of the wafer, or

2. The least squares fit to the front surface of the waferusing all points within the FQA, or

3. The least squares fit to the front surface of the waferusing all points within a site, or

4. An ideal back surface (equivalent to the ideally flatchuck surface that contacts the wafer).

3.3.61.1 Discussion: The specified reference planeshould be chosen with due regard for the capabilities ofthe imaging system. Front surface or back surfacereference planes should be selected depending on thewafer mounting system. If the wafer cannot begimbaled in the imaging system, a back surfacereference plane should be specified.

3.3.62 resistivity, (electrical) — the measure ofdifficulty with which charged carriers flow through amaterial; the reciprocal of conductivity.

3.3.62.1 Discussion: the resistivity of a semiconductoror other material is the ratio of the potential gradient(electric field) parallel with the current to the currentdensity. Symbol is σ and units are (Ω•cm)-1.

3.3.63 roughness — the more narrowly spacedcomponents of surface texture.

3.3.63.1 Discussion: These components are consideredwithin defined limits of spatial wavelength (orfrequency).

3.3.64 scan direction — the direction of successivesubsites in a scanner site flatness calculation.

3.3.64.1 Discussion: The scanner site flatness valueobtained for a site may depend on scan direction.

3.3.65 scanner site flatness — the maximum subsiteTIR or the maximum subsite FPD, of a site. The subsiteTIR is the TIR of the portion of the subsite that fallswithin the FQA and within the site; the subsite FPD is

the maximum FPD of the portion of the subsite thatfalls within the FQA and within the site. The referenceplane is calculated using all points within the subsitethat fall within the FQA.

3.3.65.1 Discussion: Precise scanner site flatnessmeasurement requires measurement points locatedclosely enough to reveal the surface topography indetail. It is recommended that the scanner site flatnessbe measured using a data point array with adjacentpoints separated by 1 mm or less.

3.3.66 secondary flat — a flat of leng th shorter thanthe primary orientation flat, whose position with respectto the primary orientation flat identifies the type andorientation of the wafer.

3.3.67 shape — for wafer surfaces, the deviation of aspecified wafer surface relative to a specified referenceplane when the wafer is in an unclamped condition,expressed as the range or total indicator reading (TIR)or as the maximum reference plane deviation(maximum RPD) within the specified fixed qualityarea.

3.3.67.1 Discussion: This definition is analogous tothe definition of flatness, which applies to the frontsurface geometry when the wafer is in the clampedcondition.

3.3.68 site — a rectangular area, on the front surfaceof the wafer, whose sides are parallel and perpendicularto the primary orientation flat or to the notch bisector,and whose center falls within the FQA.

3.3.69 site array — a set of contiguous sites.

3.3.70 site flatness — the TIR or the maximum FPD ofthe portion of a site which falls within the FQA.

3.3.70.1 Discussion: Precise site flatness measurementrequires measurement points located closely enough toreveal the surface topology in detail. It is recommendedthat site flatness be measured using a data point arraywith adjacent points separated by 2 mm or less. It isalso recommended that the data set used to calculatesite flatness have data at each site corner and along eachsite boundary. This makes the effective sitemeasurement area equal to the site size.

3.3.71 smudge — dense local area of contaminationusually caused by handling or fingerprints.

SEMI M1-0600 © SEMI 1978, 20009

3.3.72 sori — the difference between the maximumpositive and maximum negative deviations of the frontsurface of a wafer that is not chucked from a referenceplane that is a least-squares fit to the front surface.

3.3.73 subsite, of a site — a rectangular area, Lss ×Wss, on the front surface of a wafer, associated with aparticular site and whose center is within the site andany part of which is within or on the FQA boundary. Asubsite corresponds to the instantaneous area exposedby a scanning stepper (see Figure 8).

3.3.74 surface texture — the topographic deviations ofa real surface from a reference surface.

3.3.74.1 Discussion: Surface texture inc ludesroughness, waviness, and lay.

3.3.75 total indicator reading (TIR) — t he smallestperpendicular distance between two planes, bothparallel with the reference plane, which encloses allpoints on the front surface of a wafer within the FQA,the site, or the subsite, depending on which is specified.

3.3.76 waves — uneven contours in the surface of awafer visible to the unaided eye under large-areadiffuse illumination.

3.3.77 waviness — the more widely spaced componentof surface texture.

3.3.77.1 Discussion: Waviness may be caused by suchfactors as machine or work piece deflections, vibration,and chatter. Roughness may be considered assuperimposed on a wavy surface.

4 Wafer Ordering Informatio n4.1 Purchase orders for silicon wa fers furnished to thisspecification shall include the following items:

4.1.1 Nominal diameter (see applicable polishedsilicon wafer standard).

4.1.2 Crystal growth method (see NOTE 4).

4.1.3 Surface orientation (see applicable polishedsilicon wafer standard).

4.1.4 Conductivity type (see applicable polishedsilicon wafer standard) and dopant (see NOTE 4).

4.1.5 Resistivity or resistivity range.

4.1.6 Lot acceptance procedures (see Section 8).

4.1.7 Certification (if required) (see Section 11).

4.1.8 Packing and marking (see Sec tion 12).

4.1.9 Selection of test method to be used in evaluatingthose items for which alternate tests exist (see Section9).

4.2 Optional Criteria — The follo wing items may bespecified optionally in addition to those listed above.

4.2.1 Doping method and thermal tr eatment (seeNOTE 4).

4.2.2 Radial resistivity variation.

4.2.3 Crystal perfection.

4.2.4 Impurities other than common intentionallyadded dopant elements, such as interstitial atomicoxygen and substitutional carbon or in heavily doped n-type silicon, boron contamination.

4.2.5 Surface metal contaminants.

4.2.6 Flatness — The following conditions must bespecified in connection with flatness measurement:A. Type of Measurement

1. Global flatness

2. Maximum site flatness

3. Percentage of sites within specification

B. Parameter: TIR or maximum FPD

C. Nominal Edge Exclusion: X

D. For site flatness (where specified):

1. Site dimensions: xsite and ysite are relative to theSEMI M20 wafer coordinate system. The firstsite dimension listed in a site flatnessspecification shall be the xsite and the seconddimension shall be the ysite.

2. Array offsets: xarray and yarray relative to FQAcenter and to the SEMI M20 wafer coordinatesystem.

NOTE 3: The array offsets are composed of the distance xarrayand the distance yarray between the center of the wafer and thecorner of the site that is nearest the wafer center.

E. Reference Plane:

1. Three point (also, specify point locations)

2. Least squares fit to the front surface within theFQA

3. Least squares fit to the front surface within asite

4. Ideal back surface

F. Focal Plane:

1. Global

2. Site

4.2.7 Edge contour

4.2.8 Hall or conductivity mobility ( see NOTE 5).

SEMI M1-0600 © SEMI 1978, 2000 10

4.2.9 Diffusion length (see NOTE 5).

4.2.10 Minority carrier lifetime (see NOTE 5).

NOTE 4: The dopant, crystal growth method (for example,Czochralski or floating zone), and doping method (forexample, ion implantation or neutron transmutation) withsubsequent heat treatment are difficult to ascertain in thefinished wafers. Verification test procedures or certification ofthese characteristics (see Section 11) shall be agreed uponbetween the user and supplier.

NOTE 5: Items 4.2.7, 4.2.8, and 4.2.9 are less commonlyspecified than the others, but are included for completeness asparameters for which methods of evaluation have beendeveloped.

5 Dimensions and Permissi ble Variations5.1 The material shall conform to the dimensions anddimensional tolerances as specified in the polishedsilicon wafer standard applicable to the specifiednominal diameter.NOTE 6: Wafers of the same nominal diameter may typicallyhave different dimensional configurations in different regionsof the world. Many of these configurations are represented inthis specification. In selecting the appropriate polished waferstandard, consideration should be given to compatibility withprocesses and equipment generally available in the region ofuse.

5.1.1 Sori is an attribute that may be specified betweenthe user and supplier in lieu of bow or warp or both.

5.1.2 If bow is specified, a sign may be included in thespecification to denote convex (positive) or concave(negative) curvature of the median surface of the waferwith the front surface up. If no sign is included in thespecification, bow may vary between -a and +a, where“a” is the specified maximum magnitude of bow.

5.2 If edge-contoured wafers are specified on the pur-chase order, the profile shall conform to the followingrequirements at all points on the wafer periphery(except interior portions of notches, if present).

5.2.1 When the wafer is aligned with the SEMI WaferEdge Profile Template (see Figure 4) so that the x-axisof the template is coincident with the wafer surface andthe y-axis of the template is tangent with the outermostradial portion of the contour, the wafer edge profilemust be contained within the clear region of thetemplate. (See Figure 5 for examples of acceptable andunacceptable contours.)

5.2.2 No sharp points or protrusions are permittedanywhere on the wafer edge contour.

5.2.3 Cosmetic attributes of the edge contour are notcovered by this specification. They shall be agreedupon between user and supplier.

5.3 Fiducial indications shall conform to therequirements of the appropriate polished silicon waferstandard.

5.3.1 Where secondary flats are spec ified, they shallbe located as shown in Figure 6.

5.3.2 Where notches are specified, t hey shall conformto the dimensions in Figure 7.

5.4 Where alphanumeric marking is specified, thecode character properties and code field location shallconform to SEMI M13 or to SEMI M12. Where backsurface bar code marking is specified, the code symboland its location shall conform to SEMI T1. Where two-dimensional matrix code marking is specified, the codesymbol and its location shall conform to SEMI T2.

6 Materials and Manufactur e6.1 The material shall consist of wafers from ingotsgrown by the process specified in the purchase order orcontract.

7 Physical Requirements7.1 The material shall conform to the crystallographicorientation details as specified in the appropriatepolished silicon wafer standard.

7.1.1 For ion implant applications, t he followingtolerance issues should be considered:

7.1.1.1 For general use where channel ing is to beavoided, the current wafer orientation specification of ±1.0° deviation from the [100] axis (perpendicular to the(100) plane of the wafer) is adequate. This specificationis suitable for minimum channeling applications,provided that the appropriate ion implant equipmentangle settings are employed.

7.1.1.2 Uniform, maximum channeling along the [100]axis perpendicular to the (100) wafer surface is stronglydependent on strict adherence to a 0° tilt angle. Toachieve maximum channeling, crystallography requiresthe orientation to be within ± 0.1° of a <100> direction.Also, the user must remove all overlying oxide, nitride,poly, etc., layers from the wafer prior to a channelingimplant. The user must maintain very rigid control ofthe ion implant equipment angle setting in order toachieve maximum channeling across the wafer.

7.1.1.3 The tolerance of ± 0.1° is derived fromexperimental ion implant profile data and ion implantmodeling activity for implants into (100) silicon wafers.The ranges for which data was obtained are:

Species Energy Range (keV)B 15–80

BF2 15–65

SEMI M1-0600 © SEMI 1978, 200011

As 15–180

7.2 The material shall conform to the details specifiedin the purchase order or contract, as follows:

7.2.1 Conductivity type and dopant (see NOTE 4),

7.2.2 Resistivity,

7.2.3 Doping methods and thermal t reatment (seeNOTE 4),

7.2.4 Radial resistivity variation,

7.2.5 Crystal perfection,

7.2.6 Amounts of impurities other than commondopants,

7.2.7 Hall or conductivity mobility,

7.2.8 Diffusion length, and

7.2.9 Minority-carrier lifetime.

7.3 The material shall conform to the limits onvisually observable surface defects specified in Table 1.If surface metal contamination levels are specified onthe purchase order, the maximum area densities shall bedesignated in units of atoms/cm2 for specific individualelements (see Related Information 1).

8 Sampling8.1 Unless otherwise specified, ASTM Practice E 122shall be used to define the sampling plan. When sospecified, appropriate sample sizes shall be selectedfrom each lot in accordance with ANSI/ASQC Z1.4.Each quality characteristic shall be assigned anacceptable quality level (AQL) or lot tolerance percentdefective (LTPD) value in accordance withANSI/ASQC Z1.4 definitions for critical, major, andminor classifications. If desired and so specified in thecontract or order, each of these classifications mayalternatively be assigned cumulative AQL or LTPDvalues. Inspection levels shall be agreed upon betweenthe supplier and the purchaser.

9 Test MethodsNOTE 7: Silicon wafers are extremely fragile. While themechanical dimensions of a wafer can be measured by use oftools such as micrometer calipers and other conventionaltechniques, the wafer may be damaged physically in ways thatare not immediately evident. Special care must, therefore, beused in the selection and execution of measurement methods.

9.1 Diameter — Determine in acco rdance with ASTMTest Method F 613 or DIN 50441/4.

9.2 Thickness, Center Point — Determine inaccordance with ASTM Test Method F 533, ASTMTest Method F 1530, or DIN 50441/1.

9.3 Flat Length — Determine in accordance withASTM Test Method F 671.

9.3.1 If flat diameter is specified ins tead of flat length,determine in accordance with Paragraph 6.2.1 of DIN50441/4 or by a dial gauge method as agreed uponbetween the user and supplier.

9.4 Bow and Warp — Determine bow in accordancewith ASTM Test Method F 534 and warp in accordancewith ASTM Test Method F 1390 or Test Method F 657.NOTE 8: ASTM has standardized two methods for measuringwarp. ASTM Test Method F 1390 is an automated,noncontact method which provides for correction of the waferdeflection due to gravitational effects. The scan pattern coversthe entire fixed quality area. ASTM Test Method F 657 is amanual, noncontact method which has a continuous,prescribed scan pattern which covers only a portion of thewafer surface. There is no provision for correction of thewafer deflection due to gravitational effects. As noted inAppendix 2, different reference planes are used for the twomethods. Because Test Method F 657 employs a back surfacereference plane, the measured warp may include contributionsfrom thickness variation of the wafer. Test Method F 1390employs a median surface reference plane and is notsusceptible to interferences from thickness variations. Ingeneral, Test Method F 1390 is preferred, especially forwafers 150 mm in diameter and larger.

9.4.1 Sori — If sori is specified in li eu of bow or warpor both, determine in accordance with Test Method F1451.

9.5 Total Thickness Variation — Determine inaccordance with ASTM Test Method F 533, ASTMTest Method F 657, ASTM Test Method F 1530, DIN50441/1, or JIS H 0611.NOTE 9: ASTM Test Method F 533, DIN 50441/1 and JIS H0611 are all 5 point methods, while Test Method F 657involves a continuous scan pattern over a portion of the wafersurface and Test Method F 1530 involves an automatedcontinuous scan pattern over the entire wafer surface. JIS H0611 differs from ASTM Test Method F 533 and DIN50441/1, in that the measurements in JIS H 0611 are taken atthe center and at 5 mm from the edge on diameters paralleland perpendicular to the primary orientation flat or notchbisector, while the measurements in ASTM Test Method F533 and DIN 50441/1 are taken at the center and at the sameradial distance (Rnominal -6 mm) on diameters 30 degrees and120 degrees counterclockwise from the bisector to theprimary orientation flat or notch (with the wafer facing frontsurface up).

9.6 Flat Orientation — Determine in accordance withASTM Test Method F 847.

SEMI M1-0600 © SEMI 1978, 2000 12

9.7 Surface Orientation — Determine in accordancewith ASTM Test Method F 26 or DIN 50433.

9.8 Orthogonal Misorientation — Determine by amethod agreed upon between the user and supplier.

9.9 Surface Defects and Contamination

9.9.1 Visually Observable Surface Defects —Determine in accordance with ASTM Practice F 523.The following conditions shall be used:a. Background light intensity: 8 ± 2 fc (86 ± 22 lux),

b. Angle (alpha): 45° ± 10°, and

c. Angle (beta): 90° ± 10°.

See Section 10 for surface defect minimal conditions ordimensions and Table 1 for allowable limits. In theevent the wafers fail to meet these criteria, they may beconditioned according to a procedure as agreed uponbetween user and supplier and retested.

9.9.2 Surface Metal Contamination — Determine by amethod or methods agreed upon between the supplierand the purchaser.NOTE 10: ASTM Methods F 1526 and F1617 can be used tomeasure surface contamination levels of selected metals (seeRelated Information 1). ASTM Practices F 154 are usefulguides for defining a variety of surface features found onsilicon surfaces and for establishing commonly understoodterms for describing them. It also gives detailed proceduresfor illumination and microscopical examination of surfaces.The presence of contaminating materials on silicon surfacescan be determined by ASTM Methods F 21 or F 22, asappropriate.

9.10 Conductivity Type — Determine in accordancewith ASTM Test Method F 42 or DIN 50432.

9.11 Resistivity — Determine by me thods agreed uponbetween the user and supplier.NOTE 11: Resistivity of wafers is most appropriatelydetermined for referee purposes by ASTM Method F 84 orDIN 50431. Under some circumstances these tests may beconsidered destructive, and an alternative means may berequired. One nondestructive test is ASTM Test Method F673, having a range from 0.0001 to 100 ohm cm. Anothernondestructive test is ASTM Test Method F 398. This methodis limited to carrier concentrations in the ranges from 1.5 ×1018 to 1.5 × 1021 cm-3 for n-type silicon and from 3 × 1018 to5 × 1020 cm-3 for p-type, and has only moderate inter-laboratory precision. Other available methods include ASTMTest Method F 43 or DIN 50430 (referee methods requiring abar-shaped sample) and ASTM Test Method F 419 (which isdestructive, and of limited range).

9.12 Radial Resistivity Variation — Determine inaccordance with ASTM Method F 81 or DIN 50435.

9.13 Crystal Perfection — Determine in accordancewith ASTM Test Method F 47, DIN 50434, or JIS H

0609 (to determine grain boundaries, twinning, slip,dislocations, and lineage) and ASTM Test Method F416 (to determine oxidation-induced defects).

9.14 Other Impurities — Determine by methodsagreed upon between the user and supplier.NOTE 12: ASTM Test Methods F 1188 and F 1619 and DIN50438/1 are specific tests for oxygen in silicon, and ASTMTest Method F 1391 and DIN 50438/2 are specific tests forcarbon in silicon; the test specimen cannot be heavily doped,and special thick test specimens may be necessary. ASTMTest Method F 1366 is a specific test for oxygen in heavilydoped silicon. Radial variation of oxygen in silicon may bedetermined in accordance with ASTM Test Method F 951.Boron contamination in heavily doped n-type silicon can bedetermined in accordance with ASTM Test Method F 1528.

9.15 Flatness — Determine in acco rdance with ASTMTest Method F 1530 or by another method as agreedupon between the supplier and the purchaser.

9.15.1 For scanning site flatness, orient the wafer sothe effective Scan Direction is along the wafer’s Y-axis.For scanning site flatness, subsite width, Wss, shall be 8mm.

9.16 Edge Contour — Determine in accordance withASTM Test Methods F 928 or DIN 50441/2.

9.17 Mobility — If Hall mobility is specified,determine in accordance with ASTM Test Methods F76; if conductivity mobility is specified, determine by amethod agreed upon between the user and supplier.

9.18 Diffusion Length — Determine in accordancewith ASTM Test Method F 391.

9.19 Minority Carrier Lifetime — Determine inaccordance with ASTM Method F 28, ASTM TestMethod F 1535, or DIN 50440/1.NOTE 13: These test methods determine minority carrierlifetime only when the measurement is made in low injectionconditions. ASTM Test Method F 28 and DIN 50440/1 bothrequire the use of special test specimens; ASTM Test MethodF 1535 is applicable to measurements on wafers but specialsurface passivation procedures may be required to obtainmeaningful results. Minority carrier lifetime may also beinferred from measurements made in accordance with ASTMTest Method F 1388. This method yields generation lifetime ifthe measurements are made at or near room temperature andrecombination lifetime if they are made at slightly elevatedtemperature (50 to 75°C). The test specimens required forTest Method F 1388 can be made by procedures which arecompatible with typical wafer processing.

10 Standard Defect Limits10.1 Minimal conditions or dimens ions for surfacedefects are stated below. These limits shall be used fordetermining wafer acceptability; anomalies smaller thanthese limits shall not be considered defects.

SEMI M1-0600 © SEMI 1978, 200013

10.1.1 area contamination — Any foreign matter onthe surface in localized areas which is revealed underthe inspection lighting conditions as discolored,mottled, or cloudy appearance resulting from smudges,stains, water spots, etc.

10.1.2 crack — Any anomaly conforming to thedefinition and greater than 0.010 inch (0.25 mm) intotal length.

10.1.3 crater — Any individually dis tinguishablesurface anomaly conforming to the definition andvisible when viewed under diffused illumination.

10.1.4 crow’s foot — Any anomaly conforming to thedefinition and greater than 0.010 inch (0.25 mm) intotal length.

10.1.5 dimple — Any smooth surface depressiongreater than 3 mm in diameter.

10.1.6 edge chip and indent — Any edge anomalyincluding saw exit marks conforming to the definitionand greater than 0.010 inch (0.25 mm) in radial depthand peripheral length.

10.1.7 groove — Any anomaly confo rming to thedefinition and greater than 0.0005 inch (0.13 mm) wideor 0.030 inch (0.76 mm) in length.

10.1.8 haze — Haze is indicated when the image of anarrow beam tungsten lamp filament is detectable onthe polished wafer surface. (Under some conditions,contamination may appear as haze.)

10.1.9 mound — Any anomaly conforming to thedefinition and greater than 0.010 inch (0.25 mm) inmaximum dimension.

10.1.10 orange peel — Any visually de tectableroughened surface conforming to the definition andobservable under diffused illumination.

10.1.11 particulate contamination — Distinct particlesresting on the surface which are revealed undercollimated light as bright points.

10.1.12 pit — Any individually distinguishablenonremovable surface anomaly conforming to thedefinition and visible when viewed under intenseillumination.

10.1.13 scratch — Any anomaly confo rming to thedefinition and having a length-to-width ratio greaterthan 5:1.

10.1.14 striation — Any feature conforming to thedefinition and detectable under diffused lightingconditions.

11 Certification11.1 Upon request of the purchaser in the contract ororder, a manufacturer’s or supplier’s certification thatthe material was manufactured and tested in accordancewith this specification, together with a report of the testresults, shall be furnished at the time of shipment.

11.2 In the interest of controlling inspection costs, thesupplier and the purchaser may agree that the materialshall be certified as “capable of meeting” certainrequirements. In this context, “capable of meeting”shall signify that the supplier is not required to performthe appropriate tests in Section 9. However, if thepurchaser performs the test and the material fails tomeet the requirement, the material may be subject torejection.

12 Packing and Marking12.1 Special packing requirements shall be subject toagreement between the user and supplier. Otherwise, allwafers shall be handled, inspected, and packed in sucha manner as to avoid chipping, scratches, andcontamination and in accordance with the best industrypractices to provide ample protection against damageduring shipment.

12.2 The wafers supplied under these specificationsshall be identified by appropriately labeling the outsideof each box or other container and each subdivisionthereof in which it may reasonably be expected that thewafers will be stored prior to further processing.Identification shall include as a minimum the nominaldiameter, conductivity type, dopant, orientation,resistivity range, and lot number. The lot number, either(1) assigned by the original manufacturer of the wafers,or (2) assigned subsequent to wafer manufacture butproviding reference to the original lot number, shallprovide easy access to information concerning thefabrication history of the particular wafers in that lot.Such information shall be retained on file at themanufacturer’s facility for at least one month after thatparticular lot has been accepted by the user.

SEMI M1-0600 © SEMI 1978, 2000 14

Table 1 Polished Wafer Defect Limits

Item Characteristics MaximumDefect Limit

AQL(See NOTE 5.)

Illumination Conditions(See NOTE 7.)

NOTES

FRONT SURFACE

1 SCRATCHES Maximum Number None High Intensity 1

2 PITS None 1.0% Cum. High Intensity 1

3 HAZE None 1.0% High Intensity 1

4 CONTAMINATION, PARTICULATEMaximum Number2 inch Diameter Wafer3 inch Diameter Wafer100 mm Diameter Wafer125 mm Diameter Wafer150 mm Diameter Wafer

46

101015

1.0% High Intensity 1

5 CONTAMINATION, AREA None 1.0% High Intensity or Diffuse 1

6 EDGE CHIPS AND INDENTS None See NOTE 4. Diffuse 2, 4

7 CRACKS, CROW’S FEET None Diffuse 4

8 CRATERS None Diffuse 1

9 DIMPLES None Diffuse 1

10 GROOVES None 1.0% Cum. Diffuse 1

11 MOUNDS None Diffuse 1

12 ORANGE PEEL None Diffuse 1

13 SAW MARKS None 1.0% Cum. Diffuse 1

14 RESISTIVITY STRIATIONS See NOTE 3. Diffuse 3

BACK SURFACE

15 EDGE CHIPS None See NOTE 4. Diffuse 2, 4

16 CRACKS, CROW’S FEET None Diffuse 4

17 CONTAMINATION, AREA None 1.0% Cum. Diffuse

18 SAW MARKS None 1.0% Cum. Diffuse 6

19 ALL LISTED CHARACTERISTICS(Items 1 through 18)

Total 2.5%

NOTE 1: The outer 0.062 inch (1.57 mm) annulus is excluded from these criteria.NOTE 2: Accept/reject criterion shall be agreed upon between user and supplier for wafers which are not mechanically edge-rounded.NOTE 3: Striations may be visible on low resistivity wafers (less than 0.020 ½ ¥ cm).NOTE 4: The cumulative AQL for both front surface and back surface of wafer is 1.0%.NOTE 5: Single, Normal, Level II Sampling Plan as defined in ANSI/ASQC Z1.4.NOTE 6: Accept/reject criterion shall be agreed upon between user and supplier for non-lapped wafers.NOTE 7: See ASTM Practice F 523 for definition of Illumination Conditions.

SEMI M1-0600 © SEMI 1978, 200015

Figure 1Fixed Quality Area

Figure 2Orthogonal Misorientation

Figure 3Primary Orientation Flat Diameter

SEMI M1-0600 © SEMI 1978, 2000 16

Figure 4SEMI Wafer Edge Profile Template

NOTE: Figure 4 is not to scale.

Table 2 Coordinates for “T/3” Wafer Edge Profile Template

Point x y

in. µm in. µm

A 0.0030 76 0.00 0

B 0.0200 508 0.00 0

C 0.0020 50 1/3 Nominal Wafer Thickness(See NOTE 2.)

D 0.00 0 0.0030 76

Table 3 Coordinates for “T/4” Wafer Edge Profile Template

Point x y

in. µm in. µm

A 0.0047 120 0.00 0

B 0.0200 508 0.00 0

C 0.0040 100 1/4 Nominal Wafer Thickness(See NOTE 2.)

D 0.00 0 0.0020 50NOTE 1: For referee purposes, U.S. Customary units are to be used for 2 and 3 in. diameter wafers. SI units are to be used for all other diameters.NOTE 2: See the appropriate polished silicon wafer standard for numerical values.

NOTE 3: Only one-half of the template is shown; the wafer surface is aligned with the x-axis, and the outermost radial portion of the edgecontour is aligned with the y-axis. The template in Figure 4 is not intended for use in measuring wafer thickness.NOTE 4: Constant radius profile with blended, tangential front and back surface intercepts is preferred for ease of manufacture and reducedparticle and chip generation.

SEMI M1-0600 © SEMI 1978, 200017

Figure 5Examples of Acceptable and Unacceptable Wafer Edge Profiles

Figure 6Secondary Flat Location

SEMI M1-0600 © SEMI 1978, 2000 18

Figure 7Notch Dimensions

12.3 For referee purposes, metric (SI) units apply. To ensure that the product shipped is within specification, anyconversion to U.S. Customary Equivalents should be done following the maximum-minimum convention in whichthe minimum values are rounded up and the maximum values are rounded down to ensure that the equivalent rangeis always inside the referee range. If the U.S. Customary equivalents are used for incoming inspection, minimumvalues should be rounded down, and the rightmost digit of the maximum values should be rounded up to avoidrejection of the material that is within the specification when measured by the referee system of units.NOTE 14: The significance of the rightmost digit may vary depending on the quantity being measured and on the precision of thetest procedure. Refer to the relevant test method for precision data which can be used to construct appropriate guard bands.

NOTE 15: The pin shown in the outline on this figure is used to align the notched wafer in a fixture during use. The pin is alsoused to reference the notched wafer during testing for notch dimensions and dimensional tolerances. The notch dimensionsshown in the figure assume a 3 mm diameter for this alignment pin.

Lss

Wss = 8 mmSubsite

Site

Scan Direction = Y

Figure 8Scanner Site Flatness Elements

SEMI M1-0600 © SEMI 1978, 200019

APPENDIX 1FLATNESS DECISION TREENOTE: The material in this appendix is an official part ofM1 and was approved by full letter ballot procedures onOctober 21, 1999 by the North American RegionalStandards Committee.

A1-1 ScopeA1-1.1 The increasing complexity of integratedcircuits and the reduction in design rule dimensionsplace new demands on the characterization of wafersurface geometry. Various high resolution opticallithographic systems have very limited depth of fieldand use a variety of methods to hold the wafer, toestablish the focal plane, and to position the waferrelative to the focal plane during exposure. Thesevarying focusing and location methods differ enoughto make a single, simple flatness criterion (such asglobal TIR) ineffective in predicting successful orunsuccessful lithography in all cases.

A1-1.2 To clarify the requirements for wafer flatnesscharacterization for the various classes oflithographic equipment, the decision tree depicted inFigure A1-1 has been developed. This tree gives anorderly procedure for selecting the variousparameters outlined in Section 4.2.5.

A1-1.3 In this tree, it is assumed that the focal pointis the site center for all parameters, except for SFQD,SFQR, SFSD, and SFSR, where the focal plane isidentical to the reference plane. Most flatnesscharacterization systems employ this convention.However, a number of photolithographic aligners useslightly different conventions for determining thefocal plane. Currently, the difference between thecenterpoint and other focusing conventions has notbeen quantified, but it is presumed to be insignificantfor material characterization purposes.

A1-2 Use of the Flatness Decision TreeA1-2.1 In the decision tree, there are decisionblocks, shown as diamonds, whose use requires someknowledge of the lithographic tool to be used. Therectangular blocks require information to befurnished; this information is dependent on the devicelayout and the manufacturing procedures to beemployed (such as dedicated or mixed aligner use).

A1-2.2 Step 1. Select the Fixed Quality Area (FQA):Decide on and specify the nominal edge exclusion,X, which defines the FQA. (See Figure 1.)

A1-2.3 Step 2. Choose the Measurement Method:Choose global flatness (G) if the lithographic tooluses a single, global exposure of the wafer, or choosesite flatness (S) if the lithographic tool steps acrossthe wafer, exposing only a portion of the wafer at atime.

A1-2.3.1 If global flatness is chosen, proceed to Step3. If site flatness is chosen, it is also necessary tospecify site size (related to exposure area dimensions)and site array (including (a) number of sites, (b)location of sites relative to the center of the FQA andto each other, as in an offset or bricklaying pattern,and (c) whether or not partial sites are to beexcluded).

A1-2.4 Step 3. Choose the Reference Surface:Choose front surface (F) or back surface (B),depending on whether the lithographic tool isreferenced to the front or back surface.

A1-2.5 Step 4. Choose the Reference Plane andArea:

A1-2.5.1 For global flatness measurements, a globalreference plane is appropriate. If the lithographic toolis referenced to the back surface, an ideal plane (I)defined by the chuck which holds the wafer isappropriate. If the lithographic tool is referenced tothe front surface, either a 3-point plane (3) defined bythree points equally spaced about the edge of thefront surface of the wafer or a plane defined by theleast squares fit to the front surface (L) may beappropriate. The 3-point plane is appropriate if thelithographic tool holds the wafer in this fashion anddoes not allow interactive gimbaling of the wafer,while the least squares plane is appropriate if thelithographic tool allows interactive gimbaling of thewafer.

A1-2.5.2 For site flatness measurements, any of theabove three planes [(1), (3), or (L)] may be suitableor, if the wafer is regimballed once at each site, a siteleast squares reference plane (Q) may be appropriateor, if the wafer is regimballed more than once at eachsite, a subsite least squares reference plane (S) maybe appropriate.

A1-2.6 Step 5. Choose the Measurement Parameter:Choose either TIR, also known as range (R), or FPD,also known as deviation (D). In the case of sitemeasurements, it is possible to specify the maximumvalue of (R) or (D) or the percentage of the sites (orFQA) which have an (R) or (D) less than somespecified value.

SEMI M1-0600 © SEMI 1978, 2000 20

A1-2.7 The codes in parentheses in Steps 2 through5 may be used to form a code which uniquely definesthe measurement technique as follows:

Position 1: Measurement Method (G) or (S),

Position 2: Reference Surface (F) or (B),

Position 3: Reference Plane and Area (1), (3), (L),(Q), or (S), and

Position 4: Measurement Parameter (R) or (D).

A1-2.7.1 Stating this code, the numerical values forthe FQA parameters (and, if required, information on

site size and array), and the numerical limit for themeasurement parameter provides enough informationto describe the measurement and provide numericallimits.

A1-3 Future DevelopmentsA1-3.1 As noted above, there may be specificsystems which are not exactly described by one of thebranch ends on this decision tree. This tree is anapproximation of the more complete one whichwould describe all existing and possible lithographictechnologies.

Figure A1-1Flatness Decision Tree

SEMI M1-0600 © SEMI 1978, 200021

APPENDIX 2SHAPE DECISION TREENOTE: The material in this appendix is an official part ofM1 and was approved by full letter ballot procedures onOctober 21, 1999 by the North American RegionalStandards Committee.

A2-1 ScopeA2-1.1 In modern wafer fabrication processes, wafersurface geometry in the unclamped state can be asensitive indicator of process effects. Larger waferdiameters and increasing complexity of processes andcircuits have increased the need for accurate,standardized measurement of unclamped wafergeometry. The quantities that have historically beenused, Bow and Back Surface Referenced Warp, maybe inadequate to describe and quantify the geometriesof interest in advanced processes. Additional surfacegeometry quantities, such as Sori and Median SurfaceReferenced Warp, have been introduced intostandards.

A2-1.2 In addition, there is considerable confusionas to the precise meaning of these quantities, eventhough they are defined in the applicable ASTM testmethods.

A2-1.3 The Shape Decision Tree was developed toprovide an orderly method of identifying each of thevariables involved in the quantities used to quantifyunclamped wafer surface geometry. As such, the treeprovides a concise and precise description of eachshape quantity. A branch of the tree consists of aselection of one of the choices for each variable. Thevariables and the choices for each are listed in TableA2-1.

A2-1.4 Four branches of the tree, representingquantities for which standard measurement methodshave been developed by ASTM, are depicted inFigure A2-1. There are many other branches of thetree, not all of which may represent practicalcombinations of variables.

A2-2 Use of the Shape Decision TreeA2-2.1 Step 1. Select the value of the Nominal EdgeExclusion to define the Fixed Quality Area.

NOTE A2-1: This value must be provided whenever ashape quantity is specified.

A2-2.2 Step 2. Select the measurement method:global (over the entire fixed quality area) or local(over a site).

NOTE A2-2: At present, all shape quantities in commonuse are global measurements. The significance and use oflocal shape quantities have yet to be defined.

A2-2.3 Step 3. Select the reference surface: front,median, or back, to be used to establish the referenceplane.

A2-2.4 Step 4. Select the type of reference plane:least-squares or 3-point.

NOTE A2-3: A measurement made with a least-squaresreference plane is less affected by small changes in waferposition within the measurement apparatus than is ameasurement made with a 3-point reference plane.

A2-2.5 Step 5. Determine whether the effects ofgravitational sag on the wafer are accounted for (yes)or not (no).

NOTE A2-4: Gravitational effects may be accounted for byinverting the wafer during the measurement, by placing thewafer in a vertical or nearly vertical position during themeasurement, or mathematically.

A2-2.6 Step 6. Select the measurement surface:front, median, or back, for which the deviations are tobe measured.

A2-2.7 Step 7. Select the measurement pattern: fullscan (a regular array of measurement points over theentire measurement area), partial scan (a specifiedpattern of measurement points covering only aportion of the measurement area), or centerpoint(measurement at the center of the wafer only).

A2-2.8 Step 8. Select the parameter to bedetermined: range (TIR) or maximum RPD.

A2-2.9 Step 9. Compare the branch thus obtainedwith the branches in Figure A2-1. If the branchobtained matches one of the branches illustrated inFigure A2-1, the resulting quantity is given by thecode shown in the box at the bottom of the branch.The ASTM test method used for its measurement isalso shown in the box. If the branch obtained doesnot match any of the branches illustrated in FigureA2-1, the quantity obtained has not been given astandardized term, nor has a standard test methodbeen adopted for its measurement.

A2-2.9.1 These codes, which uniquely describe thevarious branches, are formed from the codes in TableA2-1. Stating this code together with the numericalvalue for the FQA exclusion distance providesenough information to describe the shape parameterand to establish numerical limits for it.

SEMI M1-0600 © SEMI 1978, 2000 22

A2-2.9.2 Table A2-2 summarizes the shapeparameters for which ASTM has developed testmethods. This table lists the code, the term incommon use for the parameter, the ASTM testmethod, and the expanded form of the code.

A2-2.9.3 If the branch obtained does not match anyof the branches illustrated in Figure A2-1, thequantity obtained has not been formally defined norhas a standard test method been adopted for itsmeasurement.

Figure A2-1Four Branches of the Shape Decision Tree

SEMI M1-0600 © SEMI 1978, 200023

Table A2-1 Variables in Shape Quantities

Variable Options Code

Measurement Method Global G

Local (Site) S

Reference Surface Front F

Median M

Back B

Reference Plane Least-Square L

3-Point 3

Corrected for Gravitational Sag Yes Y

No N

Measurement Surface Front F

Median M

Back B

Measurement Pattern Full Scan (Entire) E

Partial Scan P

Centerpoint C

Parameter Range (TIR) R

Maximum RPD D

Table A2-2 Shape Code Summary

Code Term ASTM Test Method Expanded Form of Code

GFLYFER sori F 1451 Global, Front-surface Least-squares reference plane, Yes (corrected forgravitational sag), Front-surface measurement, Entire surface scanned, Range

GMLYMER warp F 1390 Global, Median-surface Least-squares reference plane, Yes (corrected forgravitational sag), Median-surface measurement, Entire surface scanned, Range

GM3YMCD bow F 534 Global, Median-surface 3-point plane, Yes (corrected for gravitational sag),Median-surface measurement at Center point, Deviation

GB3NMPR warp F 657 Global, Back-surface 3-point reference plane, No (not corrected for gravitationalsag), Median-surface measurement, Partial surface scanned, Range

NOTICE: SEMI makes no warranties or representations as to the suitability of the standards set forth herein for anyparticular application. The determination of the suitability of the standard is solely the responsibility of the user.Users are cautioned to refer to manufacturer’s instructions, product labels, product data sheets, and other relevantliterature respecting any materials mentioned herein. These standards are subject to change without notice.

The user’s attention is called to the possibility that compliance with this standard may require use of copyrightedmaterial or of an invention covered by patent rights. By publication of this standard, SEMI takes no positionrespecting the validity of any patent rights or copyrights asserted in connection with any item mentioned in thisstandard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, andthe risk of infringement of such rights, are entirely their own responsibility.

SEMI M1-0600 © SEMI 1978, 2000 24

RELATED INFORMATION 1SURFACE METAL CONTAMINATIONNOTE: This related information is not an official part ofSEMI M1 and is not intended to modify or supercede theofficial standard. Publication was authorized by full letterballot procedure. Determination of the suitability of thematerial is solely the responsibility of the user.

R1-1 ScopeR1-1.1 Maximum allowable surface metal contamina-tion levels generally depend upon the IC device densityand upon the IC process design. In general, as thedevice density increases, the allowable surface metalcontamination levels become lower.

R1-1.2 This related information is intended to provideguidance regarding allowable surface concentrations ofmetal contaminants which have been reported to bedeleterious to circuit and device performance.

R1-2 Suggested Allowable Surface MetalContamination Levels for 1 µm GeometriesR1-2.1 Table R1-1 lists suggested surface metal limitsfor circuits and devices with a minimum linewidth inthe range of 0.8 µm to 1.2 µm for two alkali metals(Na, K), a light metal (Al), and five heavy metals (Cr,Fe, Ni, Cu, Zn).

R1-3 Test MethodsR1-3.1 Some commonly used test methods for eachsurface metal contaminant are also listed in Table R1-1.TXRF measurements should be made in accordancewith ASTM Test Method F 1526 and SIMS measure-ments should be made in accordance with ASTM TestMethod F 1617. Measurements involving vapor phasedecomposition (VPD) have not yet been standardized.The following sections list some issues concerningapplication of the VPD methods.

R1-3.2 VPD is chemical preconcentration of thesurface metals using vapor phase HF to decompose thesurface native oxide and a water (or acid-spiked water)droplet to scan across the wafer dissolving the surfacemetals. The recovery rate of this preconcentrationmethod is dependent upon the chemistry of the surfacemetals and upon the chemistry used for the preconcen-tration. An alternative preconcentration method to VPDis to scan an acid droplet across the wafer surface.

R1-3.3 VPD/AAS (vapor phase decompositionfollowed by graphite furnace atomic absorption spectro-scopy) is a single element technique which is widelyused in Japan: it is element-specific and very sensitive.VPD/ICP-MS (vapor phase decomposition followed byinductively coupled plasma mass spectrometry) is a

rapid multi-element technique which is a more recentdevelopment: it is also very sensitive, but its reproduci-bility is dependent upon the injection process into theICP-MS. VPD/TXRF (vapor phase decomposition fol-lowed by total reflection x-ray fluorescence) is a morerecently developed multi-element technique. It is alsovery sensitive, but its reproducibility is dependent onthe residue-drying process.

Table R1-1 Suggested Polished Wafer SurfaceMetal Contamination Limits Appropriate toCircuits and Devices with a Minimum Linewidth inthe Range 0.8 µm to 1.2 µm

Element ContaminantLevel

Test Method

Na 1011 atoms/cm2 SIMS, VPD/(AAS or ICP-MS)

Al 1011 atoms/cm2 SIMS, VPD/(AAS or ICP-MS)

K 1011 atoms/cm2 SIMS, VPD/(AAS, ICP-MS, orTXRF)

Cr 1011 atoms/cm2 TXRF, VPD/(AAS, ICP-MS orTXRF)

Fe 1011 atoms/cm2 TXRF, VPD/(AAS, ICP-MS orTXRF)

Ni 1011 atoms/cm2 TXRF, VPD/(AAS, ICP-MS orTXRF)

Cu 1011 atoms/cm2 TXRF, VPD/(AAS, ICP-MS orTXRF)

Zn 1012 atoms/cm2 TXRF, VPD/(AAS, ICP-MS orTXRF)

SEMI M1-0600 © SEMI 1978, 200025

NOTICE: SEMI makes no warranties orrepresentations as to the suitability of the standards setforth herein for any particular application. Thedetermination of the suitability of the standard is solelythe responsibility of the user. Users are cautioned torefer to manufacturer’s instructions, product labels,product data sheets, and other relevant literaturerespecting any materials mentioned herein. Thesestandards are subject to change without notice.

The user’s attention is called to the possibility thatcompliance with this standard may require use ofcopyrighted material or of an invention covered bypatent rights. By publication of this standard, SEMItakes no position respecting the validity of any patentrights or copyrights asserted in connection with anyitem mentioned in this standard. Users of this standardare expressly advised that determination of any suchpatent rights or copyrights, and the risk of infringementof such rights, are entirely their own responsibility.

Copyright by SEMI® (Semiconductor Equipment and MaterialsInternational), 805 East Middlefield Road, Mountain View, CA 94043.Reproduction of the contents in whole or in part is forbidden withoutexpress written consent of SEMI.